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Patent Searching and Data


Title:
ELECTRICAL CIRCUITS
Document Type and Number:
WIPO Patent Application WO/1990/001251
Kind Code:
A1
Abstract:
A three-dimensional electrical circuit structure is manufactured by defining circuit paths (7) on a three-dimensional base (6) by the projection of a hologram (1) of the structure onto the base (6).

Inventors:
ATKINSON ANTHONY (GB)
Application Number:
PCT/GB1989/000830
Publication Date:
February 08, 1990
Filing Date:
July 19, 1989
Export Citation:
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Assignee:
GEN HYBRID LTD (GB)
International Classes:
G03H1/00; G03H1/22; H05K3/00; H05K3/10; H05K1/00; H05K3/06; (IPC1-7): H05K3/00
Foreign References:
US3582176A1971-06-01
US3712813A1973-01-23
Other References:
IBM Technical Disclosure Bulletin, Vol. 10, No. 10, March 1968, T.J. HARRIS et al.: "Holographic Manufacturing Apparatus", pages 1513-1515
IBM Technical Disclosure Bulletin, Vol. 10, No. 3, 3 August 1967, T.F. SAUNDERS: "Light Sensitive Metalorganic Chelate Polymers", page 195
P. HARIHARAN: "Optical Holography Principles, Techniques and Applications", pages 146-147
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Claims:
CLAIMS
1. A method of manufacturing a three dimensional electrical circuit structure,; including the step of defining circuit paths on a three dimensional base by projection of a hologram of the structure onto the base. 2. A method as claimed in Claim 1, in which the hologram is formed from a model of the structure. 3. A method as claimed in Claim 1, in which the hologram is generated by computer.
2. 4 A method as claimed in any preceding claim, in which the base carries a light sensitive coating of a material which is cured by the hologram at positions where circuit paths are to be formed, to become conductive at such positions, uncured material being subsequently removed from the base and circuit paths built up on the cured material.
3. 5 A method as claimed in Claim 1, Claim 2, or Claim 3, in which the base carries a metal coating with an overlying coating of a light sensitive etchant resistant material, the hologram serving to cure the etchant resistant material at positions where circuit paths are required, the uncured etchant resistant material and the underlying metal coating being subsequently removed to leave the required circuit paths on the base.
4. 6 A method as claimed in any preceding claim, in which circuit paths are formed on both inside and outside surfaces of a three dimensional base.
5. 7 A method as claimed in any preceding claim, in which a plurality of holograms are used.
6. 8 A method of manufacturing a three dimensional electrical circuit structure, substantially as hereinbefore described with reference to the drawings.
Description:
ELECTRICAL CIRCUITS

This invention relates to electrical circuits, and in particular to a method of manufacturing a three dimensional electrical circuit structure.

Planar electrical circuit structures are well known in the form of printed circuit boards, as are various ways of manufacturing such structures.

For example, it is known to manufacture such a structure by coating a planar base substrate of electrically insulating material with a layer of metal, typically copper, which is in turn covered by a layer of light sensitive material which when exposed to light and thus cured, is resistant to etchants used for etching away unwanted parts of the metal layer. The light sensitive layer is then selectively cured as by masking and exposure to light, the uncured parts of the material and the underlying metal layer then being removed, as by etching, to leave the required circuit paths on the substrate. Otherwise the substrate can be coated with a light sensitive material which when exposed to light and thus cured becomes conductive, the material being selectively exposed to light as by masking to cure those parts where current paths are required, the remainder of the material being subsequently removed and circuit paths formed as by deposition of metal onto the cured parts.

Difficulties arise when three dimensional electrical circuit structures are desired, and conventionally either a plurality of planar structures are used, or a planar structure is moulded

to obtain a desired structure.

According to this invention there is provided a method of manufacturing a three dimensional electrical circuit structure, including the step of defining circuit paths on a three dimensional base by projection of a hologram of the structure onto the base.

With the method of this invention electrical circuit paths can be directly formed on a three dimensional base using either of the known methods of formation discussed above, the essential feature of the method of the invention being the use of a hologram to define the required circuit paths simultaneously on a three dimensional base. The hologram used can be formed in conventional manner from a model of the required structure, the model comprising a three dimensional base with the circuit paths shown in contrasting colour thereon. Otherwise the hologram can be generated by computer, for example as described on pages 43 and 44 of the magazine EUREKA of November 1987 under the title "New Holograms Focus Machining Beams".

With the method of this invention circuit paths can be formed on both inside and outside surfaces of a three dimensional base, a plurality of holograms being used if necessary.

This invention will now be described by way of example with reference to the drawings, in which: ■* -

Figures 1 and 2 illustrate the basic principle of the method of the invention; and

Figures 3 and 4 illustrate two methods in accordance with the invention.

As shown in Figure 1, in the method of the invention a hologram 1 is formed, in known manner, of a three dimensional model 2 of a required three dimensional -'electrical circuit structure, the model 2

comprising a three dimensional base 3 having the required circuit paths 4 shown thereon in contrasting colour.

As shown in Figure 2, the hologram 1 formed is then used to produce a three dimensional electrical circuit structure 5 by projection of the hologram 1, in known manner, onto a three dimensional base 6 prepared for formation of electrical circuit paths 7 thereon by either of the known methods described above.

Thus, the base 6 can be coated with a light sensitive material which becomes electrically conductive when cured, applied by dipping, spraying or other known operations. The applied coating is then selectively cured by projection of the hologram 1 onto the base 6, and the uncured coating material then removed from the base 6 by means of a solvent, to leave the required circuit paths 7 on the base 6. The circuit paths 7 can then be built up if required using conventional metal plating techniques.

If required, a base 6 can be subjected to a plurality of successive treatments as described in order to build up multilayer circuit paths 7 thereon with intermediate applications of dielectric material and possibly passive circuit components between the layers.

As a modification of the method described above, the base 6 can be given an initial coating of an electrically conductive metal such as copper, as by vacuum deposition, in which case the light sensitive material used need not be electrically conductive.

Figure 3 illustrates a method as described above, in which a plurality of holograms 1 are projected onto a spherical base 6 to define electrical circuit paths 7 thereon.

Figure 4 illustrates a method in which a plurality of holograms 1 are projected onto a three dimensional base structure 6 to define electrical circuit paths 7 on inside and outside surfaces of the structure.