Title:
ELECTRONIC CIRCUIT ANALYSIS DEVICE, ELECTRONIC CIRCUIT ANALYSIS METHOD, AND ELECTRONIC CIRCUIT ANALYSIS PROGRAM
Document Type and Number:
WIPO Patent Application WO/2007/116462
Kind Code:
A1
Abstract:
Provided are an electronic circuit analysis device, an electronic circuit analysis
method, and an electronic circuit analysis program used for checking operation
of an electronic circuit. An electronic circuit analysis device performs analysis
by inputting a behavior model describing an operation result of an element model
under a particular condition. The electronic circuit analysis device includes:
a per-operation condition accuracy information storage unit containing accuracy
information on each operation condition of the behavior model; a behavior model
operation condition detection unit for detecting an operation condition of
the behavior model during analysis execution; an analysis accuracy calculation
unit for calculating an analysis accuracy from the operation condition and the
accuracy information; an analysis accuracy judging unit for judging whether
the analysis accuracy is good; and an analysis accuracy display unit for displaying
the result judged by the analysis accuracy judging unit.
Inventors:
KAWATA HIKOYUKI (JP)
Application Number:
PCT/JP2006/306818
Publication Date:
October 18, 2007
Filing Date:
March 31, 2006
Export Citation:
Assignee:
FUJITSU LTD (JP)
KAWATA HIKOYUKI (JP)
KAWATA HIKOYUKI (JP)
International Classes:
G06F17/50; G06F19/00
Foreign References:
| JPH1139376A | 1999-02-12 | |||
| JP2001350814A | 2001-12-21 |
Other References:
ISHIDA T. ET AL.: "LSI Taio I/O Buffer Model Kaihatsu System", MITSUBISHI DENKI GIHO, MITSUBISHI DENKI GIHO SHA, vol. 72, no. 3, 25 March 1998 (1998-03-25), pages 76 - 79
Attorney, Agent or Firm:
ITOH, Tadahiko (Yebisu Garden Place Tower20-3, Ebisu 4-chom, Shibuya-ku Tokyo 32, JP)
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