Title:
ELECTRONIC CIRCUIT AND ELECTRONIC APPARATUS
Document Type and Number:
WIPO Patent Application WO/2019/087602
Kind Code:
A1
Abstract:
[Problem] To provide an electronic circuit capable of avoiding the impact of voltage reduction of a driver for high-speed communication on the output level of a driver for low-speed communication in an interface for interconnecting devices in an electronic apparatus. [Solution] Provided is an electronic circuit equipped with: a first driver in which a plurality of structures comprising transistors connected in series are connected in parallel, and which transmits data at a predetermined communication speed; and a second driver that has a structure in which transistors are connected in series, and that transmits data at a lower communication speed than that of the first driver. In the electronic circuit, the potential applied to the body of the transistors of the first driver, said potential enabling the output level of the second driver to satisfy a predetermined standard, causes simultaneous parallel operation in the first driver such that the output impedance of the first driver meets a predetermined standard.
Inventors:
SEO YUKI (JP)
MIYAJIMA YOSHIFUMI (JP)
ZHOU ZHIWEI (JP)
MIYAJIMA YOSHIFUMI (JP)
ZHOU ZHIWEI (JP)
Application Number:
PCT/JP2018/034580
Publication Date:
May 09, 2019
Filing Date:
September 19, 2018
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H04L25/02; H03K19/0175
Foreign References:
| JP2004056546A | 2004-02-19 | |||
| JP2004046595A | 2004-02-12 | |||
| JP2011096950A | 2011-05-12 | |||
| JP2001185689A | 2001-07-06 | |||
| JPH06268505A | 1994-09-22 |
Attorney, Agent or Firm:
KAMEYA, Yoshiaki et al. (JP)
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