Title:
ELECTRONIC CIRCUIT AND METHOD FOR MOUNTING ELECTRONIC CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2016/092833
Kind Code:
A1
Abstract:
There has been a problem of generating antiresonance between a three-terminal capacitor and a capacitor when the three-terminal capacitor and the capacitor are mounted.
In order to solve the problem, this electronic circuit includes: a capacitor and a three-terminal capacitor, which are connected to a power supply terminal of a circuit component, and a power supply, and which are connected in parallel to each other between the power supply and ground; and a resistor that is connected in series between the ground and a ground terminal of the three-terminal capacitor and/or the capacitor.
Inventors:
KASHIWAKURA KAZUHIRO (JP)
Application Number:
PCT/JP2015/006116
Publication Date:
June 16, 2016
Filing Date:
December 08, 2015
Export Citation:
Assignee:
NEC CORP (JP)
International Classes:
H03H7/06; H01G4/40; H05K1/02
Foreign References:
| JP2007305642A | 2007-11-22 | |||
| JPH06132668A | 1994-05-13 | |||
| JP2007311567A | 2007-11-29 | |||
| JP2001015885A | 2001-01-19 | |||
| JP2003282347A | 2003-10-03 |
Attorney, Agent or Firm:
SHIMOSAKA, NAOKI (JP)
Naoki Shimosaka (JP)
Naoki Shimosaka (JP)
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