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Title:
ELECTRONIC POWER REGULATOR
Document Type and Number:
WIPO Patent Application WO/1993/022826
Kind Code:
A1
Abstract:
The present invention relates to an electronic power regulator for regulating the AC power being fed into a load (3). The power regulator comprises a switching unit (1) and a control unit (2). The switching unit is connected in series with the load (3) and is controlled by means of the control unit (2), most preferably so that the input of current is started when the half-cycle of the voltage acting over the switching unit starts and that the input is stopped at a desired point of the same half-cycle. The switching unit (1) according to the invention comprises a plurality of pairs of field effect transistors (5, 6; 7, 8; 9; 10, 11, 12) connected in parallel, the sources (S1, S2) of both of the field effect transistors of a pair (e.g. 5, 6) are interconnected in a way known per se, the drain (D1) of one of the field effect transistors (5) is connected to an AC source (4), and the drain (D2) of the other transistor (6) is connected to the load (3) and that the gates (G1, G2) of both of the transistors (5, 6) are connected to the control unit (2), by means of which the operation of the field effect transistors as switches is controlled.

Inventors:
SAIRANEN MARTTI
Application Number:
PCT/FI1993/000185
Publication Date:
November 11, 1993
Filing Date:
April 30, 1993
Export Citation:
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Assignee:
AHLSTROEM OY (FI)
International Classes:
H02M5/293; H05B39/04; (IPC1-7): H02M5/293; G05F1/455; H05B39/04
Foreign References:
US5038081A1991-08-06
US4528494A1985-07-09
EP0515961A11992-12-02
DE3618749A11986-12-11
EP0425035A21991-05-02
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Claims:
CLAIMS
1. An electronic power regulator for regulating the AC power being fed into a load (3) com prises a switching unit (1) and a control unit (2), which switching unit (1) is connected in series with the load (3), and most preferably is controlled by means of the control unit (2) so that the input of current into the load is started when the halfcycle of the voltage acting over the switching unit starts and the input is stopped at a desired point of the same halfcycle, c h a r a c t e r i z e d in that the switching unit (1) comprises a plurality of pairs of field effect transistors (5, 6, 7, 8; 9, 10; 11, 12), the sources (SI, S2) of both of the transistors of a pair (e.g. 5, 6) are interconnected in a way known per se, the drain (Dl) of one (5) of the field effect tran¬ sistors is connected to an AC source (4), and the drain (D2) of the other transistor (6) is connected to the load (3) and that the gates (Gl, G2) of both of the transistors (5, 6) are connected to the control unit (2), by means of which the operation of the field ef¬ fect transistors as switches is controlled.
2. A power regulator according to claim 1, c h a r a c t e r i z e d in that a diode bridge (13) is arranged across the switching unit (1), two (14,15) of the diodes being body diodes of each pair of field effect transistors (11, 12), the diode bridge being used to form the operation voltage of the control unit (2).
3. A power regulator according to claim 1 or 2, c h a r a c t e r i z e d in that the control unit (2) comprises a voltage metering arrangement (20a, 20b) for metering the voltage across the forwardbiased group of field effect transistors (11, 12) of the switching unit, and an overcurrent protection unit (23), in which the result from voltage measurement is used for monitoring the current passing through the group of field effect transistors (11, 12) and limiting the overcurrent when the group of field effect tran¬ sistors (11, 12) is turned on and/or a synchronizing unit (25), in which the result from voltage measurement is used for synchronizing the power regulation when the group of field effect transistors (11, 12) is turned on.
4. A power regulator according to claim 3, c h a r a c t e r i z e d in that the voltage metering arrangement (20a, 20b) comprises a plurality of resis¬ tors (21a, 22a, 21b, 22b) connected in series, arranged in •connection with both of the groups of field effect transistors (11, 12) of the switching unit (1).
5. A power regulator according to claim 3 or4 c h a r a c t e r i z e d in that the overcurrent protection unit (23) comprises a field effect transis¬ tor (24), to the gate of which is fed the metering voltage from the voltage metering arrangement (20a) for turning the field effect transistor (24) from off to on in case of a short circuit, and a circuit arrangement for discharging the charges of the gates of the pairs of field effect transistors (11, 12) of the connecting unit (1) and for turning them off. 6.
6. A power regulator according to claim 3 or 4 c h a r a c t e r i z e d in that the synchroniz¬ ing unit (25) comprises a field effect transistor (26), to the gate of which is fed the metering voltage from the voltage metering arrangement for turning the field effect transistor from on to off, and from which field effect transistor the synchronizing signal is thus received as output signal.
7. A power regulator according to any of the preceding claims, c h a r a c t e r i z e d in that the field effect transistors (5, 6; 7, 8; 9, 10; 11, 12) are of the ntype.
Description:
ELECTRONIC POWER REGULATOR

The present invention relates to an electronic power regulator for regulating the AC power being fed into a load as defined in the preamble of claim 1. The electronic power regulator according to the invention is especially suitable for regulating the power of one or more light sources, but it can as well be used for regulating the power of other kinds of loads, such as resistive and/or capacitative loads.

A power regulator for a light source, compris¬ ing a switching unit arranged in series with the load and accomplished by means of a diode bridge and a field-effect transistor operating as a switch, is pre- viously known. During the positive and negative half- cycle the input current traverses alternatingly the two opposing diodes and the field-effect transistor, the direction of the current always being the same in the transistor.. The drawback, nevertheless, is that as the diodes of the diode bridge are fixed components, they will cause power losses in the switching unit.

Finnish patent publication FI 61781 discloses a switching element consisting of two switches compris¬ ing transistors, the collectors of which are intercon- nected. Two reverse-connected diodes have been connect¬ ed parallel to each of the transistors, the direction of the diodes being from the emitter to the collector of the parallel transistor. The input current travers¬ es, depending on the half-cycle, always one diode and one collector-emitter connection. Thereby one of the diodes always forms a constant power loss, which causes additional power losses in the power regulator. These power losses increase greatly as the current increases. It should additionally be noted that this connecting element is not used in the power regulator by itself, but the publication requires that a comparable connect¬ ing element be connected also in parallel with the

load. This is especially so when the load is an induc¬ tive or capacitative one.

US-A-5,038,081 discloses an electronic power regulator, the switching unit of which comprises a pair of field effect transistors. The power regulator cir¬ cuit is specially intended for use with loads including capacitative loads, especially low voltage incandescent light bulbs. With this power regulator, the flow of current is started at the starting point of the half- cycle of the AC voltage, and is terminated at a desired point of the same half-cycle. The advantage of this power regulator is that its power consumption is small¬ er than that of the other known solutions. A disadvan¬ tage of this invention is, nevertheless, that the" two field effect transistors of the switching unit are controlled separately so, that one transistor operates during the positive half-cycle of the AC voltage while the other operates during the negative half-cycle.

The object of the invention is to disclose a new electronic power regulator capable of avoiding, or at least minimizing, the drawbacks of previous power regulators. It is a further object of the invention to provide for a new, reliable and simple electronic power regulator having a diminutive power loss. The characteristic features of the electronic power regulator according to the invention are describ¬ ed in claim 1.

The electronic power regulator according to the invention for regulating the AC power being fed into a load comprises a switching unit and a control unit, the switching unit being connected in series with the load. The switching unit is most preferably con¬ trolled by means of the control unit so that the input of current is started when the half-cycle of current across the switching unit begins and the input is stopped at a desired point of the same half-cycle. The switching unit according to the invention comprises a

plurality of pairs of field effect transistors connect¬ ed in series, in a way known per se so that the sources of both of the field effect transistors are intercon¬ nected, the drain of one of the field effect transis- tors is connected to the AC source, and the drain of the other transistor is connected to the load and that the gates of both the transistors are connected to the control unit, by means of which the operation of the field effect transistors as switches is controlled. An advantage of the invention is that unipolar semi-conductors, especially field effect transistors, are used as switches of the switching unit. In princi¬ ple, a field effect transistor is insensitive to the direction of the current between the source and drain, i.e. the current can traverse the channel in either direction. This fact is utilized in the invention so that the only power losses are generated because of the channel resistance of the pairs of parallel-connected field effect transistors; the input current to the load does not have to traverse any other components besides the parallel field effect transistors. Typically, the channel resistance of a field effect transistor is 0.5 - 0.05 Ω, but it is expected that with the introduction of new field effect transistors the channel resistance will still be decreased from the above values. Because of the parallel connection of the pairs of field effect transistors the loss resistance is further considerably diminished. Thus it is an especial advantage of the in¬ vention that the power regulator generates very small power losses. Consequently, this power regulator is capable of controlling very high rates of input power.

In one advantageous embodiment of the power regulator according to the invention a diode bridge is arranged across the switching unit, two of the diodes of the diode bridge being body diodes of each pair of field effect transistors, the diode bridge forming the operation voltage of the control unit.

An advantage of the above embodiment is that the switching unit receives its operation voltage straight from the same AC source that is fed into the load. " Thereby no other arrangements for voltage are needed and the circuitry needed for the electronic power regulator is simplified.

In one advantageous embodiment of the elec¬ tronic power regulator the control unit comprises a voltage metering arrangement, preferably a plurality of resistors connected in series, for metering the voltage across a forward-biased group of field effect transis¬ tors, an over-current protection unit, in which the result from the voltage metering is used for monitoring the current traversing the group of field effect tran- sistors and for limiting the over-current when the group of field effect transistors is turned on, and/or a synchronizing unit, in which the result from the voltage metering is used for carrying out the synchro¬ nizing of the control when the group of field effect transistors is turned off.

An advantage of the above-mentioned embodiment of an electronic power regulator according to the in¬ vention is that both current protection and synchroni¬ zation, or at least one of these, can easily be arrang- ed for the power regulator by means of a simple voltage metering arrangement. The purpose of the synchroniza¬ tion is that the load can be connected accurately and reliably at the zero point of the voltage acting across the switching unit. When the load is a resistive one, the synchronization is effected into the AC voltage of the AC network. With a capacitative load the synchroni¬ zation point is moved in relation to the zero points of the network AC voltage. It is easy to recognize the zero points of the voltage half-cycle and thereby to determine the correct moment of switching the power off for each half-cycle. The control unit utilizes, e.g. , a measuring of time commencing at the zero point of the

half-cycle and an adjustable time limit for effecting the point of switching the power off. Further, it is simple to arrange an over-current protection in connec¬ tion with the power regulator in the manner described above. Over-current protection is needed to prevent damage to the switching unit in case of a short cir¬ cuit. The voltage across both of the field effect tran¬ sistors is metered across the pairs of field effect transistors and, if needed, the transistors are turned off by means of the control unit.

In one embodiment of the electronic power regulator the over-current protection unit comprises both a field effect transistor, to the gate of which is fed the metering voltage from the voltage metering arrangement for turning a transistor from off to on in case of a short circuit, and a circuit arrangement for discharging the charges of the gates of the pairs of field effect transistors of the switching unit in order to turn the transistors off. Using a field effect tran- sistor in the over-current protection unit simplifies the circuit solution and unifies the structure of the power regulator.

In one embodiment of the electronic power regulator the synchronizing unit comprises a field effect transistor, the gate of which is fed the meter¬ ing voltage from the voltage metering arrangement for turning the field effect transistor from off to on, and from which field effect transistor a synchronizing signal is received as the output signal. The advantage of the synchronizing unit as described above is its simplicity and that the synchro¬ nizing signal available from the field effect transis¬ tor can be directly fed into a suitable logical circuit or the like, by means of which the moment of interrupt- ing the input current into the load during the half- cycle is controlled.

In one advantageous embodiment of the elec-

tronic power regulator the field effect transistors are of the n-type. The channel resistance of an on-turned field effect transistor of this type is usually smaller than that of other types of field effect transistors. A still further advantage of a power regulator according to the invention is that it requires very little space. The simple design causing the apparatus to be inexpensive is also an advantage. More, this kind of a power regulator is noiseless. In the following, the invention is described in more detail by way of reference to the following drawings, of which

Fig. 1 illustrates schematically an electronic power regulator according to the invention; Fig. 2 illustrates schematically another elec¬ tronic power regulator according to the invention;

Fig. 3 illustrates schematically the over-cur¬ rent protection in a power regulator as illustrated in fig. 2; Fig. 4 illustrates schematically the carrying out of synchronization in the power regulator as illustrated in fig. 2;

Fig. 5 illustrates voltage shapes in power regulators as illustrated in figs. 2, 3, 4; Fig. 6 illustrates schematically a third elec¬ tronic power regulator according to the invention; and Fig. 7 illustrates voltage shapes in the syn¬ chronization unit of an electronic power regulator as illustrated in fig. 6. Fig. 1 illustrates the principal scheme of an electronic power regulator according to the invention. The power regulator comprises a switching unit 1 and a control unit 2. The switching unit 1 has been connected in series with the load 3. By means of the power regu- lator it is possible to adjust the AC power from an AC power source 4, preferably an AC network, to suit the load 3 as desired.

According to the invention, the switching unit 1 comprises a plurality of pairs of field effect tran¬ sistors 5,6; 7,8; 9,10 so that the sources SI, S2 of each pair of transistors have been interconnected, the drains Dl of the first field effect transistors 5; 7; 9 of the pairs of field effect transistors are intercon¬ nected and connected further to the AC source 4, and the drains D2 of the second field effect transistors 6; 8; 10 of the pairs of field effect transistors are interconnected and connected further to the load 3. The gates Gl, G2 of both of the transistors of the pairs of transistors are connected to the control unit 2. Pref¬ erably the field effect transistors 5, 6; 7, 8; 9,10 are of the n-type. The switching unit 1 thus comprises a plurali¬ ty of pairs of field effect transistors 5,6; 7,8; 9,10 that have been connected so as to form a symmetrical unit both together and as separate pairs. The input current from the AC source traverses during both the negative and positive AC phase the channel of both of the field effect transistors of a pair of field effect transistors. Because of the symmetrical connection of the pairs of field effect transistors of the switching unit 1, the switching unit looks the same both when seen from the direction of the load 3 to the AC power source 4 as when seen from the AC power source to the load.

The switching unit 1 is controlled via the gates Gl, G2 of the pairs of field effect transistors. The pairs of transistors 5,6; 7,8; 9,10 are turned from off to on by means of the control unit 2, depending mainly on the properties of the load 3. When the tran¬ sistor is turned off, there is principally no current flowing through the channel of the field effect tran- sistor 5, 6, whereas an on-turned channel is open and the current can traverse the channel.

The switching unit 1 is controlled by means of

the control unit 2 synchronously with the zero points of the voltage acting over the switching unit 1. With a ' resistive load this is accomplished by starting the input of electric power to the load 3 at the starting moment, i.e. the zero point of the half-cycle of the voltage V (see fig. 5a) from a current source, such as the mains, and by cutting the input at a desired moment t of the half-cycle in input current (see fig. 5b). Thus, power is being fed into the load 3 during the time span 0 - t of the half-cycle of the input voltage V. The input current I k and the voltage V k across the load are acted on by adjusting the moment t, and there¬ by the total power fed into load 3 is controlled.

The input current I k passes in the switching unit 1 divided in the channels of each of the pairs of field effect transistors 5, 6; 7, 8; 9, 10 and its strength is I k /3 when the field effect transistors are turned on. Power losses are generated in each field effect transistor by the channel resistance R fe between the source S and drain D. With the most suitable n-type field effect transistors a typical value for the chan¬ nel resistance is between 0.5-0.05 Ω. Thus, when the input current I^is supposed to be 1A, the maximum power loss of the switching unit 1 can, in the embodiment of fig. 1, be calculated to be

.- =.3 ( * _^* ) ) 2 -^ (R.^+R.)) == _*_ • 2R k = - I±A- 2 • 2 • 0.5 Ω = 0.33F7

3 2 = 3

The power losses in known power regulators are clearly larger than this. At a minimum, they are of the order of 1-3W. Thus, the power losses generated by a power regulator according to the present invention are considerably smaller.

Fig. 2 illustrates another electronic power regulator according to the invention. An AC power source 4 feeds current into the load 3 via the power regulator. The switching unit 1 of the power regulator

is exemplified by means of one pair of field effect transistors 11, 12, even though the connecting unit comprises a plurality of pairs of field effect transis¬ tors, as was previously illustrated in fig. 1. A diode bridge 13 is arranged across the switching unit 1, two of the diodes of the diode bridge being body diodes of each pair of field effect transistors. 11, 12 and the other two diodes 16, 17 being separate diodes. The operating voltage of the control unit 2 is formed by means of the diode bridge 13, i.e. the control unit 2 is arranged between the terminals 18, 19 in the middle of the diode bridge. Thus, the potential of the control unit 2 is in connection with the voltage of the sources SI, S2 of the pairs of field effect transistors 11, 12. The control unit 2 is used to turn the pairs of field effect transistors 11, 12 simultaneously on and, ac¬ cordingly, off.

The control unit 2 of fig. 2 comprises a volt¬ age metering arrangement 20a, shown in fig. 3, for metering the voltage across the forward-biased group of field effect transistors 11, 12 of the switching unit 1. Preferably, the voltage metering arrangement 20a comprises a group of resistors 21a, 22a connected in series, that have been arranged in connection with each of the field effect transistors 11, 12.

Fig. 3 illustrates an over-current protection unit 23, in which the result from the voltage metering arrangement 20a is used for monitoring the current passing through the group of field effect transistors 11, 12 and for limiting over-current when the group of field effect transistors is turned on. In this case the over-current protection unit 23 comprises a field ef¬ fect transistor 24, to the gate G of which is fed the metering voltage from the voltage metering arrangement 20a for turning the field effect transistor 24 from off to on in case of a short circuit. The field effect transistor 24 is followed by a suitable circuit for

discharging the charges of the gates G of the pairs of field effect transistors 11, 12 and for turning them off.

The voltage metering arrangement 20b, such as a chain of resistors 21b, 22b, forming a part of the control unit 2, can also be used for controlling the synchronizing unit 25, as is illustrated in fig. 4. The voltage metering result is used for controlling the control unit for synchronization purposes when the group of field effect transistors 11, 12 is turned off. The synchronizing unit 25 comprises a field effect transistor 26, to the gate G of which is fed the meter¬ ing voltage from the voltage metering arrangement 20 for turning the field effect transistor from on to off. The drain 27 of the field effect transistor 26 then gives the synchronizing signal as output signal.

Fig. 5c illustrates the metering voltage from voltage metering arrangement 20a, 20b in proportion with the network voltage V and load voltage V k , respec- tively figs. 5a and 5b. The gate voltage curve for controlling the pairs of field effect transistors 11, 12 of the control unit 2 is illustrated in fig. 5d. Over-current protection metering is carried out when the grid voltage (fig. 5d) of the pairs of field effect transistors 11, 12 is at its maximum and the pairs of field effect transistors are turned on. In this case the network voltage V = load voltage V fc during the period 0 - t. The voltage metering B for synchroniza¬ tion is, in turn, carried out when the gate voltage (fig. 5d) of the pairs of field effect transistors is zero, i.e. the field effect transistors are turned off and the load voltage is, respectively, zero (fig. 5b). The over-current monitoring area A and synchronizing area B have been marked in the appended figures 5a-5d. Fig. 6 illustrates a power regulator according to the invention. The AC power source 4 is connected via the switching unit 1 and power switch 28 to load 3.

The switching unit comprises a plurality of pairs of field effect transistors 11, 12, as in the power regu¬ lator of figs. 1 and 2. The sources SI, S2 of the field effect transistors are connected together and to the ground. The drains Dl are connected together and so are, respectively, the drains D2. The gates G of the field effect transistors are connected to the gate control switch 30 via gate resistors 29. The switching of field effect transistors 11, 12 is delayed by means of gate resistors 29 in order to minimize any radio frequency interference.

The voltage metering arrangement 31 comprises resistors 32, 33 by means of which the voltage across the switching unit 1 is measured for carrying out the over-current protection of field effect transistors 11, 12, as is described in connection with fig. 3. The metering voltage is taken from between resistors 32, 33 to the field effect transistor 34. If the metering voltage is greater than the threshold voltage of the field effect transistor 33, the field effect transistor is turned on and the gates G of the pairs of field effect transistors 11, 12 are grounded via control circuit 35. Thereby the field effect transistors 11, 12 are turned off, i.e. flow of current from the AC power source 4 to load 3 is interrupted.

Diodes 36, 37 corresponding to the diodes 16, 17 of the power regulator in fig. 2 have been arranged across the switching unit 1. The diode bridge is formed by means of diodes 36, 37 and the body diodes of the field effect transistors of the pairs 11, 12 of field effect transistors. Voltage metering arrangement 38 has been arranged in connection with the diode bridge, the arrangement comprising a chain of resistors, in this case resistors 39, 40, 41. The metering voltage acting across the switching unit 1 is taken from the voltage metering arrangement 38 and further fed to a field effect transistor 42. The internal voltage in the

bridge formed by diodes 36, 37 and the body diodes of the pairs of field effect transistors 11, 12 is metered by means of this arrangement for synchronizing in ac¬ cordance with the principle described with fig. 4. When the metering voltage is smaller than the threshold voltage of the gate of the field effect transistor, the field effect transistor 42 is turned off and the volt¬ age of the drain of the field effect transistor rises to operation voltage V Q . Fig. 7 illustrates the voltage curve V G of the metering voltage to the gate of the field effect transistor, in fig. 7a, and the synchroni¬ zation signal V D from the drain in fig. 7b.

The synchronization signal from the field effect transistor 42 is fed into a triggering circuit 43 formed of gate circuits, the triggering circuit being also fed the output signal from the time t con¬ trol circuit 44. The signal from the triggering circuit 43 is further fed, amplified, to the common connecting point 30 of the gate resistors 29 for controlling the pairs of field effect transistors 11, 12 via their gates G.

The metering voltage to be fed to the field effect transistor from the voltage metering arrangement -31 is limited by means of a zener diode 45 (c.f. fig. 7a) . The diode 46 protects the field effect transistor 42. Diode 47 prevents the voltage metering of the over- current protection when the pairs 11, 12 of field ef¬ fect transistors have been turned off.

The power losses per field effect transistor of the switching unit of a power regulator according to the invention are clearly smaller than in previously known power regulators. It must be noted, that power regulators for light sources are in most cases in¬ stalled in a limited space, such as a light switch box. This means, that when a power regulator according to the invention is installed on a mechanical base plate fitting in a light switch box it is, due to the small

power losses, capable of regulating a large number of light sources, the total output of which can be, e.g., 2-3 kW.

The invention is not limited to the above- mentioned embodiments, but it can be modified in many ways within the scope of the invention, which is de¬ fined in the appended claims.