Title:
ELECTROSTATIC PROTECTION NETWORK FOR CHIP
Document Type and Number:
WIPO Patent Application WO/2023/279809
Kind Code:
A1
Abstract:
Provided in the present disclosure is an electrostatic protection network for a chip. The chip comprises a first power source pad, a second power source pad and a ground pad. The electrostatic protection network comprises a first electrostatic protection circuit, which is located between the first power source pad and the ground pad, and is used for discharging an electrostatic charge when an electrostatic pulse which is caused by the electrostatic charge is present on the first power source pad; a second electrostatic protection circuit, which is located between the second power source pad and the ground pad, and is used for discharging an electrostatic charge when an electrostatic pulse which is caused by the electrostatic charge is present on the second power source pad; and a third electrostatic protection circuit, which is located between the first power source pad and the second power source pad, and is used for providing a discharging path for an electrostatic charge between the first power source pad and the second power source pad. The present disclosure aims to improve the electrostatic protection capability of a chip.
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Inventors:
ZHU LING (CN)
TIAN KAI (CN)
TIAN KAI (CN)
Application Number:
PCT/CN2022/088746
Publication Date:
January 12, 2023
Filing Date:
April 24, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H02H9/04
Foreign References:
| CN112968437A | 2021-06-15 | |||
| CN112448378A | 2021-03-05 | |||
| CN101884103A | 2010-11-10 | |||
| CN105977938A | 2016-09-28 | |||
| US20080106834A1 | 2008-05-08 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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