FIELD OF THE INVENTION

[0001] This description relates generally to a method for enhancing the coherence of superconducting quantum bits (qubits) and a method for determining the optimization of the enhancement of coherence of superconducting quantum bits.

BACKGROUND

[0002] Superconducting integrated circuits have evolved into a powerful architecture for creating artificial quantum systems. In state-of-the-art experiments, tens of qubits are coherently operated as quantum simulators and universal processors while access to prototype devices is being offered via the cloud to accelerate the development of practical quantum algorithms. On the way forward, mitigating decoherence is one of the central challenges, because it hinders further up-scaling and implementation of quantum error correction.

[0003] Known processors typically employ transmon qubits that are based on the discrete energy levels in non-linear LC-resonators formed by capacitively shunted Josephson junctions. A large part of decoherence in such qubits is due to dielectric loss in the native surface oxides of the capacitor electrodes. This loss shows a remarkably structured frequency dependence which originates in the individual resonances of spurious atomic tunneling defects.

SUMMARY

[0004] Methods for enhancing the coherence of superconducting quantum bits (qubits) and for determining the optimization of the enhancement of coherence of superconducting quantum bits are disclosed. [0005] Especially a method for enhancing the coherence of superconducting quantum bits (qubits) is described comprising the following steps of providing at least one qubit electrode comprising detrimental defects and intrinsic qubit resonance and applying an intrinsic parameter of an electric field to the qubit electrode in order to tune the defects away from the qubit resonance.

[0006] In an embodiment, the method has been presented that extends the energy relaxation time Tl of superconducting transmon qubits. In this embodiment, the qubit electrodes may be exposed to a DC-electric field at which the most detrimental TLS-defects are tuned out of qubit resonance. Averaging over qubit working frequencies and a 30-minute time interval, the Tl-time was improved by at least 23% compared to zero applied electric field.

[0007] In an embodiment, the intrinsic parameter is the strength of the electric field.

[0008] In an embodiment, the detrimental defects are parasitic two-level quantum systems (TLS).

[0009] Especially, a method for determining the enhancement of coherence of superconducting quantum bits (qubits) is described, of which the method is comprising the following steps: a) providing at least one qubit electrode, wherein the qubit electrode comprising detrimental defects, and an intrinsic qubit energy relaxation time (Tl), and a qubit working frequency; and b) applying different values of an intrinsic parameter of an electric field to the qubit electrode; and c) determining the qubit energy relaxation time (Tl) over time for each of the different values.

[00010] In an embodiment, the steps are used at different qubit working frequencies for optimization.

[00011] In an embodiment, the electric field is a DC electrical field. [00012] In an embodiment, the method further comprising quantifying the enhancement of the coherence by determining the qubit energy relaxation time (Tl); and comparing the determined qubit energy relaxation time to the qubit energy relaxation time determined at zero applied electrical field.

[00013] In an embodiment, the quantification of enhancement was at least 23% of all determinations, i.e. all tested qubit resonance frequencies, preferably at least 20% of 46% determinations, or preferably at least 10% of 67% determinations

[00014] In an embodiment, the qubit energy relaxation time (Tl) is determined within a time frame of 30 mins. Depending on the strength of the electrical field applied different time frame are applicable, i.e. if the strength is higher the time frame might shorter.

[00015] These and other aspects, features, and implementations can be expressed as methods, apparatus, systems, components, program products, means or steps for performing a function, and in other ways.

[00016] These and other aspects, features, and implementations will become apparent from the following descriptions, including the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

[00017] FIG. la is a cross-section through the sample housing of an example of a qubit electrode.

[00018] FIG. lb is a photograph of XMon qubit samples used in accordance with one embodiment.

[00019] FIG. 1c is a plot of example measurements of a decaying qubit population after a long exciting microwave pulse (see inset) to determine the energy relaxation time (Tl).

[00020] FIG. Id is a plot that shows resonances of individual two-level quantum systems

(TLS). [00021] FIGs. 2a and 2b are a series of plots showing the benchmarking of an optimization algorithm.

[00022] FIG. 3a is a plot that shows qubit relaxation times Tl (qubit Tl) before and after E-field optimization.

[00023] FIG. 3b is a plot that shows the relative improvement of qubit Tl after optimization.

[00024] FIG. 3c is a plot that shows the temporal fluctuation strength of the qubits relaxation times (Tl).

[00025] FIG.4 is a schematic that shows the top view sketch of two example Xmon- qubits.

[00026] FIG 4 b is a schematic that shows the cross-section of an example flip-chip stack. [00027] FIG 4 c is a heat map that shows a simulated electric field strength used in an example flip chip stack.

DETAILED DESCRIPTION

[00028] In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, that the subject matter of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the subject matter of the present disclosure.

[00029] However, it should be understood by those skilled in the art that the specific ordering or arrangement of the schematic elements in the drawings is not meant to imply that a particular order or sequence of processing, or separation of processes, is required. Further, the inclusion of a schematic element in a drawing is not meant to imply that such element is required in all embodiments or that the features represented by such element may not be included in or combined with other elements in an embodiment.

[00030] Several features are described hereafter that can each be used independently of one another or with any combination of other features. However, any individual feature may not address any of the problems discussed above or might only address one of the problems discussed above. Some of the problems discussed above might not be fully addressed by any of the features described herein. Although headings are provided, information related to a particular heading, but not found in the section having that heading, may also be found elsewhere in this description. Embodiments are described herein according to the following outline:

1. Electric field tuning of TLS

2. Method for optimizing the qubit relaxation time Tl

3. Benchmarking the method of the optimization routine

4. Integration with quantum processors

5. Conclusions

Electric field tuning of TLS

[00031] The overall concept of the subject matter disclosed is providing a method for enhancing and a method for determining the enhancement of the coherence of qubits, in order to provide an optimization routine for determining the energy relaxation time (Tl). In order to enhance the coherence of a qubit, an electric field is applied to the qubit electrode in order to tune the influences of the detrimental defects of the qubit electrode away from the qubit resonance. By tuning away the defects from the qubit resonance the energy relaxation time (Tl) of the qubit increases, which enhances the coherence of the qubit significantly. This provides significant benefits in the applicability and reliability of the qubit in quantum computing operations.

[00032] For our experiments, a transmon qubit sample was fabricated in the so-called ‘X- Mon’ design following Barends et al. as shown in Fig. lb. It should be noted, that other qubit sample than transmon qubit are applicable. The electric field for TLS tuning was generated by a DC-electrode installed on the lid of the sample housing 0.9 mm above the qubit chip’s surface as illustrated in Fig. la. The electrode in this example was made from a copper foil that is insulated by Kapton foil from the housing. To improve E-field homogeneity in vicinity of the qubits, the electrode had a size that was comparable to the qubit chip.

[00033] The response of TLS to the applied electric field was observed by measuring the qubit energy relaxation time 1 as a function of qubit frequency, which shows Lorentzian minima whenever sufficiently strongly interacting TLS are tuned into resonance. A detailed view on the rich TLS spectrum as shown in Fig. Id was obtained using swap-spectroscopy. With this protocol, TLS were detected by the resonant reduction of the qubit’s excited state population after it was tuned for a fixed time interval to various probing frequencies. In the studied sample, only a single TLS was observed that did not couple to the applied E-field, indicating that it was likely residing in a tunnel barrier of the submicron-sized qubit junctions where no DC-electric field exists. This confirms that only a few resonant TLS are typically found in small area Josephson junctions, and dielectric loss is dominated by defects on the interfaces of the qubit electrodes. This is true as long as qubits are fabricated with methods that avoid the formation of large-area stray Josephson junctions which are known to contribute many additional defects.

[00034] In Fig. Id, some TLS were observed whose resonance frequencies show strong fluctuations or telegraphic switching due to their interaction with low-energy TLS that were thermally activated. TLS may also interact with classical bistable charge fluctuators that have a very small switching rate between their states. Since these fluctuators may also be tuned by the applied electric field, hysteresis effects may appear in electric field sweeps since the state of a fluctuator, and hereby the resonance frequency of a high-energy TLS, may depend on the history of applied E-fields. An example of such an interacting TLS -fluctuator system is marked by the circle in Fig. Id, where the resonance frequency of a TLS abruptly changed.

Method for optimizing the qubit relaxation time T1

[00035] As is evident from Fig. Id, at each qubit operation frequency there was a preferable electric field bias where most of the dominating TLS were tuned out of qubit resonance and the I time is maximized. In the following, a routine by which an optimal E- field bias can be automatically determined is described.

[00036] The method for determining the optimization comprises that the qubit 7'i-time is measured for a range of applied electric fields. Hereby, the 7’i-time is obtained from exponential fits to the decaying qubit population probability after it was excited by a microwave pulse, measured using the common protocol shown in the inset of Fig. 1c. Figure 2a shows the resulting electric field dependence of T\ (cross-shaped data points) over a range of applied voltage between -10 and 10 V, measured at various qubit resonance frequencies (rows I to III). These data are then smoothed by a nearest-neighbor average (black curve in FIG. 2a) to average out individual dips and peaks in order to amplify broader maxima that promise more stable improvements.

[00037] Next, the E-field is set to the value where the maximum 7’i-time occurred. For example, with respect to the measurements performed in FIG. 2a, the circles denote where the maximum Tl-time occurred. Hereby, it is recommended to approach the detected optimal E-field from the same value where the previous E-field sweep was started. This helps to avoid the mentioned hysteresis effects in the TLS resonance frequencies that may occur when they are coupled to meta-stable field-tunable TLS whose state depends on the history of applied E-fields. Finally, a second pass is performed, sweeping the E-field in finer steps around its previously determined optimum value until the obtained T time is close to the maximum value that was observed in the previous sweep. This ensures that hysteresis effects are better compensated and the finer step helps to avoid sharp dips that were not resolved in the first pass.

Benchmarking the method of the optimization routine

[00038] To test the efficiency of the optimization routine, first the qubit I was repeatedly observed during 30 minutes at zero applied electric field as a reference (black shaded data in Fig. 2b). Afterwards, the optimization routine was applied to search for the electric field which maximizes the qubit’s coherence time by taking data as shown in Fig. 2a. The result was then checked by monitoring the 7'i-time at the found optimal E-field during another 30 minutes (light shaded data in Fig. 2b). Evidently, during most of this time, acquired I times after optimization were higher than the reference values that were obtained at zero applied electric field.

[00039] To measure the average improvement of the optimization routine, the benchmarking protocol was repeated at various (in total 59) qubit resonance frequencies. Figures 3a and b summarize the absolute and relative improvement of the qubit 7’i-time at all investigated qubit resonance frequencies. In most cases (85%), the routine improved the 30- minute average qubit 7’i-time. The improvement was larger than 10% T\ for 67% of the different frequencies examined, and enhanced T\ by more than 20% for 46% of the different frequencies examined. Averaged over all tested qubit resonance frequencies, the I time improvement was » 23%. [00040] To check how much the optimization routine affects the temporal fluctuation strength of the qubit’s T time, the standard deviation of observed 1 times during the 30 minute intervals before and after optimization were compared. The result is shown in Figure 3c. In slightly more than half cases (59%), the I time fluctuations, i.e. standard deviations, increased after optimization. This might be mitigated by enhancing the optimization algorithm such that it prefers broader 7'i-time peaks which are less sensitive to TLS frequency fluctuations, and by including the 1 fluctuation strength at detected peaks as a criterion.

Method for optimizing the qubit relaxation time T1

[00041] When each qubit in a processor is coupled to a dedicated local gate electrode, the optimization routine can be applied simultaneously on all qubits. This tune-up process is facilitated when no cross-talk of a gate electrode to neighboring qubits occurs. Moreover, the generated electric field should be sufficiently strong all along the edges of the qubit island and the opposing ground plane so that all relevant TLS can be tuned by be is bigger or equal 100 MHz to decouple them from the qubit. Assuming a relatively small coupling TLS dipole moment component of/? = 0. 1 eA, this corresponds to required field strengths E = be/p = 40 kV/m. Given a typical distance between the DC-electrode and the qubit electrodes of below 1 mm, such E-fields are unproblematically obtained with a bias voltage of a few Volts on the DC-electrode.

[00042] Figure 4 shows a possible implementation of a gate electrode array 1200, which is located on a separate wiring chip that is bump-bonded to the chip carrying the qubits in a flipchip configuration. In Fig. 4a, a top view of two Xmon-type qubits is shown, where the gate electrode 1202 above the left qubit is indicated in orange. The electrode 1202 extends slightly over the edges of the qubit island’s opposing ground plane to ensure the tunability of TLS in this region. [00043] The cross section of the chip stack is sketched in Fig. 4b, showing that the gate electrodes 1202 are separated from the ground plane 1204 of the wiring chip 1200 by a thin film insulator.1206.

[00044] The simulated electric field strength in this region is drawn to-scale in Fig. 4c, for the case when the left electrode is biased at 1 V while other metallic parts (including the qubit island 1208) are kept at zero potential. The induced field strength decays on a length scale of roughly the distance between the two chips, given that qubits are surrounded by a ground plane 1204 and also the wiring chip has a ground plane. For a qubit-to-qubit separation of d > 100 //m as used in the shown simulation, we accordingly find the cross-talk to be below I ⁴ .

[00045] Alternatively, the local electrodes could also be placed on the backside of the qubit chip. In this case, the substrate thickness will determine the horizontal field screening length, and stronger cross-talk can be expected. However, finite element modeling (FEM) simulations of the induced E-fields in a given processor layout should allow one to sufficiently compensate for this cross-talk.

Conclusion

[00046] An experimental setup and an automatic routine is presented that extends the energy relaxation time I of superconducting transmon qubits. The idea is to expose the qubit electrodes to a DC-electric field at which the most detrimental TLS-defects are tuned out of qubit resonance. Averaging over qubit working frequencies and a 30-minute time interval (limited by time constraints), the 7'i-time was improved by 23% compared to zero applied electric field.

[00047] The benefit of the optimization may decrease or vanish with time due to TLS resonance frequency fluctuations. For example, the frequency shifts of TLS may remain smaller than 10 MHz for at least 10 days after application of the E-field, which is consistent with the notion that each TLS can only interact with a limited number of thermally active defects in its vicinity. Thus, the optimization routine may be further improved by repeatedly executing the optimization process over a course of several hours or days, in order to identify an electric field bias that protects the qubit on long timescales from interactions with strongly coupled TLS.

[00048] In further experiments, the optimization routine took less than 10 minutes (to acquire about 60 values of qubit 1 at several E-fields). However, the data shown in Fig. 2a suggests that the range of applied E-fields may be reduced, which together with further optimizations such as less averaging in individual 7'i-time measurements, may reduce the optimization time to below 2 or 3 minutes.

[00049] Analysis of the raw data such as shown in Fig. 2 suggests that variations of the algorithm described above may provide further stability in some circumstances. For example, in one variation it may be desirable to include width of a peak in 1 vs. E-field as a criterion next to the height of the peak. The skilled person will recognise that other variations and modifications may be applicable in specific circumstances. . Moreover, deterioration of the 30-minute average qubit 1 time by the optimization routine, as it occurred in a few (15%) cases in these tests, may be avoided by averaging over several E-field sweeps. This could better account for TLS showing strong resonance frequency fluctuations. Also, a feedback mechanism that regularly readjusts the E-field bias on the basis of qubit error rates obtained during quantum algorithms may be adopted.

[00050] The ability to tune TLS out of resonance with a qubit is especially beneficial for processors implementing fixed-frequency qubits. When tunable qubits are used, it is still necessary to mutually balance their individual resonance frequencies to avoid crosstalk and to maximize gate fidelities, and this will be greatly simplified if qubit coherence can be optimized at all frequencies by having independent control of the TLS bath. Also, to improve two-qubit gates that require qubit frequency excursions, one could adjust the optimization procedure to minimize the number of TLS that have resonances in the traversed frequency interval.

[00051] The simulations indicated that it is straight-forward to equip each qubit in a processor with local gate electrodes, which will allow one to simultaneously improve 1 of all qubits.

[00052] Implementations of the subject matter and operations described in this specification can be implemented in digital electronic circuitry, analog electronic circuitry, suitable quantum circuitry or, more generally, quantum computational systems, in tangibly- embodied software or firmware, in computer hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. The term “quantum computational systems” may include, but is not limited to, quantum computers, quantum information processing systems, quantum cryptography systems, or quantum simulators.

[00053] Implementations of the subject matter described in this specification can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a tangible non-transitory storage medium for execution by, or to control the operation of, data processing apparatus. The computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits, or a combination of one or more of them. Alternatively or in addition, the program instructions can be encoded on an artificially- generated propagated signal that is capable of encoding digital and/or quantum information, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode digital and/or quantum information for transmission to suitable receiver apparatus for execution by a data processing apparatus. [00054] The terms quantum information and quantum data refer to information or data that is carried by, held or stored in quantum systems, where the smallest non-trivial system is a qubit, i.e., a system that defines the unit of quantum information. It is understood that the term “qubit” encompasses all quantum systems that may be suitably approximated as a two- level system in the corresponding context. Such quantum systems may include multi-level systems, e.g., with two or more levels. By way of example, such systems can include atoms, electrons, photons, ions or superconducting qubits. In many implementations the computational basis states are identified with the ground and first excited states, however it is understood that other setups where the computational states are identified with higher level excited states are possible.

[00055] The apparatus can also be, or further include, special purpose logic circuitry, e.g., an FPGA (field programmable gate array), an ASIC (application-specific integrated circuit), or a quantum simulator, i.e., a quantum data processing apparatus that is designed to simulate or produce information about a specific quantum system. In particular, a quantum simulator is a special purpose quantum computer that does not have the capability to perform universal quantum computation. The apparatus can optionally include, in addition to hardware, code that creates an execution environment for digital and/or quantum computer programs, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[00056] A digital computer program, which may also be referred to or described as a program, software, a software application, a module, a software module, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to or described as a program, software, a software application, a module, a software module, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and translated into a suitable quantum programming language, or can be written in a quantum programming language, e.g., QCL or Quipper.

[00057] A computer program may, but need not, correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data, e.g., one or more scripts stored in a markup language document, in a single file dedicated to the program in question, or in multiple coordinated files, e.g., files that store one or more modules, subprograms, or portions of code. A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a digital and/or quantum data communication network. A quantum data communication network is understood to be a network that may transmit quantum data using quantum systems, e.g. qubits. Generally, a digital data communication network cannot transmit quantum data, however a quantum data communication network may transmit both quantum data and digital data.

[00058] For a system of one or more computers to be “configured to” perform particular operations or actions means that the system has installed on it software, firmware, hardware, or a combination of them that in operation cause the system to perform the operations or actions. For one or more computer programs to be configured to perform particular operations or actions means that the one or more programs include instructions that, when executed by data processing apparatus, cause the apparatus to perform the operations or actions. For example, a quantum computer may receive instructions from a digital computer that, when executed by the quantum computing apparatus, cause the apparatus to perform the operations or actions. [00059] Computers suitable for the execution of a computer program can be based on general or special purpose processors, or any other kind of central processing unit. Generally, a central processing unit will receive instructions and data from a read-only memory, a random access memory, or quantum systems suitable for transmitting quantum data, e.g. photons, or combinations thereof .

[00060] The elements of a computer include a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and digital, analog, and/or quantum data. The central processing unit and the memory can be supplemented by, or incorporated in, special purpose logic circuitry or quantum simulators. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, optical disks, or quantum systems suitable for storing quantum information. However, a computer need not have such devices.

[00061] Quantum circuit elements (also referred to as quantum computing circuit elements) include circuit elements for performing quantum processing operations. That is, the quantum circuit elements are configured to make use of quantum-mechanical phenomena, such as superposition and entanglement, to perform operations on data in a non-deterministic manner. Certain quantum circuit elements, such as qubits, can be configured to represent and operate on information in more than one state simultaneously. Examples of superconducting quantum circuit elements include circuit elements such as quantum LC oscillators, qubits (e.g., flux qubits, phase qubits, or charge qubits), and superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUID or DC-SQUID), among others.

[00062] In contrast, classical circuit elements generally process data in a deterministic manner. Classical circuit elements can be configured to collectively carry out instructions of a computer program by performing basic arithmetical, logical, and/or input/output operations on data, in which the data is represented in analog or digital form. In some implementations, classical circuit elements can be used to transmit data to and/or receive data from the quantum circuit elements through electrical or electromagnetic connections. Examples of classical circuit elements include circuit elements based on CMOS circuitry, rapid single flux quantum (RSFQ) devices, reciprocal quantum logic (RQL) devices and ERSFQ devices, which are an energy-efficient version of RSFQ that does not use bias resistors.

[00063] In certain cases, some or all of the quantum and/or classical circuit elements may be implemented using, e.g., superconducting quantum and/or classical circuit elements. Fabrication of the superconducting circuit elements can entail the deposition of one or more materials, such as superconductors, dielectrics and/or metals. Depending on the selected material, these materials can be deposited using deposition processes such as chemical vapor deposition, physical vapor deposition (e.g., evaporation or sputtering), or epitaxial techniques, among other deposition processes. Processes for fabricating circuit elements described herein can entail the removal of one or more materials from a device during fabrication. Depending on the material to be removed, the removal process can include, e.g., wet etching techniques, dry etching techniques, or lift-off processes. The materials forming the circuit elements described herein can be patterned using known lithographic techniques (e.g., photolithography or e-beam lithography).

[00064] During operation of a quantum computational system that uses superconducting quantum circuit elements and/or superconducting classical circuit elements, such as the circuit elements described herein, the superconducting circuit elements are cooled down within a cryostat to temperatures that allow a superconductor material to exhibit superconducting properties. A superconductor (alternatively superconducting) material can be understood as material that exhibits superconducting properties at or below a superconducting critical temperature. Examples of superconducting material include aluminum (superconductive critical temperature of 1.2 kelvin) and niobium (superconducting critical temperature of 9.3 kelvin). Accordingly, superconducting structures, such as superconducting traces and superconducting ground planes, are formed from material that exhibits superconducting properties at or below a superconducting critical temperature.

[00065] In certain implementations, control signals for the quantum circuit elements (e.g., qubits and qubit couplers) may be provided using classical circuit elements that are electrically and/or electromagnetically coupled to the quantum circuit elements. The control signals may be provided in digital and/or analog form.

[00066] Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile digital and/or quantum memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; CD-ROM and DVD-ROM disks; and quantum systems, e.g., trapped atoms or electrons. It is understood that quantum memories are devices that can store quantum data for a long time with high fidelity and efficiency, e.g., light-matter interfaces where light is used for transmission and matter for storing and preserving the quantum features of quantum data such as superposition or quantum coherence.

[00067] Control of the various systems described in this specification, or portions of them, can be implemented in a computer program product that includes instructions that are stored on one or more non-transitory machine-readable storage media, and that are executable on one or more processing devices. The systems described in this specification, or portions of them, can each be implemented as an apparatus, method, or system that may include one or more processing devices and memory to store executable instructions to perform the operations described in this specification. [00068] While this specification contains many specific implementation details, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to particular implementations. Certain features that are described in this specification in the context of separate implementations can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable sub-combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a sub-combination or variation of a sub-combination.

[00069] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system modules and components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[00070] Particular implementations of the subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As one example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.