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Patent Searching and Data


Title:
ERROR CORRECTION DECODING CIRCUIT AND OPTICAL RECEIVER
Document Type and Number:
WIPO Patent Application WO/2019/198127
Kind Code:
A1
Abstract:
An error correction decoding circuit according to the present invention is included in an optical transmission/reception system in which soft decision error correction codes are used, and is provided with a soft decision value adjustment circuit capable of adjusting a soft decision value to be input to the soft decision error correction decoding circuit, wherein the soft decision value adjustment circuit adjusts the soft decision value on the basis of an estimation result related to an amount of noise received in a transmission path or on the basis of an estimation result related to the performance of a received signal. As a result, the error correction performance can be improved as compared with the conventional technique.

Inventors:
ISHII, Kenji (7-3 Marunouchi 2-chome, Chiyoda-k, Tokyo 10, 〒1008310, JP)
Application Number:
JP2018/014909
Publication Date:
October 17, 2019
Filing Date:
April 09, 2018
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORPORATION (7-3 Marunouchi 2-chome, Chiyoda-ku Tokyo, 10, 〒1008310, JP)
International Classes:
H03M13/45; H04B10/69; H04L1/00
Foreign References:
JP2006165966A2006-06-22
JP2012151801A2012-08-09
JP2005033547A2005-02-03
JP2016192747A2016-11-10
Attorney, Agent or Firm:
SOGA, Michiharu et al. (S. Soga & Co, 8th Floor Kokusai Building, 1-1, Marunouchi 3-chome, Chiyoda-k, Tokyo 05, 〒1000005, JP)
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