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Patent Searching and Data


Title:
ESD PROTECTION DEVICE AND METHOD
Document Type and Number:
WIPO Patent Application WO/2011/090827
Kind Code:
A3
Abstract:
An electrostatic discharge (ESD) protection clamp (21, 21', 70, 700) for protecting associated devices or circuits (24), comprises a bipolar transistors (21, 21', 70, 700) in which doping of facing base (75) and collector (86) regions is arranged so that avalanche breakdown occurs preferentially within a portion (84, 85) of the base region (74, 75) of the device (70, 700) away from the overlying dielectric-semiconductor interface (791). Maximum variations (ΔVt1)MAX of ESD triggering voltage Vt1 as a function of base-collector spacing dimensions D due, for example, to different azimuthal orientations of transistors (21, 21', 70, 700) on a semiconductor die or wafer is much reduced. Triggering voltage consistency and manufacturing yield are improved.

Inventors:
GENDRON AMAURY (US)
GILL CHAI EAN (US)
HONG CHANGSOO (US)
Application Number:
PCT/US2011/020358
Publication Date:
October 20, 2011
Filing Date:
January 06, 2011
Export Citation:
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Assignee:
FREESCALE SEMICONDUCTOR INC (US)
GENDRON AMAURY (US)
GILL CHAI EAN (US)
HONG CHANGSOO (US)
International Classes:
H01L27/04; H01L21/822; H02H9/04
Foreign References:
US20090032814A12009-02-05
US20060091497A12006-05-04
US20070210419A12007-09-13
US20070181948A12007-08-09
US20090090972A12009-04-09
US20050207077A12005-09-22
Attorney, Agent or Firm:
WUAMETT, Jennifer et al. (Austin, Texas, US)
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