Technical Field

The present invention relates to estimating data symbols from a filter bank multicarrier (FBMC) signal. More particularly, the present invention relates to estimating transmitted data symbols by utilizing intrinsic interference as parity information.

Background of the Invention

Orthogonal frequency division multiplexing (OFDM) is a multicarrier technique employed in several wireless standards due to its robustness in combatting multipath fading channels. By dividing a wideband fading channel into a parallel of flat narrowband channels, OFDM is able to mitigate the harmful effects of multipath fading. However, this property is achieved by extending the length of the OFDM symbol and introducing a cyclic prefix (CP). This part of the OFDM symbol contains redundant information and results in a reduced spectral efficiency and increased power consumption.

To address the drawbacks associated with the introduction of a CP, alternative approaches have been developed in which pulse shaping filters are used to maintain orthogonality. The pulse shape is carefully designed to give good time and frequency localisation (TFL) properties. The localisation in time aims to limit inter-symbol interference (ISI) and the localisation in frequency aims to limit inter-carrier interference (ICI) caused by, e.g., Doppler effects and carrier frequency offset. The isotropic orthogonal transform algorithm (IOTA) function has the same shape in time and frequency domains, and offers optimal localisation properties among existing pulse shapes.

An example of a filter bank multicarrier (FBMC) transmitter configured to apply IOTA pulse shaping (FBMC-IOTA) is schematically illustrated in Fig. 1. The input data is serial-to-parallel converted, and the real (Re) and imaginary (Im) parts of each subcarrier signal are passed through IOTA pulse shaping filters 102, 104.

FBMC-IOTA systems provide orthogonality in the real domain, therefore, instead of using complex baseband symbols as in OFDM schemes, real valued symbols modulated by offset quadrature amplitude modulation (OQAM) are transmitted on each sub- carrier. FBMC-IOTA systems have been shown to outperform conventional OFDM systems in a realistic mobile communication context, in both time and frequency dispersive channels. However, despite the performance gains offered by FBMC-IOTA systems, further improvements would still be desirable.

Additionally, in a conventional FBMC transmitter, such as the one shown in Fig. l, the filter overlapping factor K is typically selected from the range 4~6 to achieve a balance between overhead and performance. The output of the filter is longer than the input signal by K-i symbols, i.e. 3~5 symbols longer than the input signal when K is selected from the range 4~6. For example, if an input signal containing M=5 symbols is passed through a prototype filter of length K=6, the filtered signal at the output of the FBMC filter bank would have a total length of 5 + (6-1) = 10 symbols, equating to a system overhead of 100%. To reduce the overhead and improve the spectrum efficiency of the system, the edge symbols of the filter output are normally discarded in a process referred to as 'tail cutting'. In the example with M=5 and K=6, two symbols at each edge are discarded during tail cutting, leaving one symbol as redundancy. This equates to an overhead of 20%. Whilst this is an improvement over the previous overhead figure of 100%, further reductions in the overhead would be desirable.

The invention is made in this context. Summary of the Invention

According to a first aspect of the present invention, there is provided a method of estimating transmitted data symbols from a received FBMC signal, the method comprising: obtaining a plurality of intrinsic interference symbols and a plurality of received data symbols from the received FBMC signal; obtaining, for each one of the intrinsic interference symbols, a corresponding estimated parity symbol based on one or more of the received data symbols; and estimating the transmitted data symbols by identifying a set of data symbols which provide a closer match between the intrinsic interference symbols and estimated parity symbols obtained based on the estimated transmitted data symbols, relative to a match between the intrinsic interference symbols and the estimated parity symbols obtained based on the received data symbols.

Obtaining a corresponding estimated parity symbol for one of the intrinsic interference symbols can comprise: obtaining a weighting matrix comprising a plurality of weighting factors relating to a weighting between said one of the intrinsic interference symbols and a plurality of data symbols; and multiplying the received data symbols or the estimated transmitted data symbols by the weighting matrix to obtain the estimated parity symbol. In some embodiment, ones of the weighting factors with magnitudes below a threshold limit are set to zero in the weighting matrix.

The weighting matrix can be generated by calculating a plurality of weighting factors for one of the intrinsic interference symbols, and adjusting the calculated weighting factors by determining, for each calculated weighting factor, whether a magnitude of the weighting factor is below the threshold limit, and setting the weighting factor to zero if the magnitude is below the threshold limit. The adjusted weighting factors can be stored in a weighting matrix for later retrieval.

The received FBMC signal can be filtered by a filter bank before obtaining the plurality of intrinsic interference symbols and the plurality of received data symbols, and obtaining the weighting matrix can comprise: determining a current configuration of the filter bank; and retrieving a stored weighting matrix associated with the current filter bank configuration. The method can further comprise selecting the data symbols to be estimated by:

comparing each intrinsic interference symbol to the corresponding one of the estimated parity symbols, to identify correct parity symbols among the estimated parity symbols; for each correct parity symbol among the estimated parity symbols, determining that any data symbols related to the correct parity symbol by the weighting matrix are correct; and selecting any data symbol not determined to be correct as a data symbol to be estimated.

Estimating the transmitted data symbols can comprise iteratively applying a message passing algorithm to obtain the estimated transmitted data symbols. In some embodiments, a predetermined number of iterations of the message passing algorithm are performed, for example six iterations. The message passing algorithm can be configured by defining a plurality of hidden variable nodes each corresponding to one of the selected transmitted data symbols, defining a plurality of observed variable nodes each corresponding to one of the estimated parity symbols, and defining connections between the hidden variable nodes and the observed variable nodes based on the plurality of weighting factors. According to a second aspect of the present invention, there is provided a computer- readable storage medium arranged to store computer program instructions which, when executed, perform any of the methods disclosed herein.

According to a third aspect of the present invention, there is provided apparatus for estimating transmitted data symbols from a received FBMC signal, the apparatus comprising: equalizing means configured to obtain a plurality of intrinsic interference symbols and a plurality of received data symbols from the received FBMC signal; and a data symbol estimator configured to obtain, for each one of the intrinsic interference symbols, a corresponding estimated parity symbol based on one or more of the received data symbols, and to estimate the transmitted data symbols by identifying a set of data symbols which provide a closer match between the intrinsic interference symbols and estimated parity symbols obtained based on the estimated transmitted data symbols, relative to a match between the intrinsic interference symbols and the estimated parity symbols obtained based on the received data symbols.

The data symbol estimator can comprise a parity symbol estimator configured to obtain a weighting matrix comprising a plurality of weighting factors relating to a weighting between said one of the intrinsic interference symbols and a plurality of data symbols, and multiply the received data symbols or the estimated transmitted data symbols by the weighting matrix to obtain the estimated parity symbol.

In some embodiments, ones of the weighting factors with magnitudes below a threshold limit are set to zero in the weighting matrix.

The received FBMC signal can be filtered by a filter bank before being equalized by the equalizing means, and the apparatus can further comprise a storage access unit configured to retrieve a plurality of stored weighting matrices each associated with a different configuration of the filter bank, wherein the parity symbol estimator can be configured to obtain the weighting matrix by determining a current configuration of the filter bank and retrieve the stored weighting matrix associated with the current filter bank configuration via the storage access unit.

The data symbol estimator can comprise a parity checking unit configured to select the transmitted data symbols to be estimated by comparing each intrinsic interference symbol to the corresponding one of the estimated parity symbols, to identify correct parity symbols among the estimated parity symbols, determining that any data symbols related to a correct parity symbol by the weighting matrix are correct, for each correct parity symbol among the estimated parity symbols, and selecting any data symbol not determined to be correct as a data symbol to be estimated.

The data symbol estimator can be configured to iteratively apply a message passing algorithm to obtain the estimated transmitted data symbols. In some embodiments, the data symbol estimator is configured to perform a predetermined number of iterations of the message passing algorithm, for example six iterations.

The data symbol estimator can be arranged to configure the message passing algorithm by defining a plurality of hidden variable nodes each corresponding to one of the selected transmitted data symbols, defining a plurality of observed variable nodes each corresponding to one of the estimated parity symbols, and defining connections between the hidden variable nodes and the observed variable nodes based on the plurality of weighting factors.

According to a fourth aspect of the present invention, there is provided a method of receiving an FBMC signal comprising: removing a cyclic prefix from the received FBMC signal; applying FBMC filtering to the FBMC signal after cyclic prefix removal, by performing a circular convolution with a filter function in the time domain; and transforming the FBMC filtered signal from the time domain to the frequency domain.

In some embodiments a method according to the fourth aspect may be combined with a method according to the first aspect, wherein the transformed FBMC filtered signal is equalized to obtain the plurality of intrinsic interference symbols and the plurality of received data symbols.

According to a fifth aspect of the present invention, there is provided apparatus for receiving a FBMC signal, the apparatus comprising: a cyclic prefix removing unit configured to remove a cyclic prefix from the received FBMC signal; a FBMC filter bank configured to apply FBMC filtering to the FBMC signal after cyclic prefix removal, by performing a circular convolution with a filter function in the time domain; and a domain transforming unit configured to transform the FBMC filtered signal from the time domain to the frequency domain. In some embodiments, apparatus according to the fifth aspect maybe combined with apparatus according to the third aspect, wherein the equalizing means is configured to equalize the transformed FBMC filtered signal to obtain the plurality of intrinsic interference symbols and the plurality of received data symbols. According to a sixth aspect of the present invention, there is provided a method of transmitting a Filter Bank Multicarrier FBMC signal, the method comprising:

generating in-phase and quadrature signals for data to be transmitted; transforming the in-phase and quadrature signals from the frequency domain to the time domain; obtaining in-phase and quadrature signals FBMC filtered signals by applying FBMC filtering to the time-domain in-phase and quadrature signals by performing a circular convolution with a filter function; adding a cyclic prefix to the FBMC filtered signals to obtain an FBMC transmit signal; and transmitting the FBMC transmit signal. In some embodiments, the cyclic prefix can have a length equal to the length of the current channel.

According to a seventh aspect of the present invention, there is provided apparatus for transmitting a Filter Bank Multicarrier FBMC signal, the apparatus comprising: a signal generating unit configured to receive data to be transmitted and output in-phase and quadrature signals; a domain transforming unit configured to transform the in- phase and quadrature signals from the frequency domain to the time domain; a FBMC filter bank configured to obtain in-phase and quadrature signals FBMC filtered signals by applying FBMC filtering to the time-domain in-phase and quadrature signals by performing a circular convolution with a filter function; a cyclic prefix adding unit configured to add a cyclic prefix to the FBMC filtered signals to obtain an FBMC transmit signal; and an output configured to transmit the FBMC transmit signal via one or more antennas.

Brief Description of the Drawings

Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

Figure 1 schematically illustrates a FBMC-IOTA transmitter;

Figure 2 schematically illustrates a FBMC-IOTA receiver, according to an embodiment of the present invention;

Figure 3 is a flowchart showing a method of estimating data symbols obtained from a FBMC-IOTA signal, according to an embodiment of the present invention; Figure 4 is a bipartite factor graph illustrating weighting factors for a single parity symbol, according to an embodiment of the present invention;

Figure 5 is a flowchart showing a method of generating weighting matrices for different filter configurations, according to an embodiment of the present invention;

Figure 6 is a flowchart showing a method of estimating a parity symbol using a weighting matrix, according to an embodiment of the present invention;

Figure 7 is a flowchart showing a method of selecting data symbols to be estimated using a message passing algorithm, according to an embodiment of the present invention;

Figure 8 illustrates a bipartite factor graph of a message passing algorithm for use in estimating transmitted data symbols, according to an embodiment of the present invention;

Figure 9 schematically illustrates a data symbol estimating unit for use in an FBMC- IOTA receiver, according to an embodiment of the present invention;

Figure 10 is a graph illustrating an improvement in bit error rate (BER) when intrinsic interference is utilized as parity information, according to an embodiment of the present invention;

Figure 11 schematically illustrates a FBMC transmitter configured to apply circular convolution and a cyclic prefix, according to an embodiment of the present invention; Figure 12 schematically illustrates a FBMC receiver configured to remove a cyclic prefix and apply circular convolution, according to an embodiment of the present invention;

Figure 13 is a graph illustrating the system performance in terms of bit error rate (BER) when circular convolution and a cyclic prefix are applied in an FBMC system, according to an embodiment of the present invention;

Figure 14 is a flowchart showing a method of transmitting a FBMC signal, according to an embodiment of the present invention; and

Figure 15 is a flowchart showing a method of receiving a FBMC signal, according to an embodiment of the present invention. Detailed Description

Referring now to Fig. 2, apparatus for receiving a Filter Bank Multicarrier Isotropic Orthogonal Transform Algorithm (FBMC-IOTA) signal is schematically illustrated, according to an embodiment of the present invention. The received signal samples undergo serial-to-parallel (S/P) conversion, and symbols allocated to different subcarriers are then processed in parallel on real (Re) and Imaginary (Im) branches as shown in Fig. 2. The apparatus comprises a filter bank including first and second IOTA pulse shaping filters 202, 204. Although an IOTA pulse shape is used in the present embodiment, in other embodiments of the invention a different pulse shape may be applied. The filtered data stream is then Fourier transformed and equalized, as in a conventional FBMC-IOTA receiver. The apparatus further comprises means for equalizing the received FBMC-IOTA signal. In the present embodiment, the means for equalizing includes a first equalizer 206 and a second equalizer 208 on each of the m processing branches. The first equalizer 206 is configured to equalize the real component of the data stream received on the m ^th subcarrier and output a real component of the data symbol transmitted on the m* subcarrier. The second equalizer 208 is configured to equalize the imaginary component of the data stream received on the m* subcarrier and output an imaginary component of the data symbol transmitted on the m* subcarrier. The real component is sometimes referred to as the in-phase component, and the imaginary component is sometimes referred to as the quadrature component.

In addition, as a result of filtering the received FBMC signal in the filter bank, the output of the first equalizer 206 includes an unwanted imaginary component, and the output of the second equalizer 208 includes an unwanted real component. These are referred to as 'intrinsic interference'. In a conventional FBMC receiver the real component of the output of the first equalizer 206 and the imaginary component of the output of the second equalizer 208 are used for demodulation, and the intrinsic interference is discarded. In contrast, in embodiments of the present invention the intrinsic interference is utilized as a form of parity information, to obtain a more accurate estimate of the transmitted data symbols, instead of being discarded. In the present embodiment, the apparatus further comprises a data symbol estimating unit 210 configured to receive the intrinsic interference from each of the m branches as a plurality of parity symbols Pn,m. The data symbol estimating unit 210 is configured to estimate the transmitted data symbols by identifying a set of data symbols which provide a closer match between the intrinsic interference symbols and estimated parity symbols obtained based on the estimated transmitted data symbols. The following notation is hereinafter used when referring to the intrinsic interference: Imaginary output of first equalizer = p _m Real output of second equalizer = p [ _m

Intrinsic interference symbol = P _{n m} = p _n ^R _m + jp _n ' _m Estimated parity symbol = P _{n m}

Here, the subscript n denotes the time index, the subscript m denotes the subcarrier index, andj denotes the imaginary unit V(-i). That is, the parity symbol P _n ,m denotes the intrinsic interference received on the m* branch at time index n. Similarly, the wanted data is hereinafter denoted using the following notation:

Real output of first equalizer = a _n ^R _m

Imaginary output of second equalizer = a _m Observed data symbol = a„ _m = a ^R + )a _m

Estimate of transmitted data symbol = a _{n m}

A data symbol that is obtained directly from the equalizer outputs can be referred to as an Observed', or 'received', data symbol (a„, _m ), as distinct from an estimated

transmitted data symbol (a„, _m ). Figure 3 is a flowchart showing a method performed by the apparatus of Fig. 2, to obtain an improved estimate of the transmitted data symbols by using intrinsic interference as parity information. First, in step S301 the apparatus obtains intrinsic interference symbols and data symbols by equalizing the real and imaginary

components received on each subcarrier in the FBMC-IOTA signal, and combining the real and imaginary components as shown in Fig. 2. Specifically, the apparatus is configured to obtain an observed data symbol for the m ^th subcarrier at time index n (a„,m) by multiplying the imaginary output of the second equalizer 208 by the imaginary unit j, and combining with the real output of the first equalizer 206. Similarly, the parity symbol for the m* subcarrier at time index n (P _n ,m) is obtained by multiplying the imaginary output of the first equalizer 206 by the imaginary unit j, and combining with the real output of the second equalizer 208. Then, in step S302 the symbol estimating unit 210 obtains a corresponding estimated parity symbol for each one of the parity symbols. The estimated parity symbols are obtained based on information about a relationship between the transmitted data symbols and the intrinsic interference, using the received data symbols as an initial estimate of the transmitted data symbols. In the present embodiment, the data symbols are multiplied by a weighting matrix to obtain an estimated parity symbol. The weighting matrix includes a plurality of weighting factors, each of which describes the influence of a particular one of the data symbols a _n ,m on the parity symbol P _n ,m being estimated. Figure 4 schematically illustrates the weighting factors 403 which relate a plurality of data symbols 401 to one parity symbol 402. A method for obtaining the estimated parity symbols is described in more detail later with reference to Figs. 6 and 7.

Although in the present embodiment the receiver uses a weighting matrix to derive the estimated parity symbols, in other embodiments of the invention a different approach can be taken. For example, when the constellation size is small, a set of parity symbols corresponding to each possible combination of received data symbols can be calculated and stored in advance, during set-up and configuration of the system. The appropriate pre-calculated parity symbols can then be retrieved and used as the estimated parity symbols, instead of dynamically calculating the estimated parity symbols.

After obtaining the estimated parity symbols, in step S303 the symbol estimating unit 210 proceeds to estimate the transmitted data symbols by identifying a set of data symbols which provide a closer match between the intrinsic interference symbols and estimated parity symbols obtained based on the estimated transmitted data symbols, relative to a match between the intrinsic interference symbols and the estimated parity symbols obtained based on the received data symbols. The estimated transmitted data symbols can then be outputted to a decoder in step S304. By using a method such as the one shown in Fig. 3, embodiments of the invention are able to utilize intrinsic interference as parity information to improve an estimate of the transmitted data symbols, by searching for values of the transmitted data symbols that give a better fit between the estimated parity symbols and the observed intrinsic interference symbols. A particular advantage of this method is that no additional parity information needs to be transmitted, since intrinsic interference is an inherent feature of any FBMC signal. Embodiments of the present invention can therefore provide a more accurate estimate of the transmitted data symbols at a receiver, without any additional cost in terms of spectral efficiency.

As described above, the intrinsic interference in an equalized FBMC signal arises because of the use of filter banks to filter the transmitted signal. In some

embodiments, the pulse shape applied by the filter bank, for example an IOTA pulse shape, can be modified according to current channel conditions by changing the configuration of the IOTA pulse shaping filters at the transmitter and receiver. For example, a low-mobility scenario may require a different filter configuration to a high- mobility scenario. The weighting factor between a data symbol and a parity symbol can depend on the current filter configuration, and a mechanism can be provided for the transmitter to signal to the receiver which filter configuration is currently in use.

Referring now to Fig. 5, a flowchart showing a method of generating weighting matrices for different filter configurations is illustrated, according to an embodiment of the present invention.

First, in step S501 a first filter configuration is selected for processing. In step S502, the weighting factors for each intrinsic interference symbol P _n ,m are calculated for the selected filter configuration. The weighting factors can be calculated according to the ambiguity function of the selected pulse shaping filter and the filter configuration.

Then, in step S503, the weighting factors are adjusted by determining whether each weighting factor is below a threshold limit, and setting to zero any weighting factors that are below the threshold limit. For example, if the threshold limit is 0.02 and a particular weighting factor is calculated to be 0.011, that weighting factor will be set to zero in step S503. The adjusted weighing factors for a particular parity symbol are then stored in a weighting matrix for that parity symbol in step S504. However, in other embodiments, step S503 may be omitted and the calculated weighting factors may be stored as a weighting matrix in step S504 without prior adjustment.

In step S505, if weighting factors still need to be calculated for any other configurations of the IOTA pulse shaping filter, then another filter configuration is selected in step S506 and the process is repeated. Once all filter configurations have been analysed, the process is complete. The weighting matrices for each filter configuration can be stored in a Look-Up Table (LUT). By setting any weighting factors below the threshold limit to zero, a more efficient weighting matrix is obtained. When the data symbols are multiplied by the efficient weighting matrix, any data symbols for which the corresponding weighting factor is set to zero are, in effect, excluded from the calculation. The use of efficient weighting matrices can therefore reduce the processing time required to calculate the estimated parity symbols. At the same time, the accuracy of the estimated parity symbols is preserved since a data symbol will only be disregarded if the associated weighting factor is very small (below the threshold limit), meaning that the data symbol would only have a negligible influence on the calculated value of the parity symbol.

In the present embodiment the threshold limit is set to 0.025, meaning that any weighting factor with a magnitude of less than 0.025 will be set to zero. However, in other embodiments a different value may be set for the threshold limit. Setting a higher threshold limit will result in more of the weighting factors being set to zero, and therefore reduce the processing burden. Setting a lower threshold limit will result in fewer weighting factors being set to zero, improving accuracy but at the expense of additional processing time. In any particular embodiment, the threshold limit can be set in consideration of the available processing resources at the receiver, to ensure that the estimated parity symbols can be obtained in timely fashion at an appropriate level of accuracy.

Referring now to Fig. 6, a flowchart showing a method of estimating a parity symbol using a weighting matrix is illustrated, according to an embodiment of the present invention. The method can be implemented in embodiments in which weighting matrices for use in calculating parity symbols have been generated in advance for different filter configurations, for example using the method shown in Fig. 5.

First, in step S601 the apparatus checks the current configuration of the IOTA pulse shaping filter. Then, in step S602 the apparatus retrieves a stored weighting matrix associated with the current filter configuration, and multiplies the data symbols by the weighting matrix in step S603 to obtain the estimated parity symbol. Steps S602 and S603 can be repeated as necessary to obtain the remaining estimated parity symbols.

As described above, an FBMC-IOTA receiver can utilise intrinsic interference as parity information to improve an estimate of the transmitted data symbols. In some embodiments, the processing cost of estimating the transmitted data symbols based on the intrinsic interference can be reduced by only selecting data symbols that are determined to be in error, when attempting to obtain an improved estimate of the transmitted data symbols. A method of selecting data symbols to be estimated will now be described with reference to Figs. 7 and 8.

Figure 7 is a flowchart showing a method of selecting data symbols to be estimated using a message passing algorithm, according to an embodiment of the present invention. The method can be performed by the data symbol estimator shown in Fig. 2, to identify correct data symbols among the observed data symbols outputted by the first and second equalizers. The method is performed after the estimated parity symbols have been obtained based on the received data symbols.

First, in step S701 an intrinsic interference symbol is compared to the corresponding one of the estimated parity symbols. In step S702, it is checked whether the estimated parity symbol matches the intrinsic interference symbol. Depending on the

embodiment, a match may be identified in step S702 if the intrinsic interference symbol and the corresponding estimated parity symbol are identical, or if there is an approximate match to within a threshold level of accuracy. In the present embodiment the intrinsic interference symbol is determined to match the estimated parity symbol if the values match to within 1 %. If the estimated parity symbol matches the intrinsic interference symbol, then the estimated parity symbol can be determined as being correct.

If the estimated parity symbol matches the corresponding intrinsic interference symbol, then it can be assumed that any received data symbols related to the estimated parity symbol by the weighting matrix are also correct. By 'related to an estimated parity symbol', it is meant that the received data symbol was used to calculate the estimated parity symbol. In the present embodiment, a data symbol is related to an estimated parity symbol if it has a non-zero weighting factor in the weighting matrix for that parity symbol. In step S703, the data symbol estimator flags any received data symbols that are related to the current estimated parity symbol as 'correct'.

In step S704, the process of comparing estimated parity symbols and corresponding intrinsic interference symbols, and flagging correct data symbols, is repeated until all of the estimated parity symbols have been compared. Next, in step S705 any received data symbols that have not been flagged as 'correct' are determined to be data symbols in error, and are selected for estimation using a message passing algorithm. Then, in step S706 the message passing algorithm is iteratively applied to obtain an improved estimate of the data symbols in error. Figure 8 illustrates a bipartite factor graph of a message passing algorithm for use in estimating transmitted data symbols. In a message passing algorithm, messages containing information about the probable values of nodes are passed between nodes for which values are known, referred to as Observed variable nodes', and nodes for which values are unknown, referred to as 'hidden variable nodes'. The connections between observed variable nodes and hidden variable nodes are commonly referred to as 'edges'. Message passing algorithms are well understood in the art, and a detailed description will not be provided here so as not to obscure the present inventive concept.

In the present embodiment, only the selected data symbols are analysed by the message passing algorithm, that is, only the data symbols in error are analysed. By excluding correct data symbols from the message passing algorithm, the time taken for each iteration is reduced. In the present embodiment, the message passing algorithm is configured by defining a plurality of hidden variable nodes 801a each corresponding to one of the selected transmitted data symbols, defining a plurality of observed variable nodes 802a each corresponding to one of the estimated parity symbols, and defining connections between the hidden variable nodes and the observed variable nodes based on the plurality of weighting factors 803a. However, in other embodiments all of the received data symbols could be included in the message passing algorithm. In the present embodiment, individual maximum a posteriori (MAP) is applied together with the message passing algorithm, to find source symbols (the transmitted data symbols) that give the minimum error between the estimated parity symbols and the received intrinsic interference. The message passing algorithm provides an efficient method of arriving at a more accurate estimate of the data symbols in error.

Investigations by the inventors have shown after that the solution rapidly converges after as few as six iterations.

In some embodiments, a predetermined number of iterations of the message passing algorithm may be performed before terminating the message passing algorithm. For example, only 6 iterations may be required to obtain a significant improvement in the accuracy of the estimated transmitted data symbols. Alternatively, the system may check the current estimated values after each iteration to determine whether a further iteration is required. For example, after each iteration, updated estimates of the parity symbols can be obtained based on the current estimates of the transmitted data symbols, and the updated estimates can be compared to the intrinsic interference symbols to determine whether a satisfactory match has been obtained. The message passing algorithm can be terminated once a sufficiently close match is obtained between the estimated parity symbols and the intrinsic interference symbols, indicating that the estimated transmitted data symbols are a close match to the actual data symbols that were transmitted. As a further alternative, the estimated transmitted data symbols obtained after each iteration can be compared to those obtained in the previous iteration, and the message passing algorithm can be terminated once the estimated data symbols are observed to be relatively stable from one iteration to the next. Finally, for FBMC-IOTA systems with channel coding, e.g. using a Low Density Parity Check (LDPC) code, it is possible to terminate the iterative process by syndrome computing, in which case the message passing algorithm is terminated immediately if the syndrome equals to zero.

Referring now to Fig. 9 a data symbol estimating unit for use in an FBMC-IOTA receiver is schematically illustrated, according to an embodiment of the present invention. Depending on the embodiment, the data symbol estimator 910 can be implemented using dedicated hardware, software instructions, or a combination of both. The data symbol estimator 910 comprises a parity symbol estimator 902, storage access unit 904, parity checking unit 906 and message passing algorithm 908. The parity symbol estimator 902 is configured to retrieve a weighting matrix from a storage unit 920 via the storage access unit 904. The storage unit 920 may be local to the FBMC-IOTA receiver, or may be a form of remote storage, for example cloud-based storage accessed over a network connection. The parity symbol estimator 902 is configured to receive the data symbols a _n ,m from the equalizing means, and multiply the received data symbols by a weighting matrix to obtain an estimated parity symbol. The parity symbol estimator 902 can also update the estimated parity symbols based on estimated values of the transmitted data symbols received from the message passing algorithm, to check the accuracy of the estimated transmitted data symbols. The parity checking unit 906 is configured to receive the estimated parity symbols from the parity symbol estimating unit 902, and to receive the intrinsic interference symbols from the equalizing means. The parity checking unit 906 is further configured to select the transmitted data symbols to be estimated using a method such as the one described above with reference to Fig. 7, by identifying which received data symbols are correct and which received data symbols are in error. The data symbols in error, <a _err >, are outputted to the message passing algorithm 908 to obtain more accurate estimates of the data symbols in error. The improved estimates are then outputted together with the received data symbols determined to be correct, <a _cor >, as the final estimated transmitted data symbols -η,τη· Embodiments of the invention have been described in which intrinsic interference is utilized as parity information, to obtain a more accurate estimate of the transmitted data symbols. Figure 10 is a graph illustrating an improvement in bit error rate (BER) when intrinsic interferences is utilized as parity information, according to an embodiment of the present invention. The data plotted in Fig. 10 are simulation results carried out for an un-coded system with FFT size of 64, and a 3-tap Stanford University Interim (SUI)-3 channel. A quadrature phase shift keying (QPSK) modulation scheme is used for the OFDM simulation, and an offset QPSK (OQPSK) modulation scheme is used for the FBMC-IOTA simulations. The BER for the FBMC-IOTA system with intrinsic interference utilization is plotted after six iterations of the message passing algorithm have been performed. As shown in Fig. 10, for a given energy per bit to noise power spectral density ratio (Eb/N ₀ ), the BER is reduced when the intrinsic interference is utilized as parity information, as in the methods described herein.

Referring now to Fig. 11, a FBMC transmitter configured to apply circular convolution and a cyclic prefix is schematically illustrated, according to an embodiment of the present invention. A method performed by the FBMC transmitter of Fig. 11 is illustrated in Fig. 14.

First, in step S1401 in-phase and quadrature signals for data to be transmitted are generated by a signal generating unit 1101. Then, in step S1402 the in-phase and quadrature signals are transformed from the frequency domain to the time domain by a domain transforming unit 1102. In the present embodiment the domain transforming unit 1102 is configured to apply an Inverse Fast Fourier Transform (IFFT), however, other types of frequency-to-time domain transformations maybe used in other embodiments. Next, in step S1403 a FBMC filter bank 1103 obtains in-phase and quadrature signals FBMC filtered signals by applying FBMC filtering to the time-domain in-phase and quadrature signals. In the present embodiment, the filters 1102, 1104 of the FBMC filter bank are configured to perform a circular convolution with a filter function in the frequency domain, instead of a conventional linear convolution between the signal and the prototype filters G(n), G(n-iV/2). In comparison to a conventional FBMC transmitter such as the one shown in Fig. 1, the use of a circular convolution reduces the overhead and improves the spectrum efficiency. When a circular convolution is performed, the signal outputted by the FBMC filter bank comprises the same number of symbols as the input signal when M≥K. Accordingly, it is not necessary to perform tail cutting in the present embodiment.

In addition, the FBMC transmitter of the present embodiment further comprises a cyclic prefix adding unit 1104 configured to add a cyclic prefix (CP) as a guard interval between FBMC blocks, in step S1404. The CP helps to maintain the orthogonality of the system. In general, the CP can have a length greater than or equal to the channel length to avoid inter-block interference (IBI). In the present embodiment, the CP length is selected to be the same as the channel length, to minimise the overhead imposed by the CP. For example, if the number of input symbols per FBMC

transmission block M=5, the FFT size (total number of subcarriers) N=2048, and an LTE (Long Term Evolution) EPA (Extended Pedestrian A) channel with a channel length L _C h = 80 samples is used, a CP of length 80/2048 symbols can be added. In this example, the resulting overhead due to the CP is 0.78%. This represents a substantial improvement over the conventional tail cutting method.

Finally, in step S1405 the FBMC transmit signal is sent to one or more antennas via an output 1104. The FBMC signal transmitted by the transmitter shown in Fig. 11 can be received by a receiver such as the one shown in Fig. 12. A method performed by the FBMC receiver of Fig. 12 is illustrated in Fig. 15.

First, in step S1501 a cyclic prefix removing unit 1201 removes the cyclic prefix from the received FBMC signal. Then, in step S1502 a FBMC filter bank 1202 applies FBMC filtering to the FBMC signal after cyclic prefix removal, by performing a circular convolution with a filter function in the time domain. Next, in step S1503 a domain transforming unit 1203 transforms the FBMC filtered signal from the time domain to the frequency domain. In the present embodiment the domain transforming unit 1102 is configured to apply a Fast Fourier Transform (IFFT), however, other types of time- to-frequency domain transformations may be used in other embodiments.

In the present embodiment, the FBMC receiver is further configured to equalize the transformed FBMC filtered signal to obtain a plurality of intrinsic interference symbols and observed data symbols, as described above with reference to Fig. 2. However, a FBMC receiver similar to the one shown in Fig. 12 may be configured to estimate data symbols from the transformed FBMC filtered signal in an otherwise conventional manner, without utilising intrinsic interference as parity information.

Figure 13 is a graph illustrating the system performance in terms of bit error rate (BER) when circular convolution and a cyclic prefix are applied in an FBMC system, according to an embodiment of the present invention. In Fig. 13, simulation results are plotted for a 256 Quadrature Amplitude Modulation (QAM) modulation scheme, using the LTE EPA channel with FFT size N=2048. The IOTA filter function is used and the prototype filter overlapping factor K=6. As shown in Fig. 13, the FBMC transmission scheme described above with reference to Figs. 11, 12, 14 and 15 has a comparable

computational complexity and performance in terms of bit error rate (BER) as its conventional counterpart, but with significantly lower overhead and can therefore achieve higher spectrum efficiency than a conventional FBMC system. Whilst certain embodiments of the invention have been described herein with reference to the drawings, it will be understood that many variations and modifications will be possible without departing from the scope of the invention as defined in the

accompanying claims.