AMENDED CLAIMS

received by the International Bureau on 06 September 2018 (06.09.2018)

[Claim 1] A hybrid computing method comprising:

identifying a program to be executed in a hybrid computing system, the hybrid computing system comprising:

a control system comprising a classical processor; and

a quantum processor that defines qubits;

by operation of the control system, identifying a set of events to execute the program;

by operation of the control system, generating an event schedule comprising resource schedules for the respective qubits; and

executing the event schedule in the hybrid computing system, wherein the event schedule, when executed in the hybrid computing system, coordinates operation of the quantum processor and the classical processor.

[Claim 2] The hybrid computing method of claim 1, wherein the event schedule comprises resource schedules for:

the respective qubits, and

other respective computational resources of the hybrid computing system.

[Claim 3] The hybrid computing method of claim 2, wherein the other respective computational resources include the classical processor and a classical memory.

[Claim 4] The hybrid computing method of claim 1, wherein identifying the set of events comprises:

obtaining hardware-independent instructions from the program;

based on the hardware-independent instructions, generating native instructions for computing resources of the hybrid computing system; and identifying the set of events based on the native instructions.

[Claim 5] The hybrid computing method of claim 1, wherein the set of events comprises at least one of:

application of a quantum logic gate to one or more of the qubits;

measurement of a quantum state of one or more of the qubits; and storing a quantum state measurement into a classical memory in the hybrid computing system.

[Claim 6] The hybrid computing method of claim 1, wherein the qubits are

defined by qubit devices housed in a quantum processor, and executing the event schedule comprises: 52 generating control signals; and

delivering the control signals to the quantum processor.

The hybrid computing method of claim 6, wherein the quantum processor comprises the qubit devices and readout devices, and executing the event schedule comprises delivering the control signals to respective qubit devices and readout devices in the quantum processor. The hybrid computing method of claim 1, wherein the control system further comprises a classical memory, and the event schedule, when executed in the hybrid computing system, coordinates operation of the quantum processor, the classical processor, and the classical memory. The hybrid computing method of claim 1, wherein the hybrid computing system is configured to perform asynchronous classical and quantum computation.

The hybrid computing method of claim 1, wherein the hybrid computing system is configured to perform fully hybrid and interleaved classical/quantum computation, and the event schedule specifies operations to be performed by the classical processor in a characteristic time that is less than a coherence time of the quantum processor.

The hybrid computing method of claim 1, wherein the hybrid computing system is configured to perform quantum computation with fast feedback, and the event schedule specifies operations to be performed by the classical processor in a characteristic time that is less than a coherence time of the quantum processor.

The hybrid computing method of claim 1, wherein the hybrid computing system is configured to perform hybrid classical/quantum computation with error correction.

The hybrid computing method of claim 1, wherein:

the hybrid computing system comprises:

classical computing resources that include the classical processor and one or more classical memories; and

quantum computing resources that include the quantum processor; and the set of events comprises events to be executed using the respective quantum computing resources and events to be executed using the respective classical computing resources.

The hybrid computing method of claim 13, wherein the events to be executed using the respective quantum computing resources include application of quantum logic gates to the qubits.

The hybrid computing method of claim 13, wherein the quantum computing resources include:

qubit devices that define the qubits in the quantum processor; and signal lines configured to deliver control signals to the qubit devices, wherein the events to be executed using the respective quantum computing resources include delivery of control signals to respective qubit devices via the signal lines.

The hybrid computing method of claim 13, wherein the events to be executed using the respective classical computing resources include storage of values in the one or more classical memories.

The hybrid computing method of claim 16, wherein the values include measurements obtained by measuring quantum states of the qubits. The hybrid computing method of claim 13, wherein the events to be executed using the respective classical computing resources include computations by the classical processor.

The hybrid computing method of claim 13, wherein the event schedule, when executed in the hybrid computing system, synchronizes at least one operation performed by a classical computing resource with at least one operation performed by a quantum computing resource.

The hybrid computing method of claim 1, wherein the control system comprises a control processor, the control processor comprises at least one of a classical microprocessor, an application-specific integrated circuit (ASIC), or an integrated package.

The hybrid computing method of claim 20, wherein the integrated package comprises a field programmable gate array (FPGA) advanced reduced instruction set computing machine package.

The hybrid computing method of claim 1, wherein the control system comprises memory, the memory comprises a dynamic random-access memory (DRAM), field programmable gate array (FPGA) registers or a state memory of a processor.

A hybrid computing system comprising:

a classical processor;

a quantum processor that defines qubits; and

a control system configured to perform operations comprising:

identifying a set of events to execute a program in the hybrid computing system;

generating an event schedule comprising resource schedules for the respective qubits, wherein the event schedule, when executed in the hybrid computing system, coordinates operation of the quantum processor and the classical processor.

The hybrid computing system of claim 23, wherein the event schedule comprises resource schedules for:

the respective qubits, and

other respective computational resources of the hybrid computing system.

The hybrid computing system of claim 24, wherein the other respective computational resources include the classical processor and a classical memory.

The hybrid computing system of claim 23, wherein identifying the set of events comprises:

obtaining hardware-independent instructions from the program;

based on the hardware-independent instructions, generating native instructions for computing resources of the hybrid computing system; and identifying the set of events based on the native instructions.

The hybrid computing system of claim 23, wherein the set of events comprises at least one of:

application of a quantum logic gate to one or more of the qubits;

measurement of a quantum state of one or more of the qubits; and storing a quantum state measurement into a classical memory in the hybrid computing system.

The hybrid computing system of claim 23, wherein the qubits are defined by qubit devices housed in a quantum processor, and the system further comprises a signal delivery system configured to deliver control signals to the quantum processor and the control system.

The hybrid computing system of claim 28, wherein the quantum processor comprises the qubit devices and readout devices, and executing the event schedule comprises delivering the control signals to respective qubit devices and readout devices in the quantum processor. The hybrid computing system of claim 23, wherein the control system comprises the classical processor and a classical memory, and the event schedule, when executed in the hybrid computing system, coordinates operation of the quantum processor, the classical processor, and the classical memory.

The hybrid computing system of claim 23, wherein the hybrid computing system is configured to perform asynchronous classical and quantum computation.

The hybrid computing system of claim 23, wherein the hybrid 55 computing system is configured to perform fully hybrid and interleaved classical/quantum computation, and the event schedule specifies operations to be performed by the classical processor in a characteristic time that is less than a coherence time of the quantum processor.

The hybrid computing system of claim 23, wherein the hybrid computing system is configured to perform quantum computation with fast feedback, and the event schedule specifies operations to be performed by the classical processor in a characteristic time that is less than a coherence time of the quantum processor.

The hybrid computing system of claim 23, wherein the hybrid computing system is configured to perform hybrid classical/quantum computation with error correction.

The hybrid computing system of claim 23, wherein:

the hybrid computing system comprises:

classical computing resources that include the classical processor and one or more classical memories; and

quantum computing resources that include the quantum processor; and the set of events comprises events to be executed using the respective quantum computing resources and events to be executed using the respective classical computing resources.

The hybrid computing system of claim 35, wherein the events to be executed using the respective quantum computing resources include application of quantum logic gates to the qubits.

The hybrid computing system of claim 35, wherein the quantum computing resources include:

qubit devices that define the qubits in the quantum processor; and signal lines configured to deliver control signals to the qubit devices, wherein the events to be executed using the respective quantum computing resources include delivery of control signals to respective qubit devices.

The hybrid computing system of claim 35, wherein the events to be executed using the respective classical computing resources include storage of values in the one or more classical memories.

The hybrid computing system of claim 38, wherein the values include measurements obtained by measuring quantum states of the qubits. The hybrid computing system of claim 35, wherein the events to be executed using the respective classical computing resources include computations by the classical processor. 56

The hybrid computing system of claim 35, wherein the event schedule, when executed in the hybrid computing system, synchronizes at least one operation performed by a classical computing resource with at least one operation performed by a quantum computing resource.

The hybrid computing system of claim 23, wherein the control system comprises a control processor, the control processor comprises at least one of a classical microprocessor, an application-specific integrated circuit (ASIC), or an integrated package.

The hybrid computing system of claim 42, wherein the integrated package comprises a field programmable gate array (FPGA) advanced reduced instruction set computing machine package.

The hybrid computing system of claim 23, wherein the control system comprises memory, the memory comprises a dynamic random-access memory (DRAM), field programmable gate array (FPGA) registers or a state memory of a processor.