EXCESS LOOP DELAY COMPENSATION CIRCUIT AND METHOD, STORAGE MEDIUM AND ANALOG-TO-DIGITAL CONVERTER

Title:

EXCESS LOOP DELAY COMPENSATION CIRCUIT AND METHOD, STORAGE MEDIUM AND ANALOG-TO-DIGITAL CONVERTER

Document Type and Number:

WIPO Patent Application WO/2017/008550

Kind Code:

A1

Abstract:

An ELD compensation circuit is used to perform ELD compensation for the ELD time of a continuous time Δ-Σ analog-to-digital converter. The circuit comprises: a delay module (200) and a compensation module (201), wherein the delay module (200) is configured to select one delay time from a plurality of preset delay times, and output an own received signal in a delay manner on the basis of the selected delay time; and the compensation module (201) is configured to perform ELD compensation according to the signal output by the delay module (200) in a delay manner. Also disclosed are an ELD compensation method, a computer storage medium and a continuous time Δ-Σ analog-to-digital converter.

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Inventors:

ZHENG YULIANG (CN)

Application Number:

PCT/CN2016/079799

Publication Date:

January 19, 2017

Filing Date:

April 20, 2016

Export Citation:

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Assignee:

SANECHIPS TECH CO LTD (CN)

International Classes:

H03M3/00; H03M1/06

Foreign References:

CN102334294A	2012-01-25
CN104124974A	2014-10-29
CN102832948A	2012-12-19
CN102629874A	2012-08-08
US7439892B1	2008-10-21
EP2782259A2	2014-09-24

Attorney, Agent or Firm:

CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)

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