FABRICATION OF MULTILAYER SEMICONDUCTOR DEVICES WITH HIGH ASPECT RATIO MICRONEEDLES

WIPO Patent Application WO/2023/225550

A3

Aspects of the present disclosure provide systems, methods, and computer-readable storage devices that support fabrication of multilayer semiconductor devices containing microneedles having high aspect ratios. A method of fabricating such a device includes bonding a first substrate structure to a second substrate structure via a substrate bond. The first substrate structure includes a first substrate, an oxide layer on a first surface, a semiconductor material layer on the oxide layer, and a first hard mask layer on the semiconductor material layer. The second substrate structure includes a second substrate and a second hard mask layer on the second substrate. The method includes grinding a second surface of the first substrate that is opposite to the first surface. The method includes performing a combination of lithography and etching operations on the grinded second surface to form a trench within the first substrate structure and a substrate pillar within the trench.

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WEBB MARK A (US)
CHOOLJIAN MARC S (US)
STEELE DAVID A (US)
OTTO LAUREN M (US)
NGUYEN CHARLES V (US)

PCT/US2023/067112

April 11, 2024

May 17, 2023

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MEKONOS INC (US)

H01L21/02; H01L21/78; H01L23/48; A61B5/053; B81C1/00

NOVAK, Jason (US)

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