CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority from Indian Provisional Patent Application No. 202221049849 filed on 31/08/2022, the entirety of which is incorporated herein by a reference.

TECHNICAL FIELD

The present disclosure generally relates to fault detection in DC-DC converter of an electric vehicle. Particularly, the present disclosure relates to a system for identifying at least one fault occurring in a DC-DC converter for an electric vehicle. Furthermore, the present disclosure relates to a method for identification of at least one fault in a DC-DC converter.

BACKGROUND

Recently, there has been a rapid development in electric vehicles because of their ability to resolve pollution-related problems and serve as a clean mode of transportation. Generally, electric vehicles comprise traction inverters (DC-AC) converters for powering the traction motor and DC-DC converters for powering the low-voltage auxiliary systems in the electric vehicle. Such low-voltage auxiliary systems may include controllers, headlamps, hazard lamps, turn indicators, instrument clusters, infotainment systems, etc. which are critical for the functioning of the electric vehicle.

Generally, in the electric vehicle, the battery management system regulates the power output of the battery pack supplied to other components of the electric vehicle. The battery management system comprises a combination of sensors, microcontroller, control circuits, and communication modules to monitor and regulate the charging and discharging of the battery pack. The microcontroller of the battery management system collects data from the sensors, executes the control algorithms, and communicates with other systems in the electric vehicle to control the power supply from the battery pack.

Typically, the DC-DC converter utilized in electric vehicles is an analog converter that uses analog components to convert one DC voltage to another DC voltage. The analog DC-DC converter is beneficial due to its simple construction and low cost. However, the analog DC-DC converter lacks any mechanism to identify and/or communicate any fault occurring with the DC-DC converter. Due to the lack of such fault identification and/or communication mechanism, the DC-DC converter keeps on receiving power supply even in case of occurrence of the fault. Such continuous power supply even in case of any fault may result in damage to the DC- DC converter and the other components receiving power from the DC-DC converter. Usually, an additional microcontroller is used to identify and/or communicate the occurrence of faults in the DC-DC converter to stop the power supplied to the DC-DC converter. However, such implementation of the microcontroller increases the costs and complexity of the DC-DC converters. Moreover, it affects the overall robustness of the DC-DC converter.

Therefore, there exists a need for a mechanism that identifies and/or communicates faults occurring in the DC-DC converter for an electric vehicle without affecting the robustness and overcomes one or more problems associated as set forth above.

SUMMARY

An object of the present disclosure is to provide a system for detecting faults in a DC-DC converter for an electric vehicle.

Another object of the present disclosure is to provide a system for detecting faults in a DC-DC converter and communicating the detected faults to a battery management system of the electric vehicle.

Yet another object of the present disclosure is to provide a method of identifying at least one fault that occurred in a DC-DC converter for an electric vehicle. In accordance with the first aspect of the present disclosure, there is provided a system to identify at least one fault occurring in a DC-DC converter for an electric vehicle. The DC-DC converter is communicably coupled with a battery management system of the electric vehicle and comprises a register. The register comprises a plurality of input pins and a plurality of output pins, wherein at least one input pin of the plurality of input pins is configured to correspond to a predefined fault. The at least one occurred fault is identified by the battery management system based on output received from the plurality of output pins of the register.

The present disclosure provides a system that identifies at least one fault occurring in a DC-DC converter for an electric vehicle. The present disclosure provides a novel combination of the DC-DC converter and the register to at least one fault occurring in a DC-DC converter for an electric vehicle. Beneficially, the present disclosure provides a cost-effective solution for identifying at least one fault occurring in the DC-DC converter. Beneficially, the provided system improves fault protection in the DC-DC converter. Furthermore, the disclosed system may prevent potential damage to electrical components connected with the DC-DC converter. Furthermore, the disclosed system may increase the operational life of the DC-DC converter and electrical components connected with the DC-DC converter.

In accordance with the second aspect of the present disclosure, there is provided a method for identifying at least one fault that occurred in a DC-DC converter for an electric vehicle. The method comprises configuring at least one parallel input pin of the register to correspond to a predefined fault, generating a pulse change at the at least one parallel input pin of the register on occurrence of the predefined fault in the DC-DC converter, sensing the pulse change received from the at least one parallel input pin of the register, and identifying the at least one fault from the battery management system based on the pulse change received from the register. Additional aspects, advantages, features, and objects of the present disclosure would be made apparent from the drawings and the detailed description of the illustrative embodiments constructed in conjunction with the appended claims that follow.

It will be appreciated that features of the present disclosure are susceptible to being combined in various combinations without departing from the scope of the present disclosure as defined by the appended claims.

BRIEF DESCRIPTION OF DRAWINGS

The summary above, as well as the following detailed description of illustrative embodiments, is better understood when read in conjunction with the appended drawings. For the purpose of illustrating the present disclosure, exemplary constructions of the disclosure are shown in the drawings. However, the present disclosure is not limited to specific methods and instrumentalities disclosed herein. Moreover, those in the art will understand that the drawings are not to scale. Wherever possible, like elements have been indicated by identical numbers.

Embodiments of the present disclosure will now be described, by way of example only, with reference to the following diagrams wherein:

FIG. 1 illustrates a block diagram of a system for identifying at least one fault occurring in a DC-DC converter for an electric vehicle, in accordance with an aspect of the present disclosure.

FIG. 2 illustrates a circuit diagram of a system for identifying at least one fault occurring in a DC-DC converter for an electric vehicle, in accordance with an embodiment of the present disclosure.

FIG. 3 illustrates a flow chart of a method for identifying at least one fault occurring in a DC-DC converter for an electric vehicle, in accordance with another aspect of the present disclosure. In the accompanying drawings, an underlined number is employed to represent an item over which the underlined number is positioned or an item to which the underlined number is adjacent. A non-underlined number relates to an item identified by a line linking the non-underlined number to the item. When a number is non-underlined and accompanied by an associated arrow, the non-underlined number is used to identify a general item at which the arrow is pointing.

DETAILED DESCRIPTION

The following detailed description illustrates embodiments of the present disclosure and ways in which they can be implemented. Although some modes of carrying out the present disclosure have been disclosed, those skilled in the art would recognize that other embodiments for carrying out or practicing the present disclosure are also possible.

The description set forth below in connection with the appended drawings is intended as a description of certain embodiments of a system for identifying at least one fault occurring in a DC-DC converter for an electric vehicle and is not intended to represent the only forms that may be developed or utilized. The description sets forth the various structures and/or functions in connection with the illustrated embodiments; however, it is to be understood that the disclosed embodiments are merely exemplary of the disclosure that may be embodied in various and alternative forms. The figures are not necessarily to scale; some features may be exaggerated or minimized to show details of particular components. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for teaching one skilled in the art to variously employ the present invention.

While the disclosure is susceptible to various modifications and alternative forms, specific embodiment thereof has been shown by way of example in the drawings and will be described in detail below. It should be understood, however, that it is not intended to limit the disclosure to the particular forms disclosed, but on the contrary, the disclosure is to cover all modifications, equivalents, and alternatives falling within the scope of the disclosure.

The terms “comprise”, “comprises”, “comprising”, “include(s)”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, or system that comprises a list of components or steps does not include only those components or steps but may include other components or steps not expressly listed or inherent to such setup or system. In other words, one or more elements in a system or apparatus preceded by “comprises... a” does not, without more constraints, preclude the existence of other elements or additional elements in the system or apparatus.

In the following detailed description of the embodiments of the disclosure, reference is made to the accompanying drawings which are shown by way of illustration-specific embodiments in which the disclosure may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the disclosure, and it is to be understood that other embodiments may be utilized and that changes may be made without departing from the scope of the present disclosure. The following description is, therefore, not to be taken in a limiting sense.

The present disclosure will be described herein below with reference to the accompanying drawings. In the following description, well-known functions or constructions are not described in detail since they would obscure the description with unnecessary detail.

As used herein, the terms “electric vehicle”, “EV”, and “EVs” are used interchangeably and refer to any vehicle having stored electrical energy, including the vehicle capable of being charged from an external electrical power source. This may include vehicles having batteries that are exclusively charged from an external power source, as well as hybrid vehicles which may include batteries capable of being at least partially recharged via an external power source. Additionally, it is to be understood that the ‘electric vehicle’ as used herein includes electric two- wheelers, electric three-wheelers, electric four-wheelers, electric pickup trucks, electric trucks, and so forth.

As used herein, the terms “power source” “battery pack”, “battery”, and “power pack” are used interchangeably and refer to multiple individual battery cells connected to provide a higher combined voltage or capacity than what a single battery can offer. The battery pack is designed to store electrical energy and supply it as needed to various devices or systems. Battery pack, as referred herein may be used for various purposes such as power electric vehicles and other energy storage applications. Furthermore, the battery pack may include additional circuitry, such as a battery management system (BMS), to ensure the safe and efficient charging and discharging of the battery cells. The battery pack comprises a plurality of cell arrays which in turn comprises a plurality of battery cells.

As used herein, the terms “battery management system” and “BMS” are used interchangeably and refer to a component of the electric vehicle that monitors, controls, and optimizes the performance and safety of the power pack. The battery management system performs crucial functions including state of charge estimation and monitoring, state of health monitoring, thermal management, cell balancing, over-voltage and under-voltage protection, safety management, communication and data reporting, and efficiency optimization. The battery management system comprises a microcontroller to perform the processing tasks. The battery management system also controls the power supply to the various electrical systems in the electric vehicle.

As used herein, the terms “DC-DC converter” and “auxiliary power supply” are used interchangeably and refer to an electronic device that is responsible for converting the high-voltage DC (direct current) power from the electric vehicle's traction battery into lower-voltage DC power that is suitable for powering various auxiliary systems and components within the electric vehicle. The auxiliary systems may include the vehicle's lighting, infotainment system, power outlets, and so forth. It is to be understood that the DC-DC converter performs voltage conversion by stepping down the high-voltage DC from the traction battery to the appropriate voltage level required by the auxiliary systems.

As used herein, the terms “at least one fault” and “faults” are used interchangeably and refer to abnormal conditions or malfunctions that may occur within the DC-DC converter, leading to a disruption in its normal operation and potentially affecting the performance and safety of the DC-DC converter and the overall electrical systems of the electric vehicle.

As used herein, the terms “predefined faults” and “at least one predefined fault” are used interchangeably and refer to a fault that can be identified by the system.

As used herein, the terms “register”, “shift register” and “series/parallel register” are used interchangeably and refer to an electronic circuit or component that stores and shifts binary data (Is and Os) sequentially, usually in a linear arrangement of flip-flops or other storage elements and communicate the stored data via output. It is to be understood that based on the nature of input and output, there may be four types of registers i.e., Serial-In Serial-Out shift register (SISO), Serial-In Parallel- Out shift register (SIPO), Parallel-In Serial-Out shift register (PISO), Parallel-In Parallel-Out shift register (PIPO).

As used herein, the terms “plurality of input pins” and “input pins” are used interchangeably and refer to connections or terminals on the shift register where the binary data is provided to be shifted into the register. The input pins are used to load data into the shift register's storage elements (usually flip-flops) so that it can be shifted through the register sequentially.

As used herein, the terms “plurality of output pins” and “output pins” are used interchangeably and refer to connections or terminals on the shift register from which the shifted binary data can be retrieved after it has been sequentially moved through the register. The output pins allow access to the data that has been stored and shifted within the register's storage elements. As used herein, the term “clock pin” refers to an input connection or terminal that controls the timing of the data shifting process within the shift register by receiving a clock signal. The clock pin synchronizes the movement of data through the storage elements (typically flip-flops) of the shift register. The clock pin is driven by a clock signal, which is a regularly oscillating electrical signal with a specific frequency. It is to be understood that each rising or falling edge of the clock signal triggers the shift register to perform a data-shifting operation. The clock signal essentially determines when the data within the shift register advances from one storage element to the next.

As used herein, the term “ground pin” refers to a terminal of the register which is not been used for any input or output of data to the register. The ground pin is connected to the ground and provides an electrical reference point, typically considered as a zero-voltage level.

As used herein, the term “fault-control pin” refers to an input terminal capable of manipulating or configuring the behaviour of the shift register beyond the basic data shifting operation. The fault-control pin provides a way to influence various aspects of the shift register's functionality, allowing you to customize its behaviour the specific requirements. Typically, the fault-control pin is used to enable or disable certain features, modes, or operations of the shift register.

As used herein, the term “data pin” refers to an output terminal of the register which is used to retrieve the shifted data that has traversed through the register's storage elements during the shifting process. The data pin allows access and utilization of the data that has been stored and sequentially moved within the shift register.

As used herein, the term “communicably coupled” refers to a communicational connection between the various components of the system. The communicational connection between the various components of the system enables the exchange of data between two or more components of the system. Figure 1, in accordance with an embodiment, describes system 100 for identifying at least one fault occurred in a DC -DC converter 102 for an electric vehicle, wherein the DC-DC converter 102 is communicably coupled with a battery management system 104 of the electric vehicle and comprises a register 106, wherein the register 106 comprises a plurality of input pins 108 and a plurality of output pins 110, wherein at least one input pin of the plurality of input pins 108 is configured to correspond to a predefined fault, and wherein the at least one occurred fault is identified by the battery management system 104 based on output received from the plurality of output pins 110 of the register 106.

The system 100 for identifying at least one fault occurred in a DC-DC converter 102 for an electric vehicle is advantageous in terms of identifying and communicating at least one fault occurred in a DC-DC converter 102 to the battery management system 104. Beneficially, the system 100 provides a simple and effective solution for identifying at least one fault occurred in a DC-DC converter 102. Beneficially, the system 100 utilizes the processing capabilities of the battery management system 104 for identifying at least one fault occurred in a DC-DC converter 102, avoiding the use of any additional microcontroller in the DC-DC converter 102. Advantageously, the system 100 robustly functions for identifying at least one fault occurred in a DC-DC converter 102. Furthermore, the system 100 enables fault protection in the DC-DC converter 102. Beneficially, the system 100 enables the disconnection of power supplied to the DC-DC converter 102 in case of the occurrence of any fault in the DC-DC converter 102. Beneficially, the system 100 may prevent any potential damage to the electrical components connected with the DC-DC converter 102. Beneficially, the system 100 is capable of recommunicating with the battery management system 104 to restore the power supply, once the at least one fault occurred with the DC-DC converter 102 is resolved. Beneficially, the system 100 is capable of identifying multiple faults occurring simultaneously in the DC-DC converter 102. Beneficially, the system 100 is capable of communicating the resolution of temporary fault to the battery management system 104 so that the power supply to the DC-DC converter 102 can be restored.

In an embodiment, the register 106 is a shift register. In a specific embodiment, the shift register is a series-parallel shift register. Beneficially, the series-parallel shift register enables a simple, effective, and robust way for identification and communication of at least one fault occurred in the DC-DC converter 102. Beneficially, the series-parallel shift register eliminates the requirement of any additional microcontroller in the DC-DC converter 102, thus, resulting in a cost- effective solution for identifying at least one fault in the DC-DC converter 102.

In an embodiment, the predefined fault comprises at least one of: an over-current fault, an over-voltage fault, an over-temperature fault, and a short-circuit fault. In another embodiment, the predefined fault comprises any possible fault that may occur in the DC-DC converter 102.

In an embodiment, the plurality of output pins 110 comprises a data pin 110a and a plurality of ground pins 110b, 110c. Beneficially, the data pin 110a is utilized to receive output data from the register 106. It is to be understood that the ground pins 110b, 110c are connected to the ground and considered as zero voltage level. In another embodiment, the plurality of output pins 110 comprises a plurality of data pins. It is to be understood that each data pin of the plurality of data pins may be configured to provide specific output data from the register 106.

In an embodiment, the plurality of input pins 108 comprises: at least one serial input pin 108g, a plurality of parallel input pins 108a, 108b, 108c, 108d, a clock pin 108e, and a fault-control pin 108f. Beneficially, the plurality of input pins 108 comprises different types of input pins that receive their dedicated input type, respectively.

In an embodiment, the at least one series input pin 108g is grounded. It is to be understood that the series input pin does not correspond to any predefined fault, thus, it is connected to the ground and considered a zero-voltage level. In another embodiment, the at least one series input pin 108g is configured into a parallel input pin to correspond to the predefined fault.

In an embodiment, wherein the plurality of parallel input pins 108a, 108b, 108c, 108d comprises: one parallel input pin 108a configured to correspond to the overcurrent fault, one parallel input pin 108b configured to correspond to the overvoltage fault, one parallel input pin 108c configured to correspond to the overtemperature fault, and/or one parallel input pin 108d configured to correspond to the short-circuit fault. Beneficially, one parallel input pin of the plurality of parallel input pins 108a, 108b, 108c, 108d is configured to correspond to one fault uniquely. In another embodiment, the number of parallel input pins 108a, 108b, 108c, 108d is equal to the number of predefined faults that the system 100 is configured to identify.

In an embodiment, occurrence of the predefined fault generates a pulse change in the corresponding parallel input pin 108a, 108b, 108c, 108d. It is to be understood that during the normal functioning of the DC -DC converter 102 the plurality of parallel input pins 108a, 108b, 108c, 108d would receive binary data value as zero. Beneficially, at the occurrence of the predefined fault, the corresponding parallel input pin would receive the binary data value as one resulting in the pulse change in the corresponding parallel input pin 108a, 108b, 108c, 108d. Beneficially, the pulse change would enable the unique identification of the occurred fault.

In an embodiment, the plurality of parallel input pins 108a, 108b, 108c, 108d are configured to store the generated pulse change. It is to be understood that the plurality of parallel input pins 108a, 108b, 108c, 108d would transfer the generated pulse change to storage flip-flops of the register 106. Beneficially, the generated pulse change is stored in the storage flip-flops of the register 106 for further processing in the system 100 for identifying the occurred fault in the DC-DC converter 102.

In an embodiment, the fault-control pin 108f is configured to generate a pulse change and transform the plurality of parallel input pins 108a, 108b, 108c, 108d into a series configuration, on occurrence of any of the predefined faults. It is to be understood that during the normal functioning of the DC -DC converter 102 the fault-control pin 108f would receive binary data value as zero. Beneficially, at the occurrence of the predefined fault, the fault-control pin 108f along with the corresponding parallel input pin would receive the binary data value as one resulting in the pulse change in the fault-control pin 108f. Beneficially, the pulse change in the fault-control pin 108f would transform the plurality of parallel input pins 108a, 108b, 108c, 108d into series configuration resulting in storage of the received binary data into the plurality of parallel input pins 108a, 108b, 108c, 108d. It is to be understood that the transformation of the plurality of parallel input pins 108a, 108b, 108c, 108d into series configuration would result in the transformation of the storage flip-flops of the register 106 into series configuration. In other words, the binary data stored in the storage flip-flops of the register 106 is now configured to output from the data pin 110a in a serial manner using a clock pulse.

In an embodiment, the register 106 is communicably coupled with the battery management system 104 via the data pin 110a and the clock pin 108e. In an embodiment, the data pin 110a is configured to provide the output from the register 106 to the battery management system 104. In a specific embodiment, the data pin 110a is configured to provide the output from the register 106 to the battery management system 104, via a general input/output pin of the battery management system 104. Beneficially, the clock pin 108e inputs the clock pulse into the register 106

In an embodiment, the clock pin 108e is configured to receive a plurality of clock pulse from the battery management system 104, in response to the output from the register 106 received by the battery management system 104. It is to be understood that during the normal functioning of the DC -DC converter 102 the battery management system 104 does not generate any clock pulse as it normally receives the binary data value as zero from the register 106 via the data pin 110a. On the occurrence of any of the predefined faults, the battery management system 104 receives the binary data value as one from the register 106 via the data pin 110a, and in response to the binary data value as one, the battery management system 104 starts generating the plurality of clock pulse which is received by the clock pin 108e.

In an embodiment, the battery management system 104 is configured to receive the pulse change from the fault-control pin 108f via the data pin 110a and generate the plurality of clock pulse for the register 106 in response to the pulse change received from the fault-control pin 108f. It is to be understood that on the occurrence of any of the predefined faults, the fault-control pin 108f would provide the binary data value as one indicating the pulse change in the fault-control pin 108f. Such pulse change in the fault-control pin 108f would result in the generation of the plurality of clock pulse by the battery management system 104, as explained earlier.

In an embodiment, each clock pulse of the plurality of clock pulse generated is received by the register 106 to output, via the data pin 110a, the pulse change stored in the plurality of parallel input pins 108a, 108b, 108c, 108d. Beneficially, each clock pulse would shift the pulse change (binary value as one) stored in the register 106, (stored in the flip-flops of the register 106) one step in the serial manner. It is to be understood that with each shift of the binary data stored in the register 106, the data pin 110a outputs the binary data present in the flipflop (corresponding to the parallel input pin) nearest to the data pin 110a.

In an embodiment, the battery management system 104 is configured to identify the predefined fault based on the number of clock pulse required to receive the output pulse change stored in the plurality of parallel input pins 108a, 108b, 108c, 108d. It is to be understood that each clock pulse would result in one output from the register 106 via the data pin 110a. Since the position of the plurality of parallel input pins 108a, 108b, 108c, 108d is fixed in the register 106, the occurred fault would also be stored at the specific position in the register 106. Thus, the position of storage of the fault is also fixed based on the occurred fault and the identification of the position of the fault would result in the identification of the type of fault that occurred. Beneficially, such a process of identifying faults occurring in the DC-DC converter utilizes the microcontroller of the battery management system 104 and eliminates the need for any additional microcontroller in the DC -DC converter 102.

In an embodiment, the system 100 comprises operational amplifiers configured to function as comparators, wherein each of the parallel input pins 108a, 108b, 108c, 108d is connected to one operational amplifier. It is to be understood that each operational amplifier is configured to generate the binary data denoting a unique type of predefined fault.

In an embodiment, the operational amplifier provides information of the predefined fault of the DC-DC converter 102 to the connected parallel input pins 108a, 108b, 108c, 108d. On the occurrence of a particular predefined fault, the corresponding operational amplifier generates and transmits the binary data as one into the corresponding parallel input pin.

In an embodiment, the register 106 comprises a pair of power pins to receive a power supply for the operation of the register 106. Beneficially, the pair of power pins ensures the regular supply of power for the operation of the register 106.

In an exemplary embodiment, during the normal functioning of the DC-DC converter 102, the plurality of parallel input pins 108a, 108b, 108c, 108d, and the fault-control pin 108f would be receiving binary data as zero from the DC-DC converter and would be parallelly outputting binary data as zero via the data pin 110a to the battery management system 104. Since the battery management system 104 is receiving binary data from the register 106 as zero, no clock pulse is generated. When at least one fault occurs in the DC-DC converter 102, such as the over-temperature fault, the input signal to the fault control pin 108f and the parallel input pin 108c changes. Once the over-temperature fault occurs, the fault control pin 108f and the parallel input pin 108c receive the binary data as one, indicating an occurrence of the over-temperature fault. The fault control pin 108f would immediately transform the parallel input pins 108a, 108b, 108c, 108d into a series configuration such that the binary data value of input pin 108c stays in the pin and the corresponding flipflop of the register 106. Simultaneously, the battery management system would also receive the binary data value as one from the faultcontrol pin 108f. As soon as the battery management system 104 receives the binary data value as one from the fault control pin 108f, it starts generating a plurality of clock pulses. The generated clock pulses are received by the register 106 via the clock pin 108e. On receiving each clock pulse, the binary data values (pulse change) stored in the plurality of parallel input pins 108a, 108b, 108c, 108d, and the corresponding flip-flops shift in a serial manner to the next subsequent parallel input pin and the corresponding flip-flop. Such shifting results in the output of stored binary data value via the data pin 110a. For the occurred over-temperature fault, the binary data value of one is stored in the pin 108c and the corresponding flip-flop. On receiving one clock pulse from the battery management system 104, the binary data value (pulse change) shifts to the next parallel input pin and the corresponding flipflop, therefore, on receiving four clock pulses from the battery management system 104, the register 106 would output the binary data value (pulse change) occurred in the input pin 108c. The battery management system 104 would interpret the obtained pulse change as the over-temperature fault as it is received from the input pin 108c (and the corresponding flipflop). It is to be understood that for the multiple number of faults occurring simultaneously, the process of identification would be similar and the number of clock pulse resulting in the output of pulse change would denote the type of fault that occurred in the DC-DC converter. For example, if over-temperature and short-circuit faults occur simultaneously, the register 106 would output binary data value as one from the input pin 108c and the input pin 108d on receiving the fourth and fifth clock pulse, respectively. Furthermore, in an example, the over-temperature fault is a temporary fault (resolves automatically with time), in such case, the corresponding input pin 108c would output binary data value as zero, once the fault is resolved, resulting in restoration of the power supply from the battery management system 104 to the DC-DC converter 102.

In an embodiment, there is disclosed, the system 100 for identifying at least one fault occurred in a DC-DC converter 102 for an electric vehicle, wherein the DC- DC converter 102 is communicably coupled with a battery management system 104 of the electric vehicle and comprises a register 106, wherein the register 106 comprises a plurality of input pins 108 and a plurality of output pins 110, wherein at least one input pin of the plurality of input pins 108 is configured to correspond to a predefined fault, and wherein the at least one occurred fault is identified by the battery management system 104 based on output received from the plurality of output pins 110 of the register 106. Furthermore, the register 106 is a series-parallel shift register. Furthermore, the predefined fault comprises at least one of: an overcurrent fault, an over-voltage fault, an over-temperature fault, and a short-circuit fault. In another embodiment, the predefined fault comprises any possible fault that may occur in the DC-DC converter 102. Furthermore, the plurality of output pins 110 comprises a data pin 110a and plurality of ground pins 110b, 110c. Furthermore, the plurality of input pins 108 comprises: at least one serial input pin 108g, a plurality of parallel input pins 108a, 108b, 108c, 108d, a clock pin 108e, and a fault-control pin 108f. Furthermore, the at least one series input pin 108g is grounded. Furthermore, the plurality of parallel input pins 108a, 108b, 108c, 108d comprises: one parallel input pin 108a configured to correspond to the over-current fault, one parallel input pin 108b configured to correspond to the over-voltage fault, one parallel input pin 108c configured to correspond to the over-temperature fault, and/or one parallel input pin 108d configured to correspond to the short-circuit fault. Furthermore, occurrence of the predefined fault generates a pulse change in the corresponding parallel input pin 108a, 108b, 108c, 108d. Furthermore, the plurality of parallel input pins 108a, 108b, 108c, 108d are configured to store the generated pulse change. Furthermore, the fault-control pin 108f is configured to generate a pulse change and transform the plurality of parallel input pins 108a, 108b, 108c, 108d into series configuration, on occurrence of any of the predefined faults. Furthermore, the register 106 is communicably coupled with the battery management system 104 via the data pin 110a and the clock pin 108e. Furthermore, the clock pin 108e is configured to receive a plurality of clock pulse from the battery management system 104, in response to the output from the register 106 received by the battery management system 104. Furthermore, the battery management system 104 is configured to receive the pulse change from the fault-control pin 108f via the data pin 110a and generate the plurality of clock pulse for the register 106 in response to the pulse change received from the fault-control pin 108f. Furthermore, each clock pulse of the plurality of clock pulse generated is received by the register 106 to output, via the data pin 110a, the pulse change stored in the plurality of parallel input pins 108a, 108b, 108c, 108d. Furthermore, the battery management system 104 is configured to identify the predefined fault based on the number of clock pulse required to receive the output pulse change stored in the plurality of parallel input pins 108a, 108b, 108c, 108d. Furthermore, the system 100 comprises operational amplifiers configured to function as comparators, wherein each of the parallel input pin 108a, 108b, 108c, 108d is connected to one operational amplifier. Furthermore, the operational amplifier provides information of the predefined fault of the DC-DC converter 102 to the connected parallel input pin 108a, 108b, 108c, 108d

Figure 2, in accordance with an embodiment, describes a circuit diagram 200 of the register 106 for identifying at least one fault occurred in a DC-DC converter 102 for an electric vehicle. The DC-DC converter 102 is connected to the faultcontrol pin 108f and the parallel input pins 108a, 108b, 108c, 108d. The serial input pin 108g is grounded. The clock pin 108e is connected to the battery management system 104 to receive a plurality of clock pulse from the battery management system 104. The input pins 108a, 108b, 108c, 108d, 108e, 108f, 108g are connected to their corresponding flip-flops in a parallel manner and send binary data value as zero when the DC-DC-converter 102 is functioning normally. The input pins 108a, 108b, 108c, 108d, 108e, 108f, 108g, and their corresponding flip-flops are connected to the data pin 110a. The output pins 110b and 110c are grounded. The data pin 110a is connected to the battery management system 104 and provides the output of the register 106 to the battery management system 104.

Figure 3, in accordance with an embodiment, describes a method 300 of identifying at least one fault occurred in a DC-DC converter 102 for an electric vehicle, wherein the DC-DC converter 102 is communicably coupled with a battery management system 104 of the electric vehicle and comprises a register 106. The method 300 starts at step 302 and finishes at step 308. At step 302, the method 300 comprises configuring at least one parallel input pin 108a, 108b, 108c, 108d of the register 106 to correspond to a predefined fault. At step 304, the method 300 comprises generating a pulse change at the at least one parallel input pin 108a, 108b, 108c, 108d of the register 106 on occurrence of the predefined fault in the DC-DC converter 102. At step 306, the method 300 comprises sensing the pulse change received from the at least one parallel input pin 108a, 108b, 108c, 108d of the register 106. At step 308, the method 300 comprises identifying the at least one fault, by the battery management system 104, based on the pulse change received from the register 106.

In an embodiment, the method 300 comprises configuring: one parallel input pin 108a to correspond to an over-current fault, one parallel input pin 108b to correspond to an over-voltage fault, one parallel input pin 108c to correspond to an over-temperature fault, and/or one parallel input pin 108d to correspond to a short- circuit fault. Beneficially, one parallel input pin of the plurality of parallel input pins 108a, 108b, 108c, 108d is configured to correspond to one fault uniquely. In another embodiment, the number of parallel input pins 108a, 108b, 108c, 108d is equal to the number of predefined faults.

In an embodiment, the method 300 comprises storing the generated pulse change. It is to be understood that the storing of the generated pulse change would comprise transferring the generated pulse change to storage flip-flops of the register 106 from the plurality of parallel input pins 108a, 108b, 108c, 108d.

In an embodiment, the method 300 comprises generating a pulse change, at a faultcontrol pin 108f, and transforming the at least one parallel input pin 108a, 108b, 108c, 108d into series configuration, on occurrence of any of the predefined faults. Beneficially, at the occurrence of the predefined fault, the fault-control pin 108f along with the corresponding parallel input pin would receive the binary data value as one resulting into the pulse change in the fault-control pin 108f. Beneficially, the pulse change in the fault-control pin 108f would transform the plurality of parallel input pins 108a, 108b, 108c, 108d into series configuration resulting into storage of the received binary data into plurality of parallel input pins 108a, 108b, 108c, 108d. It is to be understood that the transformation the plurality of parallel input pins 108a, 108b, 108c, 108d into series configuration would result into transformation of the storage flip-flops of the register 106 into series configuration. In other words, the binary data stored in the storage flip-flops of the register 106 is now configured to output from the data pin 110a in a serial manner using a clock pulse.

In an embodiment, the method 300 comprises communicably coupling the register 106 with the battery management system 104 via a data pin 110a and a clock pin 108e

In an embodiment, the method 300 comprises providing output from the register 106 to the battery management system 104 via the data pin 110a.

In an embodiment, the method 300 comprises receiving a plurality of clock pulse from the battery management system 104, via the clock pin 108e, in response to the output from the register 106 received by the battery management system 104.

In an embodiment, the method 300 comprises receiving the pulse change from the fault-control pin 108f via the data pin 110a and generating the plurality of clock pulse for the register 106 in response to the pulse change received from the faultcontrol pin 108f.

In an embodiment, the method 300 comprises receiving each clock pulse of the plurality of clock pulse to output, via the data pin 110a, the pulse change stored in the plurality of parallel input pins 108a, 108b, 108c, 108d.

In an embodiment, the method 300 comprises identifying the predefined fault, by the battery management system 104, based on the number of clock pulse required to receive the output pulse change stored in the plurality of parallel input pins 108a, 108b, 108c, 108d

In an embodiment, the method 300 comprises providing information of the predefined fault of the DC-DC converter 102 to the connected parallel input pin 108a, 108b, 108c, 108d, via operational amplifiers configured to function as comparators.

In an embodiment, there is disclosed a method 300 of identifying at least one fault occurred in a DC-DC converter 102 for an electric vehicle, wherein the DC-DC converter 102 is communicably coupled with a battery management system 104 of the electric vehicle and comprises a register 106. The method 300 comprises: configuring at least one parallel input pin 108a, 108b, 108c, 108d of the register 106 to correspond to a predefined fault, generating a pulse change at the at least one parallel input pin 108a, 108b, 108c, 108d of the register 106 on occurrence of the predefined fault in the DC-DC converter 102, sensing the pulse change received from the at least one parallel input pin 108a, 108b, 108c, 108d of the register 106, identifying the at least one fault, by the battery management system 104, based on the pulse change received from the register 106. Furthermore, the method 300 comprises configuring: one parallel input pin 108a to correspond to an over-current fault, one parallel input pin 108b to correspond to an over-voltage fault, one parallel input pin 108c to correspond to an over-temperature fault, and/or one parallel input pin 108d to correspond to a short-circuit fault. Furthermore, the method 300 comprises storing the generated pulse change. Furthermore, the method 300 comprises generating a pulse change, at a fault-control pin 108f, and transforming the at least one parallel input pin 108a, 108b, 108c, 108d into series configuration, on occurrence of any of the predefined faults. Furthermore, the method 300 comprises communicably coupling the register 106 with the battery management system 104 via a data pin 110a and a clock pin 108e. Furthermore, the method 300 comprises providing output from the register 106 to the battery management system 104 via the data pin 110a. Furthermore, the method 300 comprises receiving a plurality of clock pulse from the battery management system 104, via the clock pin 108e, in response to the output from the register 106 received by the battery management system 104. Furthermore, method 300 comprises receiving the pulse change from the fault-control pin 108f via the data pin 110a and generating the plurality of clock pulse for the register 106 in response to the pulse change received from the fault-control pin 108f. Furthermore, the method 300 comprises receiving each clock pulse of the plurality of clock pulse to output, via the data pin 110a, the pulse change stored in the plurality of parallel input pins 108a, 108b, 108c, 108d. Furthermore, the method 300 comprises identifying the predefined fault, by the battery management system 104, based on the number of clock pulse required to receive the output pulse change stored in the plurality of parallel input pins 108a, 108b, 108c, 108d. Furthermore, the method 300 comprises providing information of the predefined fault of the DC-DC converter 102 to the connected parallel input pin 108a, 108b, 108c, 108d, via operational amplifiers configured to function as comparators.

It would be appreciated that all the explanations and embodiments of system 100 also apply mutatis-mutandis to the method 300.

In the description of the present invention, it is also to be noted that, unless otherwise explicitly specified or limited, the terms “disposed,” “mounted,” and “connected” are to be construed broadly, and may for example be fixedly connected, detachably connected, or integrally connected, either mechanically or electrically. They may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.

Modifications to embodiments and combinations of different embodiments of the present disclosure described in the foregoing are possible without departing from the scope of the present disclosure as defined by the accompanying claims. Expressions such as “including”, “comprising”, “incorporating”, “have”, and “is” used to describe and claim the present disclosure are intended to be construed in a non-exclusive manner, namely allowing for items, components or elements not explicitly described also to be present. Reference to the singular is also to be construed to relate to the plural where appropriate.

Although embodiments have been described with reference to a number of illustrative embodiments thereof, it should be understood that numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this disclosure. More particularly, various variations and modifications are possible in the component parts and/or arrangements of the subject combination arrangement within the scope of the present disclosure, the drawings, and the appended claims. In addition to variations and modifications in the component parts and/or arrangements, alternative uses will also be apparent to those skilled in the art.