Title:
FIELD-EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2022/259593
Kind Code:
A1
Abstract:
Provided is a field-effect transistor that has a semiconductor substrate (12) that is provided with a plurality of trenches (20) in an upper surface, and gate electrodes (24) that are arranged in the trenches. A plurality of breakdown voltage areas (48) are provided in each inter-trench range (28). The plurality of breakdown voltage areas are arranged so as to form a plurality of rows (49) extending in a first direction that intersects the plurality of trenches. The plurality of rows are arranged spaced apart in a second direction that is parallel to the trenches. The breakdown voltage areas extend from above the lower ends of the trenches to below the lower ends of the trenches, and are arranged spaced apart from gate insulators (22). The drift areas are in contact with the gate insulating films at positions between the breakdown voltage areas and the gate insulating films.
Inventors:
MATSUURA YUICHIRO (JP)
Application Number:
PCT/JP2022/001571
Publication Date:
December 15, 2022
Filing Date:
January 18, 2022
Export Citation:
Assignee:
DENSO CORP (JP)
International Classes:
H01L29/78; H01L21/336
Foreign References:
| JP2020191401A | 2020-11-26 | |||
| JP2020155739A | 2020-09-24 | |||
| JP2021068741A | 2021-04-30 | |||
| JP2011253837A | 2011-12-15 |
Attorney, Agent or Firm:
KAI-U PATENT LAW FIRM (JP)
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