Title:
FILE PRE-FETCH SCHEDULING FOR CACHE MEMORY TO REDUCE LATENCY
Document Type and Number:
WIPO Patent Application WO/2019/100263
Kind Code:
A1
Abstract:
Techniques are provided for the scheduling of file pre-fetches from a file system into a cache memory (104), to reduce subsequent latency associated with future accesses to those files. A methodology implementing the techniques includes monitoring accesses to files of a file system (610) (e.g., file open and file read operations) and maintaining a record for each of the accessed files. The record includes an identifier of the file, the number of accesses of the file, and the number of cache memory (104) misses associated with those accesses. The method also includes storing the record into a file access history database (FAHD) (630). The method further includes generating, in response to an Operating System (OS) (820) shutdown, a frequently used file list (FUFL) (208) based on the FAHD (218). The method further includes pre-fetching files identified by a selected subset of the FUFL (208) to the cache memory (104) during an OS (820) boot.
Inventors:
FANG LIANG (CN)
ZHOU ZHEN (CN)
ZHOU ZHEN (CN)
Application Number:
PCT/CN2017/112360
Publication Date:
May 31, 2019
Filing Date:
November 22, 2017
Export Citation:
Assignee:
INTEL CORP (US)
FANG LIANG (CN)
ZHOU ZHEN (CN)
FANG LIANG (CN)
ZHOU ZHEN (CN)
International Classes:
G06F9/44
Domestic Patent References:
| WO2015169212A1 | 2015-11-12 |
Foreign References:
| EP3037960A1 | 2016-06-29 | |||
| US8433694B1 | 2013-04-30 | |||
| US20140129814A1 | 2014-05-08 | |||
| US20150193463A1 | 2015-07-09 |
Attorney, Agent or Firm:
NTD PATENT AND TRADEMARK AGENCY LIMITED (CN)
Download PDF:
Previous Patent: AN EFFICIENT CONTROL SIGNALING METHOD AND SYSTEM
Next Patent: ENHANCEMENTS OF NB-IOT FOR TDD OPERATION
Next Patent: ENHANCEMENTS OF NB-IOT FOR TDD OPERATION