Title:
FILTER CIRCUIT AND OPTICAL DISC DEVICE PROVIDED WITH SAME
Document Type and Number:
WIPO Patent Application WO/2011/004512
Kind Code:
A1
Abstract:
A current mode filter includes first, second, and third transistors (M1, M2, M3) all of which have the same channel polarity. The drain of the first transistor (M1) is connected to the source of the second transistor (M2) which functions as a gate grounding circuit. The drain of the second transistor (M2) is connected to the gate of the first transistor (M1) and that of the third transistor (M3). A first capacitive element (C1) and a second capacitive element (C2) are connected to the gate and the drain of the first transistor (M1), respectively. A current source (7) supplies bias currents to the first and second transistors (M1, M2), respectively. The drain of the first transistor (M1) operates as an input terminal (9), and an output signal (Io) is taken out from the drain current in the third transistor (M3). Therefore, only one transconductance adjusting circuit is required.
Inventors:
MORIKAWA HIROYASU
Application Number:
PCT/JP2010/000798
Publication Date:
January 13, 2011
Filing Date:
February 09, 2010
Export Citation:
Assignee:
PANASONIC CORP (JP)
MORIKAWA HIROYASU
MORIKAWA HIROYASU
International Classes:
H03H11/04; G11B20/10; H03F3/08; H03F3/34
Foreign References:
| JP2000514980A | 2000-11-07 | |||
| JPH09261004A | 1997-10-03 | |||
| JP2002299971A | 2002-10-11 | |||
| JP2005094091A | 2005-04-07 |
Other References:
MAMORU SASAKI ET AL.: "Denshiteki ni Chosei Kano na Nijigen Teiiki Tsuka Tokusei o Motsu Denryu Mirror", ITE TECHNICAL REPORT, vol. 23, no. 58, 21 September 1999 (1999-09-21), pages 71 - 77
Attorney, Agent or Firm:
MAEDA, Hiroshi et al. (JP)
Hiroshi Maeda (JP)
Hiroshi Maeda (JP)
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