TECHNICAL FIELD

[0001] This invention relates to electronic circuits, and more particularly to a fixed- frequency LLC resonant power regulator.

BACKGROUND

[0002] There is an increasing demand for power conversion and regulation circuitry to operate with increased efficiency and reduced power dissipation to accommodate the continuous reduction in size of electronic devices. Switching regulators have been implemented as an efficient mechanism for providing a regulated output in power supplies. One such type of regulator is known as a switching regulator or switching power supply, which controls the flow of power to a load by controlling the on and off duty-cycle of one or more switches coupled to the load. Many different classes of switching regulators exist today.

[0003] One such type of switching regulator is a resonant power regulator. A resonant power regulator can be configured with a resonant tank that conducts an oscillating resonant current based on a power storage interaction between a capacitor and an inductor, such as in a primary inductor of a transformer. The oscillating resonant current can be generated based on the operation of the switches, and can thus induce a current in a secondary inductor of the transformer. Therefore, an output voltage can be generated based on the output current. Resonant power regulators can be implemented to achieve very low switching loss, and can thus be operated at substantially high switching frequencies.

SUMMARY

[0004] One embodiment of the invention includes an LLC resonant AC/DC power regulator system. The system includes a transformer comprising a primary inductor and a secondary inductor. An LLC resonant tank is configured to have a first second resonant frequencies. A full-bridge is coupled between first and second voltages and includes a first pair of switches coupled between the first and second voltages and a second pair of switches coupled between the first and second voltages. The LLC resonant tank is coupled between a first node that interconnects the first pair of switches and a second node that interconnects the second pair of switches. The switches are activated and deactivated to generate a resonant current through the LLC resonant tank in response respective switching control signals. The respective switching control signals have fixed frequency and regulated duty-cycle to activate the plurality of switches in a zero voltage switching (ZVS) manner. An output stage is coupled to the secondary inductor and comprising at least one output rectifier that is configured to conduct an output current that is generated in the secondary inductor in response to the resonant current. The output stage generates a rectified output voltage at an output based on the output current. [0005]

[0006] Another embodiment of the invention includes a method for generating an output voltage via an LLC resonant power regulator. The method includes generating a plurality of switching control signals having a fixed frequency and regulated duty-cycle and activating a plurality of switches configured as a full-bridge arrangement in a predetermined sequence in an input stage of the LLC resonant power regulator in response to the plurality of switching signals. The method also includes generating a resonant current through an LLC resonant tank comprising a series connection of a primary inductor of a transformer, a leakage inductor, and a resonant capacitor in response to the activation of the plurality of switches. The method also includes discharging parasitic capacitances associated with the plurality of switches in the predetermined sequence in response to the resonant current to activate the plurality of switches in a ZVS manner. The method also includes generating an output current at a secondary inductor of the transformer, conducting the output current through at least one rectifier in a ZCS manner, and generating an output voltage at an output of the LLC resonant power converter in response to the output current.

[0007] Another embodiment of the invention includes an LLC resonant power regulator system. The system includes a switching control stage configured to generate a plurality of switching control signals having a fixed frequency and regulated duty-cycle and an LLC resonant tank comprising a primary inductor of a transformer, a leakage inductor, and a resonant capacitor arranged in series. The system also includes an input stage comprising a plurality of switches arranged as a full-bridge and being controlled by the respective plurality of switching control signals to activate and deactivate in a predetermined sequence to alternately couple and decouple the LLC resonant tank to a high voltage rail and a low voltage rail to generate a resonant current through the LLC resonant tank. The system further includes an output stage comprising a pair of output rectifiers configured to alternately conduct an output current that is generated by a secondary inductor of the transformer in response to the resonant current to generate an output voltage at an output.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] FIG. 1 illustrates an example of an LLC resonant power regulator system in accordance with an aspect of the invention.

[0009] FIG. 2 illustrates another example of an LLC resonant power regulator system in accordance with an aspect of the invention.

[0010] FIG. 3 illustrates an example of a metal-oxide semiconductor field-effect transistor (MOSFET) in accordance with an aspect of the invention.

[0011] FIG. 4 illustrates an example of a timing diagram in accordance with an aspect of the invention.

[0012] FIG. 5 illustrates an example of a method for generating an output voltage via an

LLC resonant power regulator in accordance with an aspect of the invention.

DETAILED DESCRIPTION

[0013] The invention relates to electronic circuits, and more particularly to a fixed- frequency LLC resonant power regulator. The LLC resonant power regulator can include a transformer having a primary inductor and a secondary inductor. The primary inductor of the transformer, a leakage inductor, and a resonant capacitor collectively form an LLC resonant tank having a first resonant frequency based on the leakage inductor and the resonant capacitor and a second resonant frequency based on the primary inductor, the leakage inductor, and the resonant capacitor. Therefore, a resonant current is generated in the LLC resonant tank, which thus induces an output current in the secondary inductor to an output stage. The output stage includes a set of output rectifiers, such as diodes, and an output capacitor. The output rectifiers thus alternately conduct the output current to generate an output voltage across the output capacitor and an associated load.

[0014] The LLC resonant power regulator can also include an input stage having a full- bridge (i.e., an H-bridge) arrangement of transistors, such as metal-oxide semiconductor field effect transistors (MOSFETs). The full-bridge arrangement can include two interconnecting nodes that are coupled via the LLC resonant tank. The MOSFETs can be driven by a plurality of switching control signals, such as provided from a switching control stage, that have a fixed frequency and a regulated duty-cycle. Therefore, the MOSFETs can be activated and deactivated in a predetermined sequence to generate the LLC resonant current based on alternately coupling each end of the LLC resonant tank to a high voltage rail and a low voltage rail.

[0015] The fixed frequency and regulated duty-cycle of the switching control signals, and thus the predetermined sequence of activation of the full-bridge arrangement of the MOSFETs, can be selected such that the MOSFETs are deactivated in a zero voltage switching (ZVS) manner and the output rectifiers are deactivated in a zero current switching (ZCS) manner. Specifically, the MOSFETs can each include a parasitic capacitance and a body-diode. The parasitic capacitance can be alternately charged and discharged by the resonant current through the LLC resonant tank. Upon discharge of the parasitic capacitance by the resonant current, the body-diode can begin to conduct the resonant current. Therefore, the respective MOSFET can be activated subsequent to the conduction of the resonant current in the ZVS manner. In addition, based on changes in current flux through the transistor current in response to oscillation of the resonant current through the LLC resonant tank, the output current can change direction in the output stage. Therefore, the output current can decrease to a magnitude of approximately zero through one of the output rectifiers before being conducted through the other output rectifier, and thus the output rectifiers can be deactivated in the ZCS manner. Accordingly, the fixed- frequency LLC power regulator can be operated with improved input and loading regulation to result in substantially improved efficiency with substantially less electromagnetic interference (EMI) than typical LLC power regulators.

[0016] FIG. 1 illustrates an example of an LLC resonant power regulator system 10 in accordance with an aspect of the invention. The LLC resonant power regulator system 10 is configured to generate an output voltage V _OUT across a load R _L based on an input voltage V _IN . The LLC resonant power regulator system 10 can be implemented in a variety of applications, such as in any of a variety of portable electronic devices.

[0017] The LLC resonant power regulator system 10 includes a switching control stage

12 configured to generate a plurality of switching control signals. In the example of FIG. 1, the switching control signals are demonstrated as a set of four switching control signals SWi through SW ₄ . The LLC resonant power regulator system 10 also includes an input stage 14 that is interconnected between a high voltage rail, demonstrated as the input voltage V _IN , and a low voltage rail, demonstrated as ground. The input stage 14 includes a plurality of switches 16 that are controlled by the switching control signals SWi through SW ₄ . As an example, the switches 16 can be configured in a full- or H-bridge arrangement of switches coupled between voltage rails. For instance, the switches 16 include a first pair of switches interconnected between the rails by a first control node and a second pair of switches interconnected between the rails by a second control node. The control nodes define respective output nodes of the input stage that supply current to an LLC resonant tank 18 according to activation and deactivation of the switches 16.

[0018] The LLC resonant tank 18 is configured to conduct a resonant current I _RES in response to the operation of the switches 16. In the example of FIG. 1, the LLC resonant tank 18 includes a transformer 20, such that the resonant current I _RES ^can flow through the primary inductor of the transformer 20 as well as, for example, a leakage inductor and a resonant capacitor connected together in series. Thus, the LLC resonant tank 18 can have a first resonant frequency that is defined by the characteristics associated with the leakage inductor and the resonant capacitor, and can have a second resonant frequency that is defined by the characteristics associated with the leakage inductor, the primary inductor, and the resonant capacitor. The first resonant frequency can thus be greater than the second resonant frequency. [0019] As an example, the LLC resonant tank 18 can be interconnected between the first and second interconnecting control nodes in the input stage 14. The switching control signals SWi through SW ₄ can have a fixed frequency and a regulated duty-cycle, and can be asserted (i.e., logic-high) and de-asserted (i.e., logic-low) in a predetermined sequence. Therefore, the switches 16 can be operated by the switching control signals SWi through SW ₄ in the predetermined sequence to alternately couple each end of the LLC resonant tank 18 to the input voltage V _1N and to ground. Accordingly, the resonant current I _RES can resonate through the LLC resonant tank 18 at the first resonant frequency and the second resonant frequency based on the predetermined activation/deactivation sequence of the switches 16. The predetermined activation/deactivation sequence of the switches 16 can thus define phases of operation of the switches 16 based on the magnitude of the resonant current I _RES , as described herein. By controlling the switches as described herein, the voltage across the output nodes of the input stage can be provided as an alternating voltage, such as alternating between V _IN , 0 V, and V _IN , according to the phase of operation (see, e.g., FIG. 4). It will be appreciated that the voltages will vary depending on the input voltage and the reference voltage, depicted as ground in FIG. 1. [0020] In response to the oscillation of the resonant current I _RES through the primary inductor of the transformer 20, a secondary inductor of the transformer 20 generates an output current I _OUT - Specifically, the output current I _OUT is induced by the resonant current IRE _S based on a magnetic flux through the core of the transformer 20. The output current I _OUT can thus have a flow direction based on the direction of the magnetic flux through the core of the transformer 20 in response to the direction of flow of the resonant current I _RES - The output current I _OUT is provided to an output stage 22. The output stage 22 includes at least one output rectifier 24 that is configured to rectify the output current I _OUT to thus generate the output voltage V _OU T across the load R _L . As an example, the output rectifier(s) 24 can include a pair of DC rectifiers that are configured to alternately conduct the output current I _OUT based on the direction of flow of the output current I _OU T-

[0021] Based on the fixed frequency and regulated duty-cycle of the switching control signals SWi through SW ₄ , the LLC resonant power regulator system 10 can operate with improved input and loading regulation to result in substantially improved efficiency with substantially less electromagnetic interference (EMI) than typical LLC power regulators. Specifically, the switches 16 and the output rectifier(s) 24 can be soft-switched, such that they are operated in a zero voltage switching (ZVS) and a zero current switching (ZCS) manner, respectively, in response to the predetermined switching sequence of the switches 16 defined by the fixed frequency and regulated duty-cycle of the switching control signals SWi through SW ₄ . For example, the switching control signals SWi through SW ₄ can have a frequency that is selected to be greater than one or both of the first and second resonant frequencies of the LLC resonant tank 18. Therefore, the switches 16 can operate in the ZVS manner to operate the LLC resonant power regulator system 10 more efficiently and the output rectifier(s) 24 can operate in the ZCS manner to substantially mitigate reverse recovery oscillation via the transformer 20. [0022] FIG. 2 illustrates another example of an LLC resonant power regulator system 50 in accordance with an aspect of the invention. Similar to as described above in the example of FIG. 1, the LLC resonant power regulator system 50 is configured to generate an output voltage V _OU T across a load RL based on an input voltage V _IN . AS an example, the input voltage V _I N can be approximately 350 to 400 VDC to result in an output voltage V _O uτ of approximately 51 VDC. [0023] The LLC resonant power regulator system 50 includes an input stage 52 that is interconnected between a high voltage rail, demonstrated as the input voltage V _IN , and a low voltage rail, demonstrated as ground. The input stage 52 includes a plurality of switches, demonstrated in the example of FIG. 2 as metal-oxide semiconductor field effect transistors (MOSFETs) Qi, Q ₂ , Q ₃ , and Q ₄ that are controlled, respectively, by switching control signals SWi, SW ₂ , SW ₃ , and SW ₄ . In the example of FIG. 2, the MOSFET Q, is coupled to the input voltage V _IN , the MOSFET Q ₂ is coupled to ground, and the MOSFETs Qi and Q ₂ are interconnected in series by a control node 54 having a voltage V _A - Similarly, the MOSFET Q ₃ is coupled to the input voltage V _1N , the MOSFET Q ₄ is coupled to ground, and the MOSFETs Q ₃ and Q ₄ are interconnected in series by a control node 56 having a voltage Vβ. Therefore, the MOSFETs Qi through Q ₄ are arranged as a full-bridge.

[0024] FIG. 3 illustrates an example of a MOSFET 57 in accordance with an aspect of the invention. As an example, the MOSFET 57 can correspond to any one of the MOSFETs Q ₍ through Q ₄ in the input stage 52 of the example of FIG. 2. In the example of FIG. 3, the MOSFET 57 includes a parasitic capacitance Cp and a body-diode D _B that are coupled in parallel with the MOSFET 57 between the drain and source of the MOSFET 57. The parasitic capacitance Cp and the body-diode D _B can result from fabrication of the MOSFET 57, such that the parasitic capacitance Cp and the body-diode D _B are integral to the design of the MOSFET 57. As described herein, the parasitic capacitance Cp and the body-diode D _B , along with the interaction of the switching signals SWi through SW ₄ with the MOSFETs Qi through Q ₄ , can be implemented to switch the MOSFETs Qi through Q ₄ in the ZVS manner. [0025] Referring back to the example of FIG. 2, the LLC resonant power regulator system 50 also includes an LLC resonant tank 58 configured to conduct a resonant current I _R E _S in response to the activation and deactivation of the MOSFETs Qi through Q ₄ . In the example of FIG. 2, the LLC resonant tank 58 includes a primary inductor L _M of a transformer 60, a leakage inductor L _K , and a resonant capacitor C _R that are coupled in series between the first control node 54 and the second control node 56. Therefore, the resonant current I _RES can flow and resonate through the LLC resonant tank 58 in response to the activation and deactivation of the MOSFETs Qi through Q ₄ . The LLC resonant tank 58 has a first resonant frequency frl that is defined by the characteristics associated with the leakage inductor L _κ and the resonant capacitor C _R as follows:

1 f ^{rl =} , _* ..,, /T-TTT- Equat ⁱ on 1

Where: L _K is the inductance of the leakage inductor L _K ; and C _R is the capacitance of the resonant capacitor CR. The LLC resonant tank 58 also has a second resonant frequency fr2 that is defined by the characteristics associated with the leakage inductor L _K , the primary inductor L _M , and the resonant capacitor C _R as follows:

1 fr2 = , = Equation 2

^J 2* π* J (Lκ+ LM) -C _R ^H

Where: L _M is the inductance of the primary inductor L _M -

Therefore, Equations 1 and 2 demonstrate that the first resonant frequency frl is greater than the second resonant frequency fr2.

[0026] As described above, the resonant current I _RES is generated based on the switching of the MOSFETs Qi through Q ₄ . The switching control signals SWi through SW ₄ can have a fixed frequency and a regulated duty-cycle, and can be asserted and de-asserted in a predetermined sequence. Therefore, the MOSFETs Qi through Q ₄ can be operated by the switching control signals SWi through SW ₄ in the predetermined sequence to alternately couple each end of the LLC resonant tank 58 to the input voltage V _IN and to ground, such that the difference between the voltage V _A and the voltage V _B can be periodically switched between zero, a positive magnitude of the input voltage V _IN and a negative magnitude of the input voltage V _IN . Accordingly, the resonant current I _RES can alternate at resonating through the LLC resonant tank 58 at each of the first resonant frequency frl and the second resonant frequency fr2 based on the predetermined activation/deactivation sequence of the MOSFETs Qi through Q ₄ . [0027] In the example of FIG. 2, the resonant current I _RES is demonstrated as including a current I _LK flowing through the leakage inductor L _K and a current I _LM flowing through the primary inductor L _M - AS demonstrated in the example of FIG. 2, the transformer 60 includes a secondary inductor L ₀ that is coupled to the load R _L . Therefore, the loading of the secondary inductor Lo results in variation of the current I _LM relative to the current I _LK - Accordingly, as described herein, the current I _LM is a magnetizing current that is associated with a reactance of the primary inductor L _M based on the magnetic flux through the core of the transformer 60 lagging the induced EMF by approximately 90°. Specifically, as described above, the LLC resonant tank 58 has a first resonant frequency frl and a second resonant frequency fr2. As described herein, based on the predetermined sequence of the switching of the MOSFETs Qi through Q ₄ , the current I _LM and the current I _L κ can be unequal when the resonant current IRE _S resonates at the first resonant frequency frl. Additionally, the current I _LM and the current ILK can be equal when the resonant current I _RES resonates at the second resonant frequency fr2. [0028] In response to the oscillation of the resonant current I _RES through the primary inductor L _M of the transformer 60, a secondary inductor Lo of the transformer 60 generates an output current I _OUT that is induced in the secondary inductor Lo based on a magnetic flux through the core of the transformer 60. The output current I _OUT has a direction of current flow that is based on the direction of the magnetic flux through the core of the transformer 60 in response to the direction of flow of the resonant current I _RES - In the example of FIG. 2, each end of the secondary inductor Lo is coupled to an output stage 62 that includes a first output diode Di and a second output diode D ₂ . The output diodes Di and D ₂ are configured to rectify the output current I _OUT - Therefore, the output current I _OUT is provided as an output current Iouτ_i through the output diode Di or as an output current Iouτ_ ₂ through the output diode D ₂ , depending on the direction of current flow of the output current I _OUT through the secondary inductor Lo- Thus, the output diodes Di and D ₂ alternately conduct the output currents I _OUT i and Iouτ_2, respectively, based on the direction of current flow through the secondary inductor Lo- In the example of FIG. 2, the output currents I _OUT J and Iouτ_2 are conducted from a ground connection that is electrically isolated from the ground connection that is coupled to the input stage 52. It is to be understood, however, that electrical isolation of the ground connections may not be necessary, as dictated by the power-providing application. The output stage 62 also includes an output capacitor Co coupled in parallel with the load R _L . The output currents I _OUT J and Iouτ> as well as the output capacitor Co, are thus configured to maintain the magnitude of the output voltage V _OU T across the load R _L .

[0029] Similar to as described above in the example of FIG. 1 , based on the fixed frequency and regulated duty-cycle of the switching control signals SWi through SW ₄ , the LLC resonant power regulator system 50 can operate with improved input and loading regulation to result in substantially improved efficiency with substantially less EMI than typical LLC power regulators. The predetermined sequence of the switching control signals SWi through SW ₄ results in an operation cycle of the MOSFETs Qi through Q ₄ that includes charging the respective parasitic capacitance, free-wheeling the respective body-diode, discharging the respective parasitic capacitance, and free-wheeling the respective body-diode again. Therefore, the MOSFETs Qi through Q ₄ can all be activated in the ZVS manner based on the known operation cycle. As a result of the alternation of the difference between the voltages V _A and V _B in response to the fixed-frequency and regulated duty-cycle control of the MOSFETs Qi through Q ₄ , the LLC resonant power regulator system 50 acts as an AC/DC power regulator. In addition, based on the known oscillation of the resonant current I _RES through the LLC resonant tank 58, the magnitudes of the output currents Iouτ_i and Iouτ_2 can be controlled. Thus, the output diodes Dj and D ₂ can each be deactivated in the ZCS manner. Accordingly, the MOSFETs Qi through Q ₄ can operate in the ZVS manner to operate the LLC resonant power regulator system 50 more efficiently and the output diodes Di and D ₂ can operate in the ZCS manner to substantially mitigate reverse recovery oscillation.

[0030] It is to be understood that the LLC resonant power regulator system 50 is not intended to be limited to the example of FIG. 2. For example, the LLC resonant power regulator system 50 is not limited to implementing MOSFETs, but could instead use one of a variety of other types of FETs instead of the MOSFETs Qi through Q ₄ . As another example, the resonant capacitor C _R is not intended to be limited to being coupled between the leakage inductor L _K and the first control node 54, but could instead be coupled between the primary inductor L _M and the second control node 56. In addition, in the example of FIG. 2, the first and second diodes Di and D ₂ are demonstrated as Schottky diodes. However, it is to be understood that the first and second diodes Di and D ₂ are not limited to implementation as Schottky diodes. Accordingly, those skilled in the art will understand and appreciate that the LLC resonant power regulator system 50 can be configured in any of a variety of ways based on the teachings herein. [0031] FIG. 4 illustrates an example of a timing diagram 100 in accordance with an aspect of the invention. The timing diagram 100 can correspond to the LLC resonant power regulator system 50 in the example of FIG. 2. Therefore, reference is to be made to the example of FIG. 2 in the following description of the example of FIG. 4.

[0032] The timing diagram 100 demonstrates an example of the predetermined sequence of the switching control signals SWi through SW ₄ over time. Specifically, the predetermined sequence is demonstrated as a sequence of eight phases, demonstrated in the example of FIG. 4 as PHASE 1 through PHASE 8. The predetermined sequence begins at a time T ₀ in PHASE 1 which continues through a time Ti. Thus, the LLC resonant power regulator system 50 operates in PHASE 1 from the time T ₀ to the time Ti. Similarly, the LLC resonant power regulator system 50 operates in PHASE 2 from the time Ti to a time T ₂ , in PHASE 3 from the time T ₂ to a time T ₃ , in PHASE 4 from the time T ₃ to a time T ₄ , in PHASE 5 from the time T ₄ to a time T ₅ , in PHASE 6 from the time T ₅ to a time T ₆ , in PHASE 7 from the time T ₆ to a time T ₇ , and in PHASE 8 from the time T ₇ to a time T ₈ . Therefore, the example of FIG. 4 demonstrates diagrammatically that PHASES 2, 4, 6, and 8 are significantly shorter than PHASES 1, 3, 5, and 7. However, it is to be understood that the demonstrated phases are not necessarily demonstrated to scale. For example, PHASES 1, 3, 5, and 7 can be substantially longer than as demonstrated in the example of FIG. 4 relative to PHASES 2, 4, 6, and 8. In addition, the switching control signals SWi through SW ₄ are demonstrated as logic-high to correspond to activation of the respective MOSFETs Qi through Q ₄ . However, it is to be understood that MOSFETs Qi through Q ₄ could instead be activated by logic-low states of the switching control signals SWi through SW ₄ .

[0033] In PHASE 1, the switching control signals SWi and SW ₄ are demonstrated as asserted and the switching control signals SW ₂ and SW ₃ are demonstrated as de-asserted. Therefore, the MOSFETs Qi and Q ₄ are activated and the MOSFETs Q ₂ and Q ₃ are deactivated in PHASE 1. Thus, a voltage V _AB (i e., the difference between the voltage V _A and the voltage V _B at the respective control nodes 54 and 56) is positive in PHASE 1. The current I _LK through the leakage inductor L _K increases substantially sinusoidally from a negative magnitude (i.e., relative to as demonstrated in the example of FIG. 2) while the current I _LM through the primary inductor L _M increases substantially linearly from approximately the same magnitude at the time To, such as based on a constant voltage across the primary inductor L _M - AS an example, the transistor 60 can have a number of turns of the primary and secondary windings that is approximately a ratio of 94:13. Therefore, the constant voltage across the primary inductor L _M can be approximately equal to (V _O uτ * 94/13). During PHASE 1 each of the currents ILK and I _LM reverse direction, and thus become positive. The resonant current I _RES is therefore resonating at the first resonant frequency ^r/ during PHASE 1. In addition, based on the direction of the magnetic flux through the transformer 60, the output current Iouτ_i increases from a magnitude of approximately zero at the time T ₀ .

[0034] At the time Ti, at the beginning of PHASE 2, the switching control signal SWi is de-asserted to deactivate the MOSFET Qi. However, the currents L _κ and L _M continue to flow. In response, the parasitic capacitance Cpi of the MOSFET Qi is charged and a parasitic capacitance C _P2 of the MOSFET Q ₂ is discharged, demonstrated in the example of FIG. 4 as a positive current pulse Icpi and a negative current pulse Iςp ₂ during PHASE 2. Upon discharge of the parasitic capacitance Cp ₂ of the MOSFET Q ₂ , the body-diode D _B2 of the MOSFET Q ₂ can begin to conduct the resonant current I _RES during PHASE 2. The conduction of the resonant current I _RES through the body-diode D _B2 of the MOSFET Q ₂ results in a drain-source voltage VD _S across the MOSFET Q ₂ of approximately 0 volts. Accordingly, at the time T ₂ , the switching control signal SW ₂ is asserted to activate the MOSFET Q ₂ in the ZVS manner. [0035] In PHASE 3, upon activation of the MOSFET Q ₂ , the voltage V _AB becomes approximately equal to zero. The current I _LK through the leakage inductor L _K thus begins to decrease. In response, the output current I _OU TJ likewise begins to decrease. The current ILM through the primary inductor L _M , however, continues to increase substantially linearly. Upon the current I _LK and I _LM becoming approximately equal, the currents I _LK and I _LM become substantially constant and the output current I _OUT J decreases to a magnitude of approximately zero. Therefore, the resonant current I _RES begins to resonate at the second resonant frequency fr2. In addition, because the resonant current I _RES resonates at the second resonant frequency fr2, the magnetic flux through the core of the transformer 60 is approximately zero, resulting in no induced current in the secondary inductor Lo of the transformer 60. Therefore, the output capacitor COUT discharges to maintain the output voltage V _OUT - At the end of PHASE 3, the voltage in the resonant capacitor C _R reverses due to the resonance of the LLC resonance tank 58. [0036] At the time T ₃ , at the beginning of PHASE 4, the switching control signal SW ₄ is de-asserted to deactivate the MOSFET Q ₄ . However, the resonant current I _RES continues to flow. In response, a parasitic capacitance Cp ₄ of the MOSFET Q ₄ is charged and a parasitic capacitance Cp ₃ of the MOSFET Q ₃ is discharged, demonstrated in the example of FIG. 4 as a positive current pulse Icp ₄ and a negative current pulse Iςp ₃ during PHASE 4. Upon discharge of the parasitic capacitance Cp ₃ of the MOSFET Q ₃ , the body-diode D _B3 of the MOSFET Q ₃ can begin to conduct the resonant current I _RES during PHASE 4. The conduction of the resonant current I _RES through the body-diode D _B3 of the MOSFET Q ₃ results in a drain-source voltage VD _S across the MOSFET Q ₃ of approximately O volts. Accordingly, at the time T ₄ , the switching control signal SW ₃ is asserted to activate the MOSFET Q ₃ in the ZVS manner. [0037] In PHASE 5, upon activation of the MOSFET Q ₃ , the voltage V _AB becomes negative. Thus, the resonant current I _RES begins to resonate at the first resonant frequency frl again. Specifically, the current I _LK through the leakage inductor L _K begins to decrease substantially sinusoidally from the positive magnitude while the current I _LM through the primary inductor L _M begins to decrease substantially linearly from approximately the same magnitude at the time T ₄ , such as based on a constant voltage across the primary inductor L _M - During PHASE 5 each of the currents I _LK and I _LM reverse direction, and thus become positive. In addition, based on the reversed direction of the magnetic flux through the transformer 60, the output current Iouτ_2 increases from a magnitude of approximately zero at the time T ₄ .

[0038] At the time T ₅ , at the beginning of PHASE 6, the switching control signal SW ₂ is de-asserted to deactivate the MOSFET Q ₂ . However, the currents L _K and L _M continue to flow. In response, a parasitic capacitance Cp ₂ of the MOSFET Q ₂ is charged and a parasitic capacitance C _P i of the MOSFET Q ₁ is discharged, demonstrated in the example of FIG. 4 as a positive current pulse Icp ₂ and a negative current pulse Icpi during PHASE 6. Upon discharge of the parasitic capacitance Cpi of the MOSFET Qi, the body-diode D _B i of the MOSFET Qi can begin to conduct the resonant current I _RE s during PHASE 6. The conduction of the resonant current I _RES through the body-diode D _B i of the MOSFET Qi results in a drain-source voltage V _D s across the MOSFET Qi of approximately 0 volts. Accordingly, at the time T ₆ , the switching control signal SWi is asserted to activate the MOSFET Qi in the ZVS manner. [0039] In PHASE 7, upon activation of the MOSFET Qi, the voltage V _AB becomes approximately equal to zero. The current I _LK through the leakage inductor L _K thus begins to increase. In response, the output current I _{OUT 2} likewise begins to decrease. The current I _LM through the primary inductor L _M , however, continues to decrease substantially linearly. Upon the current I _LK and I _LM becoming approximately equal, the currents I _LK and I _LM become substantially constant and the output current Iouτ_ ₂ decreases to a magnitude of approximately zero. Therefore, the resonant current I _RES again begins to resonate at the second resonant frequency^. In addition, because the resonant current I _RES resonates at the second resonant frequency fr2, the magnetic flux through the core of the transformer 60 is approximately zero, resulting in no induced current in the secondary inductor Lo of the transformer 60. Therefore, the output capacitor COUT again discharges to maintain the output voltage V _OUT - At the end of PHASE 7, the voltage in the resonant capacitor C _R again reverses due to the resonance of the LLC resonance tank 58.

[0040] At the time T ₇ , at the beginning of PHASE 8, the switching control signal SW ₃ is de-asserted to deactivate the MOSFET Q ₃ . However, the resonant current I _RES continues to flow. In response, a parasitic capacitance Cp ₃ of the MOSFET Q ₃ is charged and a parasitic capacitance Cp ₄ of the MOSFET Q ₄ is discharged, demonstrated in the example of FIG. 4 as a positive current pulse Icp ₃ and a negative current pulse Icp ₄ during PHASE 8. Upon discharge of the parasitic capacitance Cp ₄ of the MOSFET Q ₄ , the body-diode D _B4 of the MOSFET Q ₄ can begin to conduct the resonant current I _RES during PHASE 8. The conduction of the resonant current I _RES through the body-diode D _B4 of the MOSFET Q ₄ results in a drain-source voltage VD _S across the MOSFET Q ₄ of approximately O volts. Accordingly, at the time T ₈ , the switching control signal SW ₄ is asserted to activate the MOSFET Q ₄ in the ZVS manner. Therefore, the predetermined sequence repeats beginning at the time T ₈ , at which the LLC resonant power regulator system 50 again enters PHASE 1. [0041] In view of the foregoing structural and functional features described above, certain methods will be better appreciated with reference to FIG. 5. It is to be understood and appreciated that the illustrated actions, in other embodiments, may occur in different orders and/or concurrently with other actions. Moreover, not all illustrated features may be required to implement a method.

[0042] FIG. 5 illustrates an example of a method 150 for generating an output voltage via an LLC resonant power regulator in accordance with an aspect of the invention. At 152, a plurality of switching control signals having a fixed frequency and a regulated duty-cycle are generated. The switching control signals can be generated from a switching control stage, or any of a variety of other types of processing or clock generating components. At 154, a plurality of switches arranged as a full-bridge are activated in a predetermined sequence in an input stage of the LLC resonant power regulator in response to the plurality of switching signals. The predetermined sequence can define a plurality (e.g., eight) of phases of operation. The switches can be configured as MOSFET switches, and the full-bridge can have first and second control nodes.

[0043] At 156, a resonant current is generated through an LLC resonant tank in response to the activation of the plurality of switches. The LLC resonant tank can include a series connection of a primary inductor of a transformer, a leakage inductor, and a resonant capacitor. The resonant current can include a leakage current through the leakage inductor and a magnetizing current that is associated with the reactance of the primary inductor. At 158, parasitic capacitances associated with the plurality of switches are discharged in the predetermined sequence in response to the resonant current to activate the plurality of switches in a ZVS manner. Each of the switches can also include a body-diode that conducts the resonant current just prior to the activation of the switch. At 160, an output current is generated at a secondary inductor of the transformer. The output current can be induced by the magnetic flux that results from the resonant current flow through the primary inductor. [0044] At 162, the output current is conducted through at least one rectifier in a ZCS manner. The at least one rectifier can include a pair of output diodes that alternately conduct the output current. The direction of the current flow of the output current can change in the secondary inductor based on changes in the magnetic flux through the core. Thus, the current through one of the diodes can decrease to a magnitude of zero before beginning to conduct through the other diode. At 164, an output voltage is generated at an output of the LLC resonant power converter in response to the output current. The output voltage can be maintained by an output capacitor when the magnitude of the output current is approximately zero. [0045] What have been described above are examples of the invention. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the invention, but one of ordinary skill in the art will recognize that many further combinations and permutations of the invention are possible. Accordingly, the invention is intended to embrace all such alterations, modifications, and variations that fall within the scope of this application, including the appended claims.