Title:
FLATTENED SUBSTRATE SURFACE FOR SUBSTRATE BONDING
Document Type and Number:
WIPO Patent Application WO/2013/066455
Kind Code:
A3
Abstract:
Methods for bonding substrate surfaces, bonded substrate assemblies, and design structures for a bonded substrate assembly. Device structures (18, 19, 20, 21) of a product chip (25) are formed using a first surface (15) of a device substrate (10). A wiring layer (26) of an interconnect structure for the device structures is formed on the product chip. The wiring layer is planarized. A temporary handle wafer (52) is removably bonded to the planarized wiring layer. In response to removably bonding the temporary handle wafer to the planarized first wiring layer, a second surface (54) of the device substrate, which is opposite to the first surface, is bonded to a final handle substrate (56). The temporary handle wafer is then removed from the assembly.
Inventors:
COONEY EDWARD C (US)
DUNN JAMES S (US)
MARTIN DALE W (US)
MUSANTE CHARLES F (US)
RAINEY BETHANN (US)
SHI LEATHEN (US)
SPROGIS EDMUND J (US)
TSANG CORNELIA K (US)
DUNN JAMES S (US)
MARTIN DALE W (US)
MUSANTE CHARLES F (US)
RAINEY BETHANN (US)
SHI LEATHEN (US)
SPROGIS EDMUND J (US)
TSANG CORNELIA K (US)
Application Number:
PCT/US2012/049414
Publication Date:
May 08, 2014
Filing Date:
August 03, 2012
Export Citation:
Assignee:
IBM (US)
COONEY EDWARD C (US)
DUNN JAMES S (US)
MARTIN DALE W (US)
MUSANTE CHARLES F (US)
RAINEY BETHANN (US)
SHI LEATHEN (US)
SPROGIS EDMUND J (US)
TSANG CORNELIA K (US)
COONEY EDWARD C (US)
DUNN JAMES S (US)
MARTIN DALE W (US)
MUSANTE CHARLES F (US)
RAINEY BETHANN (US)
SHI LEATHEN (US)
SPROGIS EDMUND J (US)
TSANG CORNELIA K (US)
International Classes:
H01L23/48; H01L21/58
Foreign References:
| US6864585B2 | 2005-03-08 | |||
| US20110012199A1 | 2011-01-20 | |||
| US5820770A | 1998-10-13 | |||
| US6902987B1 | 2005-06-07 | |||
| US6281042B1 | 2001-08-28 |
Attorney, Agent or Firm:
CANALE, Anthony, J. (Intellectual Property Law 972E1000 River Stree, Essex Junction VT, US)
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