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Title:
FLEXIBLE ROUTE STRUCTURE OF SEMICONDUCTOR CHIP
Document Type and Number:
WIPO Patent Application WO/2005/038240
Kind Code:
A1
Abstract:
A flexible route structure in which by using a semiconductor chip for wiring, a fine, high-density wiring is provided, a connection line can be flexibly defined, consequently the production yield can be significantly enhanced by avoiding a defective portion, if any, of a produced discrete semiconductor chip, the delay time between points can be controlled by flexible selection of a connection line, and even an electric circuit itself can be flexibly defined on a semiconductor chip depending on the combination. The structure is characterized in that units serving as minimum units for connection are laid between points on a semiconductor chip, and units are so selected as to avoid an inactive region on the semiconductor chip to define a connection line between points.

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Inventors:
NAGATA MASAHIRO (JP)
YOSHIOKA SUGURU (JP)
EMA FUMIAKI (JP)
Application Number:
PCT/JP2003/013288
Publication Date:
April 28, 2005
Filing Date:
October 17, 2003
Export Citation:
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Assignee:
NIHON COMP CO LTD (JP)
NAGATA MASAHIRO (JP)
YOSHIOKA SUGURU (JP)
EMA FUMIAKI (JP)
International Classes:
F02B23/08; F02D9/02; F02D9/14; F02D9/16; F02M69/00; F02M69/04; G06F17/50; H01L23/528; (IPC1-7): F02M69/00; F02B23/08; F02D9/02; F02D9/14; F02D9/16; F02M69/04
Foreign References:
JPH11297834A1999-10-29
JP2002203906A2002-07-19
EP0481703A21992-04-22
JPH04352354A1992-12-07
JPH0360143A1991-03-15
Attorney, Agent or Firm:
Koshikawa, Takao (111-2 Itayamach, Hamamatsu-shi Shizuoka, JP)
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