CONVERTER

BACKGROUND

[0001 ] A flyback converter is a switch mode power supply circuit that can be used in applications such as AC-to-DC (alternating current-to-direct current) adapters and battery chargers and for converting an input power from a power source to an output power. The output power can be regulated by controlling the duty-cycle of a Pulse-Width Modulation (PWM) signal, which is a control signal that controls the status of a switch in the flyback converter. However, the output power of a conventional flyback converter will vary accordingly when the input voltage is changed, e g., from 85V to 265V. Thus, a flyback converter that provides a predetermined output power is needed.

SUMMARY

[0002] In an embodiment, a flyback converter is configured to receive an input voltage from a power source. The controller is coupled to the transformer via a switch, and is configured to receive a first signal indicating a first voltage, generate a second signal indicating a second voltage according to a first current flowing through the transformer, and generate a control signal to control the switch according to a comparison result of the first signal and the second signal, where the second voltage varies inversely to variations in the input voltage.

[0003] In another embodiment, a controller for controlling a flyback converter includes a first sensing terminal, a comparator, a signal generator, and a driver. The first sensing terminal is configured to receive a first signal indicating a first voltage. The comparator is configured to receive the first signal from the first sensing terminal and a second signal indicating a second voltage, and compare the first signal with the second signal. The signal generator is coupled to the comparator and is configured to generate the second signal according to a first current flowing through a transformer of the flyback converter. The driver is coupled to the comparator and is configured to generate a control signal according to a comparison result of the first signal and the second signal, where the second voltage varies inversely to variations in an input voltage of the flyback converter.

[0004] In yet another embodiment, a method for controlling a flyback converter by a controller includes: receiving a first signal indicating a first voltage;

generating a second signal indicating a second voltage according to a first current flowing through a transformer of the flyback converter; and generating a control signal to control a switch of the flyback converter according to a comparison result of the first signal and the second signal, where the second voltage varies inversely to variations in an input voltage of the flyback converter.

BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Features and advantages of embodiments of the claimed subject matter will become apparent as the following detailed description proceeds, and upon reference to the drawings, wherein like numerals depict like parts. These example embodiments are described in detail with reference to the drawings. These

embodiments are non-limiting example embodiments, in which like reference numerals represent similar structures throughout the several views of the drawings. [0006] FIG. 1 shows a schematic diagram of a flyback converter, in an embodiment of the present invention.

[0007] FIG. 2 shows an example of a controller in the flyback converter in FIG. 1 , in an embodiment of the present invention.

[0008] FIG. 3 shows waveforms of signals associated with the flyback converter in FIG. 1 , in an embodiment of the present invention.

[0009] FIG. 4 shows a schematic diagram of a flyback converter, in another embodiment of the present invention.

[0010] FIG. 5 shows a flowchart of a method for controlling a flyback

converter, in an embodiment of the present invention.

DETAILED DESCRIPTION

[001 1 ] Reference will now be made in detail to the embodiments of the present teaching. While the present teaching will be described in conjunction with these embodiments, it will be understood that they are not intended to limit the present teaching to these embodiments. On the contrary, the present teaching is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the present teaching as defined by the appended claims.

[0012] Furthermore, in the following detailed description of the present teaching, numerous specific details are set forth in order to provide a thorough

understanding of the present teaching. However, it will be recognized by one of ordinary skill in the art that the present teaching may be practiced without these specific details. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the present teaching.

[0013] FIG. 1 shows a schematic diagram of a flyback converter 100, in an embodiment of the present invention. The flyback converter 100 includes a rectifier 102, a transformer 104, a controller 106, and a switch 108. The rectifier 102 includes multiple diodes, e.g. , D1 , D2, D3, and D4, which constitute a bridge rectifier to rectify an input voltage V _A c from a power source to a rectified input voltage V| _N . The transformer 104 includes a primary winding LM coupled to the power source through the rectifier 102 for receiving the input voltage V| _N , a secondary winding LS coupled to a load 1 10 for providing power to the load 1 10, a magnetic core 142, and an auxiliary winding LF. The primary winding LM is coupled in parallel with an inductor L1 which is coupled in series with the switch 108. Moreover, the switch 108 is coupled in series with a resistor RCS.

[0014] The controller 106 is coupled to the transformer 104 via the switch 108. As shown in the example of FIG. 1 , the controller 106 is coupled to the primary winding LM of the transformer 104 via the switch 108. In an embodiment, the controller 106 includes a terminal VDD for receiving power from the power source, a control terminal GATE for providing a control signal DRV to control the status of the switch 108, a current sensing terminal CS for receiving a first signal VCS indicating a first voltage V _C s, e.g. , the voltage across the resistor RCS as shown in FIG. 1 , and a sensing terminal FB coupled to the auxiliary winding LF of the transformer 104 via a resistor RFB1 for sensing a voltage V _F B at the node FB and providing a first current I _F B flowing through the auxiliary winding LF of the transformer 104. [0015] In an embodiment, the controller 106 receives the first signal VCS indicating the first voltage V _C s, e.g., the voltage across the resistor RCS, generates a second signal PEAK indicating a second voltage V _pea k (not shown in FIG. 1 ) according to the first current I _F B flowing through the transformer 104, and generates the control signal DRV to control the switch 108 according to a comparison result of the first signal VCS and the second signal PEAK. In an embodiment, the control signal DRV is a pulse-width-modulation (PWM) signal, and the second voltage V _pea k varies inversely to variations in the input voltage V| _N ; that is, when the input voltage V| _N increases, the second voltage V _pea k decreases, and when the input voltage V| _N decreases, the second voltage V _pea k increases. As a result, the duty cycle of the control signal DRV varies inversely to variations in the input voltage VI to maintain the output power POUT of the transformer 104 substantially constant when the input voltage V| _N changes.

[0016] FIG. 2 shows an example of the controller 106 in the flyback converter 100 in FIG. 1 , in an embodiment of the present invention. FIG. 2 will be illustrated in combination with FIG. 1 . The controller 106 includes terminals VDD, FB, GND, CS, and GATE. Terminal VDD is coupled to rectifier 102 for receiving the input voltage from the power source and providing power to the controller 106. The current sensing terminal CS receives a first signal VCS indicative of a first voltage V _C s, e.g., the voltage across the resistor RCS _. The sensing terminal FB senses the voltage VFB at the node FB and outputs the current I _F B flowing through the auxiliary winding LF of the transformer 104. The control terminal GATE outputs the control signal DRV to control the status of the switch 108.

[0017] As shown in FIG. 2, the controller 106 includes a clamping circuit 210, a signal generator 212, a comparator 214, and a driver 216. In an embodiment, the clamping circuit 210 is configured to sense the voltage V _F B via the sensing terminal FB, generate the first current I _F B, and output the first current I _F B flowing through the transformer 104, e.g. , the auxiliary winding LF of the transformer 104, to clamp the voltage V _F B at the node FB to a predetermined value, e.g. , 50mv (millivolts), which is approximately zero voltage. Therefore, the resister RFB1 , the auxiliary winding LF, and the ground compose a circuit loop. As the auxiliary winding LF is magnetically coupled to the primary winding LM of the transformer 104, the first current l _FB flowing through the auxiliary winding LF is indicative of the input voltage V| _N .

[0018] More specifically, as shown in FIG. 1 , the first current l _FB can be calculated based on an equation (1 ) as below:

where V _LF represents a voltage across the auxiliary winding LF, and R _FB i is the resistance of the resistor RFB1 which is known in equation (1 ).

[0019] The voltage V _LF can be calculated based on an equation (2) as below:

V _LF = -^ * V _IN (2)

N M

where N _M represents the number of coils of the primary winding LM which is an integer that is greater than one, and N _F represents the number of coils of the auxiliary winding LF which is an integer that is greater than one; N _M and N _F are all known. Thus, the l _FB can be obtained as below:

I _FB = ^ * - i£L ₍₃₎

^N M ^R FB l

[0020] According to the equation (3) as shown above, the first current l _FB is proportional to the input voltage V| _N by the ratio of the number of coils of the auxiliary winding to the number of coils of the primary winding times the resistance of the resistor RFB1 (N _F /(NM*RFBI)), SO the first current I _F B is indicative of the input voltage V| _N of the transformer 104.

[0021 ] Referring to FIG. 2, the signal generator 212 is configured to divide the first current I _F B by an integer K1 to generate a divided first current l _FB , and generate a second signal PEAK indicating a second voltage V _pea k based on the divided first current l _FB . More specifically, the second voltage V _pea k can be calculated based on an equation (4) as below:

V _PEAK = V _ref - ¾^ (4)

where V _re f represents a predetermined reference voltage which is known, and K1 is an integer which is greater than one. For example, in an embodiment, K1 is equal to 50. R-i is the resistance of the resistor R1 coupled to the rectifier 102 as shown in FIG. 1 , and the value of the resistor R1 is known in equation (4). Combining equation (3) and equation (4), the voltage V _pea k can be calculated according to equation (5) as below:

Vp _EAK = V„ _r - ¾ . ^ . ¾ (5)

[0022] Therefore, the second voltage V _pea k varies inversely to variations in the input voltage V| _N . For example, when the input voltage V| _N increases, the voltage V _pea k decreases, while when the input voltage V| _N decreases, the voltage V _pea k increases accordingly.

[0023] As shown in the example of FIG. 2, the non-inverting terminal of the comparator 214 receives the first signal VCS and the inverting terminal of the comparator 214 receives the second signal PEAK. The comparator 214 compares the first signal VCS with the second signal PEAK to generate a comparison signal CMP. The driver 216 is configured to generate the control signal DRV based on the comparison signal CMP output from the comparator 214. As the second voltage indicated by the second signal PEAK varies inversely to variations in the input voltage VIM, the duty cycle of the control signal DRV varies inversely to variations in the input voltage V| _N accordingly. A detailed explanation will be described in combination with F I G. 3.

[0024] F IG. 3 shows waveforms of signals associated with the flyback converter 100 in FI G. 1 , in an embodiment according to the present invention. F IG.3 is described in combination with F IG. 1 and FI G. 2.

[0025] As shown in F IG. 3, at time to, the power source provides an input power VAC which is rectified by the rectifier 102 into the rectified input voltage V| _N , and the rectified voltage V| _N is provided to the transformer 104 and the inductor L1 when the switch 108 is switched on initially. Then energy is stored in the primary winding LM of the transformer 104 and the inductor L1 is charged; therefore, the current l _C s flowing through the resistor RCS increases and the voltage across the resistor RCS increases accordingly. Thus, the first voltage V _C s, e.g., the voltage across the resistor RCS as shown in F I G. 1 , sensed by the controller 106 via the pin CS, increases accordingly. The controller 106 outputs the first current I _F B to clamp the voltage V _F B at the node FB at a predetermined voltage, and generates the second signal PEAK indicative of the second voltage V _PE AK according to the equation (5) as above. The comparator 214 compares the first signal VCS and the second signal PEAK.

[0026] At time t1 , the first signal VCS reaches the second signal PEAK, which indicates that the first voltage V _C s, e.g., the voltage across the resistor RCS _, has reached the second voltage V _pea k- Then the comparator 214 outputs a comparison signal CMP to the signal generator 212, and the signal generator 212 generates the control signal DRV at a logic low state according to the comparison signal CMP, which turns off the switch 108. The time-on period of the control signal DRV is T ₀ NI as shown in FI G. 3.

[0027] At time t2, the input voltage V _A c increases and the rectified input voltage V| _N increases accordingly. As the second voltage V _pea k is calculated according to the first current I _F B which indicates the input voltage V| _N, the second voltage V _pea k varies inversely to variations in the input voltage V| _N , and the voltage V _pea k decreases when the input voltage V| _N increases. At time t3, the first signal VCS reaches the second signal PEAK, which indicates that the first voltage V _C s, e.g., the voltage across the resistor RCS, has reached the second voltage V _pea k- Then the control signal DRV is at a logic low state at time t3, which turns off the switch 108. The time-on period of the control signal DRV is T _0N2 as shown in FI G. 3.

[0028] As the voltage V _pea k decreases with the increasing of the input voltage VIN, the first signal VCS reaches the second signal PEAK in a relatively shorter time compared to the time period from to to t1 . Thus, T ₀ N2 is shorter than T ₀ NI , which indicates the duty cycle of the control signal DRV decreases when the input voltage V| _N increases.

[0029] At time t4, the input voltage V _A c decreases and the rectified input voltage V| _N decreases accordingly. As a result, the second voltage V _pea k increases accordingly because the second voltage V _pea k varies inversely to variations in the input voltage V| _N as stated above. At time t5, the first signal VCS reaches the second signal PEAK, which indicates that the first voltage V _C s, e.g., the voltage across the resistor RCS, reaches to the second voltage V _pea k. Then the control signal DRV turns to a logic low state at time t5, which turns off the switch 108. The time-on period of the control signal DRV is T ₀ N ₃ as shown in FIG. 3.

[0030] As the second voltage V _pea k increases according to the decreasing of the input voltage V| _N , the first signal VCS reaches the second signal PEAK in a relatively longer time compared to the time period from t2 to t3. Thus, TON3 is longer than TON2, which indicates the duty cycle of the control signal DRV increases when the input voltage V| _N decreases. Therefore, the duty cycle of the control signal DRV varies inversely to variations in the input voltage V| _N .

[0031 ] As described above, the second voltage V _pea k of the controller 106 varies inversely to variations in the input voltage V| _N , thus the duty cycle of the switch 108 varies inversely to variations in the input voltage V| _N . Therefore, the output power of the flyback converter 100 can be maintained approximately at a predetermined value (a value that is constant or substantially constant over time, which means that the output power may vary, but is within a range that the variation can be neglected), which increases the flexibility of the flyback converter.

[0032] FIG. 4 shows a schematic diagram of a flyback converter 400, in an embodiment according to the present invention. The flyback converter 400 includes a rectifier 102, a transformer 104, a controller 106, a switch 108, and a compensation resistor RCS1 . Elements labeled the same as in FIG. 1 have similar functions and will not be repetitively described herein.

[0033] As shown in FIG. 4, the compensation resister RCS1 is coupled between the controller 106 and the resister RCS. More specifically, the compensation resistor RCS1 is coupled to the current sensing terminal CS of the controller 106. In an embodiment, the current sensing terminal CS receives a compensation voltage V _RC si across the compensation resistor RCS1 and a voltage across the resistor RCS. Thus, the first voltage V _C s received by the controller 106 is the voltage sum of the

compensation voltage V _RC si and the voltage across the resistor RCS. The controller 106 clamps the voltage VFB at the node FB to a predetermined value, e.g. , 50mv, which is approximately zero voltage, to generate and output the first current I _F B flowing through the transformer 104, e.g. , the auxiliary winding LF of the transformer 104. In an embodiment, the controller 106 divides the first current I _F B by an integer K2, and generates a second current I _C S2 according to the divided first current I _F B and outputs the second current I _C S2 via the current sensing terminal CS to the compensation resister RCS1 to generate the compensation voltage V _RC si- In an embodiment, the second current I _C S2 is proportional to the first current I _F B, e.g., the second current I _C S2 is equal to the first current l _FB times a ratio of 1/K2, indicating that the first current l _FB is K2 times the second current I _C S2; that is, when the first current l _FB increases, the second current Ics ₂ increases, and when the first current l _FB decreases, the second current I _C S2 decreases. Therefore, the first voltage V _C s of the voltage at terminal CS can be calculated according to an equation (6) as shown below:

Vcs ⁼ lcs2*Rcsi ⁺ lcs*Rcs (6)

where R _C si is the resistance of the compensation resistor RCS1 , I _C S2 is the current which flows through the compensation resistor RCS1 , the product of lcs2*Rcsi is the compensation voltage V _RC si, and l _C s is the current which flows through the resistor RCS. As I cs ₂ is generated by sampling the first current I _F B at a frequency of K2 Hz, the equation (6) can be simplified as below:

where K2 is an integer and greater than 1 . [0034] In an embodiment, the controller 106 generates the second signal PEAK indicating the second voltage V _pea k according to the first current I _F B flowing through the transformer 104, and generates the control signal DRV to control the switch 108 according to a comparison result of the first signal VCS and the second signal PEAK. In an embodiment, the voltage V _pea k can be calculated according to equation (5) as shown above.

[0035] As the compensation resistor RCS1 is coupled between the terminal CS of the controller 106 and the resistor RCS, the first voltage V _C s received by the controller 106 in FIG. 4 is greater than the first voltage received by the controller 106 in FIG. 1 . Therefore, when comparing the first signal VCS indicative of the first voltage Vcs with the second signal PEAK indicative of the second voltage V _pea k, the first voltage Vcs in FIG. 4 can reach the second voltage V _pea k in a shorter time than it takes for the first voltage V _C s in FIG. 1 to reach the second voltage V _pea k, which improves the flexibility of the flyback converter.

[0036] FIG. 5 shows a flowchart 500 of a method for controlling a flyback converter, in an embodiment according to the present invention. The flowchart 500 is described in combination with FIG. 1 , FIG. 2, and FIG. 3 as an example. The method disclosed in FIG 5 can also be applied to control the flyback converter 400 in FIG. 4.

[0037] In an embodiment, a transformer 104 in the flyback converter 100 receives an input voltage V| _N rectified by a rectifier 102 from a power source.

[0038] In step 502, a controller 106 of the flyback converter 100 receives a first signal VCS indicating a first voltage V _C s- In the example of FIG. 1 , the first voltage Vcs is the voltage across a resistor RCS, and in the example of FIG. 4, the first voltage Vcs indicates the voltage sum across the resistor RCS and a compensation resistor RCS1 .

[0039] In step 504, the controller 106 generates a second signal PEAK indicating a second voltage V _pea k according to a first current I _F B flowing through the transformer 104 of the flyback converter 100. In an embodiment, a clamping circuit 210 of the controller 106 senses a voltage V _F B at the node FB, and clamps the sensed voltage V _F B at a predetermined value, e.g. 50mv, which is approximately zero voltage, to generate the first current l _FB . In an embodiment, the first current l _FB can be calculated according to equation (3) as shown above and is proportional to the input voltage V| _N . The second voltage V _pea k can be calculated according to equation (5); therefore, the second voltage V _pea k varies inversely to variations in the input voltage V| _N.

[0040] In step 506, the controller 106 compares the first signal VCS with the second signal PEAK to generate a control signal DRV to control a switch 108 of the flyback converter 100. Specifically, if the first signal VCS is lower than the second signal PEAK, then the controller 106 outputs the control signal DRV with a logic high state to turn on the switch 108. If the first signal VCS reaches the second signal PEAK, then the controller 106 outputs the control signal DRV with the logic low state to turn off the switch 108. The switch 108 remains off until the controller 106 gets into the next working cycle, such that the control signal DRV turns to a logic high state and the switch

108 is turned on again. Specifically, the oscillating frequency of the controller 106 is set to be a predetermined value, e.g., a value selected from 60 KHz to 130 KHz. Once the oscillating frequency of the controller 106 is determined, the length of the cycle of the control signal DRV can also be determined too, e.g., the value(s) of T1 , T2 and/or T3

(please see FIG. 3) can be determined. In other words, the length of the cycle of the control signal DRV can be determined when the oscillating frequency of the controller 106 is determined.

[0041 ] As described above, the switch 108 is turned off and on according to a comparison result of the first signal VCS and the second signal PEAK. As shown in FIG. 3 for example, if the input voltage V| _N increases, then the second voltage V _pea k decreases and the time period for the first signal VCS to reach the second signal PEAK decreases, and the time period Ton when the control signal DRV is at logic high state (e.g., the ON time period of the switch 108) is decreased. If the input voltage V| _N decreases, then the second voltage V _pea k increases and the time period for the first signal VCS to reach the second signal PEAK increases, and the time period Ton when the control signal DRV is at logic high state (e.g., the ON time of the switch 108) is increased. As a result, the output power P _O UT of the flyback converter 100 can be maintained in a predetermined value (at a constant or substantially constant value over time, which means that the output power may vary, but is within a range that the variation can be neglected) even if/when the input voltage V| _N changes, which increases the flexibility of the flyback converter.

[0042] In another embodiment, the method shown in FIG. 5 can be also applied to the flyback converter 400 shown in FIG.4. In the example of FIG. 4, the compensation resistor RCS1 is coupled to the controller 106, and the first signal VCS can be indicative of the first voltage V _C s which is a sum of the compensation voltage across the compensation resister RCS1 and voltage across the resistor RCS. As a result, the first voltage V _C s shown in FIG. 4 is greater than the first voltage V _C s received by the controller 106 in FIG. 1. In an embodiment, the compensation voltage is generated by a second current I _C S2 through the compensation resister RCS1 , and the second current I _C S2 is generated by sampling the first current I _F B, which indicates the input voltage V| _N , for example, at a sampling frequency of K2 Hz. As such, if the input voltage V| _N increases, then the second voltage V _pea k decreases, and the time period for the first signal VCS to reach the second signal PEAK decreases compared with the adjustment in FIG. 1 . If the input voltage V| _N decreases, then the second voltage V _pea k increases, and the time period for the first signal VCS to reach the second signal PEAK decreases compared with the adjustment in FIG. 1 . Therefore, the output power POUT of the flyback converter 400 can be maintained at a predetermined value by adjusting the duty cycle of the switch 108 when the input voltage V| _N changes.

[0043] While the foregoing description and drawings represent embodiments of the present disclosure, it will be understood that various additions, modifications, and substitutions may be made therein without departing from the spirit and scope of the principles of the present disclosure as defined in the accompanying claims. One skilled in the art will appreciate that the present disclosure may be used with many

modifications of form, structure, arrangement, proportions, materials, elements, and components and otherwise, used in the practice of the disclosure, which are particularly adapted to specific environments and operative requirements without departing from the principles of the present disclosure. The presently disclosed embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the present disclosure being indicated by the appended claims and their legal equivalents, and not limited to the foregoing description.