Title:
FORMING METHOD FOR VARIABLE RESISTANCE NON-VOLATILE MEMORY ELEMENT AND VARIABLE RESISTANCE NON-VOLATILE MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2011/121970
Kind Code:
A1
Abstract:
Disclosed is a forming method for a variable resistance non-volatile memory element which provides lower forming voltage than conventional methods and whereby variation in forming voltage between individual variable resistance elements can be avoided. The forming method initializes a variable resistance element (100) and includes a step (S24) that determines whether or not a 1T1R memory cell current is larger than a reference current; a step (22) that, when the current is determined to be larger (i.e., "No" in S24), applies a positive voltage pulse for forming whereby the pulse width (Tp (n)) is stepped up; and a step (S23) that applies a negative voltage pulse with a pulse width (Tn) at or below the pulse width Tp (n). The step S24 and the voltage application steps S22 and S23 are repeated until the forming has been completed.
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Inventors:
KAWAI, Ken (())
河合 賢 (())
SHIMAKAWA, Kazuhiko (())
河合 賢 (())
SHIMAKAWA, Kazuhiko (())
Application Number:
JP2011/001809
Publication Date:
October 06, 2011
Filing Date:
March 28, 2011
Export Citation:
Assignee:
PANASONIC CORPORATION (1006, Oaza Kadoma Kadoma-sh, Osaka 01, 〒5718501, JP)
パナソニック株式会社 (〒01 大阪府門真市大字門真１００６番地 Osaka, 〒5718501, JP)
KAWAI, Ken (())
河合 賢 (())
パナソニック株式会社 (〒01 大阪府門真市大字門真１００６番地 Osaka, 〒5718501, JP)
KAWAI, Ken (())
河合 賢 (())
International Classes:
G11C13/00; H01L27/10; H01L45/00; H01L49/00
Attorney, Agent or Firm:
NII, Hiromori (6F Tanaka Ito Pia Shin-Osaka Bldg.,3-10, Nishi Nakajima 5-chome, Yodogawa-ku, Osaka-cit, Osaka 11, 〒5320011, JP)
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Claims: