REPRESENTED SIGNALS

This invention relates to a method for splitting a signal which is respresented by a sequence of sample values, a representation referred to as a digital representation of the signal, into two subsignals depending on frequency. The invention concerns therefore a specific form of signal processing, frequency demultiplexing. This operation is based on filtering and has a frequent application in communications equipment and other equipments using signal processing. A related type of signal processing is the combination of two signals into one, and at the same time maintain isolation between the two original signals by giving them a different frequency in the combined signal. This latter type of processing is referred to as frequency multiplexing and it will be shown in the description that the invention after simple and well known modifications can be applied to frequency multiplexing as well as to frequency demultiplexing.

Digital representation of signals and digital processing of signals are frequently applied in equipment for signal transfer and the principles for demultiplexing and multiplexing are well known and explained in [3]. To make a cost effective equipment, it is important to carry out the digital signal processing with the simplest possible equipment. When the processing is performed in application specific electronic circuits (ASIC) the number of multiplications between real numbers (MR) required per second is a relevant measure for the complexity because a MR requires much more resources than other relevant operations like addition, subtraction and intermediate storage of sample values. In general, and especially if the equipment will be built into the payload of satellites it is essential to obtain the lowest possible complexity. [1] discusses a procedure to demultiplex digitally represented signals on-board a satellite. The procedure in [1] represents the state of the technology for simple demultiplexing, i.e. a low number of MR. It is possible to

demonstrate how the methods given in [1] can be modified to obtain multiplexing with the same efficiency in terms of MR. The invention is related with the procedure described in [1] in the the sense that the result of the signal processing will, by a suitable equipment design, be identical to the application of the procedure in [1] . The invention results in a more efficient procedure because the MR rate for the identical demultiplexing (or multiplexing) is reduced by a factor 2 related to the method described in [1] . This effect is obtained by applying the characteristic properties as given in the patent claims. The invention together with additional particular features and advantage shall be explained more closely in the following description with reference to the drawings, in which:

Fig. 1 schematically and in principle shows how the invented demultiplexer can be applied not only to split a signal into two subsignals, but also into 8 output subsignals by combining 7 demultiplexing cells where each cell can be designed according to the invention,

Fig. 2 which shows how undesired aliasing signals (a) are added into the desired signals for a critical sampling frequency (b) and for twice the critical sampling frequency (c),

Fig. 3 which shows an example on the state of the technology (from [2] ) and which results in efficient implementation when the signals are represented by real sample values.

Fig. 4 which shows one filter cell design according to the invention and useful for demultiplexing. Each output sample value is calculated as a weighted sum over 7 input sample values.

Fig. 5 which shows a filter cell designed according to the invention and suited for multiplexing. Each output sample value is calculated as a weighted sum over 7 input sample values.

To give an example of a design according to the invention it is

necessary to state that each sample value of a signal can be represented with one or alternatively two numbers. When two numbers are used these are referred to as the inphase value (a) and the quadrature value (b) . The phase of the signal is given as Arctg (b/a) and its amplitude is a ² + b ² . It is equivalent and for most purposes simpler to consider the number

a + V ^ b

as a complex number. The representation method is usually referred to as a complex representation or a complex sampling of the signal. It is also usual in electric engineering to use j ■= V-l to express complex numbers. This will be done in the remainder of the text.

It is a well known theorem that if the frequency spectrum of the sample signals is zero outside a finite bandwidth B, it is sufficient to use B complex samples per second to uniquely describe the signal.

It is also possible to use sample value described by one single real number. In this case 2B samples per seconds are required to describe the signal referred to above. This type of sampling is referred to as real sampling.

Multiplexing is the opposite, or dual, process of demultiplexing and may be derived in a trivial way from demultiplexing. The invention will first be described applied to demultiplexing, the situation where a portion of the frequency band is applied for several signals with frequency distance B and a bandwidth less than B, and these signals are to be separated from each other by means of calculations based on the digital representation of the signals. This situation occurs frequently in equipment for telecommunications and other similar purposes. The invention is applicable to splitting a signal in two parts depending on frequency. This type of operation is established in current technology. By repeating the splitting in a structure referred

to as a tree-structure, it is possible to devide the signal into any number of channels. The tree-structure lends itselves in particular to the case where the number channels is a power of two. A tree-structure for eight channels is shown in fig. 1. The tree-structure consists of 7 cells and by including into all cells devices to give all output signals zero center frequency it is obvious that all cells can be made identical if so preferable. Due to this property it is possible to concentrate the remaining of the description on how each cell is realized in state of the art technology and according to the invention.

If the useful part of the input signal consist of two channels with frequency separation B, the useful bandwidth is at the most 2B and for complex sampling the lowest sampling frequency which can be used without deteriorating the signal is 2B. This sampling rate is referred to critical sampling. Critical sampling is often applied, however, its disadvantage is that it is often too difficult to limit the total frequency spectrum at the input to 2B. For critical sampling, undesired signal outside the 2B bandwidth will be added to the desired signal by a well known mechanism for sampled signals. By increasing the sample frequency to, for example 4B, it is possible as shown in fig. 2 to accept undesired signal outside the band 2B without these interfering with the desired signals.

The signal processing which shall be carried out in the cell is well known both in principles and in applications. The signal will be band limited to B in a filter (1) for the upper frequency divided channel. The lower bandwidth now permit every second sample value to be removed after which the signal is transposed in frequency to be centered on zero frequency. The same procedure is applied to the lower frequency divided channel in a filter (2) . The two filters can be made identical except for their center frequencies. The filters can be designed as filters with a finite impulse response where each output sample value is calculated from a finite number (I) of the input sample values, here considered to be complex, as a weighted sum

y(m) = Σ h(Mm-i ) X( i ) ( 1 ) i (M=2 )

where the values h( ) are referred to as the filter coefficients. Because the filters have a center frequency different from zero the coefficients must be complex valued. In spite of this, the two filters can be derived from a socalled prototype filter with real coefficients. The prototype filter is centered at zero frequency and has a correct filtering characteristics for the purpose except for the center frequency. The important quality of the design is to use a simplest possible filter and still realize the required degree of filtering. For filters which are to be designed as ASICs, simplicity is primarily to use a lowest possible number of MR of the type shown in eq. 1 between data and coefficients. A well known and frequently used technique is that if the requirements to the frequency response of the filter prototypes are as follows:

H(f) = l 0 < f < B/2 (pass-band) H(f) = 0 3B/2 < f < 2B (stop-band)

No requirements B/2 < f < 3B/2 Sampling frequency 4B

and in addition permit the same deviation from ideal values in pass- as in stop-band, then a filter with an unequal number of coefficience will have every second coefficent equal to zero except for the center coefficient. In this way a filter with 4n-l coefficients will have 2n+l non-zero coefficients which is a simplification. A filter with this property is referred to as a half-band filter. The pass-band and the stop-band can increase or decrease by the same amount without affecting the half-band property of the filter. The fact that the upper (in frequency) and the lower (in frequency) filter has a common prototype is used for simplification. This property makes it possible to apply the same multiplications for both filters. This technique is referred to as polyphase technique for two channels or as quadrature mirror filters for two channels. The techniques can

be applied for all prototype filters with 4n-l coefficient where n is an integral number. As an example consider n = 2, where the prototype filter has the form

i = -3 -2 -1 0 1 2 3 coeff = h(3) 0 h(l) h(0) h(l) 0 h(3)

where the symmetry about central coefficient h(0) is appearant. The upper channel has its center frequency at f = B/2 or one eighths of the sampling frequency. To transpose the prototype filter to this frequency, each coefficient must be multiplied with the complex number

cos(i π/4) + jsin(i π/4)

where i is the number of coefficient as shown in the description of the prototype filter. Correspondingly the filter for the lower channel is generated by using the multiplying factors

cos(i π/4) - jsin(i π/4)

In the two equations above the angle is given in radians, π/4 corresponds to 45° in a 360° subdivision of the circle. It is possible to scale each of the filters, i.e. to multiply all the filter coefficients of a filter with a common number, real or complex, without changing the filter function. By applying the two techniques both the filter coefficents may be rewritten as shown in Table 1.

Table 1. Filter coefficients to split a sample signal in two frequency division channels.

i: -3 -2 -1 0 1 2 3

U: -jh(3) 0 h(l) h(0) (1+j)/V2 jh(l) 0 -h(3)

L: -h(3) 0 jh(l) h(0)(l+j)/V2 h(l) 0 -jh(3)

Delay 0 T 2T 3T 4T 5T 6T It is trivial to rescale the coefficents.

It is of importance to note that the filters are not symmetrical and that except for the center coefficient all coefficients are either real or purely imaginary (i.e. a multiple of j = V-l ) .

Current state of the art as described in (1) performs channel splitting in a simple way by exploiting

- the half-band property of the filter h(-2) = h(2) = 0 as shown above same multiplications for filter (ϋ: ) and (L:) purely real or purely imaginary coefficience except for the central coefficient - for the central coefficient may be used that for any complex number (a+jb) is (a+jb) (1+j) = (a-b)+j(a+b) . Because addition/subtraction is simpler than multiplication in ASIC processors this property can be exploited to simplify the processor.

In state of the art techniques as represented by [1] 2n+l mul-iplications are required to generate two output samples, one for the lower and one for the upper channel. These multiplications are between complex numbers (the samples) and coefficients which for the purpose of estimating complexity in terms of number of MR may be considered as real. Each multiplication of the filter has therefore the same complexity as two MR, which is a coarse, but useful measure of complexity.

This implies that in current state of the art (2n+l) MR are required for each output sample to be calculated.

If the scaling is selected so that h(0) = ^~ 2 the complexity is reduced to 2n MR. This is considered to be a trivial observation, even if it is not always applied in state of the art techniques. According to the invention, the complexity can be reduced from 2n MR to n MR by applying the symmetry that exists in the prototype filter even if this symmetry is not present in the filters (U:) and (L:). The invention will lead to reduction of the MR rate by a factor of two which is a significant simplification of signal processing equipment for multiplexing/demultiplexing in relation to the state of the art. Filters of other types exploit in current technology the symmetry of the filter coefficient to reduce the number of multiplication by adding suitable data prior to multiplication by the procedure shown in Fig. 3. This method does not apply for the processing cell relevant to this invention due to the lack of symmetry in the filters (U:) and (L:). According to the invention each input sample is instead multiplied with the coefficience value h(0), h(l), h(3), etc. (dependent on the length of the filter).

Subsequently operations of the following types are carried out

- delay - multiplication with the numbers j, -j, -1

- addition

which all are operations with very low complexity compared to MR. These operations are sufficient to generate the output sample values required by the function of the cell and values which are identical to those generated by a cell designed according to current state of the art. By exploiting the symmetry in the filter prototype the invention leads to n+1 MR for each output sample if h(0) is a general number. If h(0) = 2 only n MR are required to calculate each output sample value. It is well known that with the binary representations of numbers used in the processing equipment, multiplications with powers of 2 will be

extremely efficient so that h(0) = 2 2 (k integer, positive or negative) gives the same efficiency as h(0) = V2. Several other trivial rescalings of filter coefficients can be carried out without affecting the efficiency significantly related to the example described above. One such case is to multiply the coefficients in one or both filters with (j ^k ) (k - integer)

Processing according to the invention for the prototype filter with 7 coefficients (n = 2) is shown in Fig. 4. Every second input sample shall be multiplied with the central coefficient h(0) only. This is carried out in the lower path after a commuting switch K has selected every second input sample. The multiplication with the number h(0)/V ^f 2 is carried out in MS. h(0) must be reduced by a factor 2 because the subsequent multiplication with (1+j) increases absolute value of the number (amplitude) with the same factor. In case h(0)/ 2 by scaling is selected to 2k (k integer, posivitive or negative) will MS be a particularly simple operation. In accordance with the description of the filter in Table 1 the input samples of the lower path in Fig. 4 must be delayed by 3T where T is the sampling distance referred to the input of the filter. The remaining input samples are multiplied by h(l) and h(3) in multiplication circuits M. The results of these multiplications are used to generate the correct output sample values by using the simple operation mentioned above after a procedure which are evident from Fig. 4 in the part designated T. As a last process, the output samples of channel (U:) and (L:) are generated. Output sample no. m is multiplied with j ^m for channel (U:) and with (-j)" ¹ for channel (L:). These operations will center both output signals at zero frequency and are essential to be able to connect identical cells into the tree-structure shown on Fig. 1.

Processing in cells related to the invention are discussed not only in [1] , but also in [2] . The invention is related to a special, but important case namely complex representation of input as well as output samples and splitting into two channels with separation B and a sampling frequency 4B at the input of the

cell. This special case is not discussed in [2] neither is it possible to derive the invention in an obvious manner from the information given in [2J .

As mentioned earlier, multiplexing of the channels can be considered as a trivial modification of the demultiplexing. The methods for such modification are described in [3]. This invention therefore is applicable to both demultiplexing and multiplexing. A trivial modification of the procedure for demultiplexing according to the invention (Fig. 4) transforms to a procedure for multiplexing. Multiplexing according to the invention will require n MR to calculate each output sample when the output sample is a weighted sum of 4n-l input samples. In this weighting a number, 2n-2, of the weighting factors are zero. The invention leads to the same efficiency improvement related to current state of the art for demultiplexing and multiplexing. Fig. 5 gives an example of multiplexing of two channels according to the invention with filter complexity n = 2. Fig. 5 is derived in a trivial way from Fig. 4.