Title:
FREQUENCY DIVIDER CIRCUIT WITH A CONTROLLABLE FREQUENCY DIVIDER RATIO AND METHOD FOR EFFECTING A FREQUENCY DIVISION IN A FREQUENCY DIVIDER CIRCUIT
Document Type and Number:
WIPO Patent Application WO2005086350
Kind Code:
A3
Abstract:
The invention relates to a frequency divider circuit (1) comprising at least one push-pull divider (T1) with an adjustable divider ratio and comprising a converter device (24), which is connected thereto and which converts a clock signal (TS1) output by the push-pull divider (T1) into a single-ended signal. A first and a second single-ended divider (T2, T3) is connected in outgoing circuit to the output of the converter device (24). A feedback path is provided, which is connected to the outputs of the push-pull divider (T1) and of the first and at least second single-ended divider (T2, T3) and which comprises an evaluation circuit (32). This evaluation circuit comprises a first and a second input (321, 322) which are respectively coupled to the first and to the second single-ended divider (T2, T3) whereby enabling a future state of the clock signal output by the respective single-ended divider to be fed to the inputs of the evaluation circuit. The evaluation circuit evaluates states of the clock signals output by the first and second single-ended divider that are reached first by future switching functions. This makes it possible to gain additional time for a push-pull/single-ended conversion of the signal to be divided.
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Inventors:
ANGEL JOERN (DE)
Application Number:
PCT/DE2005/000342
Publication Date:
October 13, 2005
Filing Date:
March 01, 2005
Export Citation:
Assignee:
INFINEON TECHNOLOGIES AG (DE)
ANGEL JOERN (DE)
ANGEL JOERN (DE)
International Classes:
H03K23/66; (IPC1-7): H03K23/66
Foreign References:
| US5195111A | 1993-03-16 |
Other References:
PERROTT M H ET AL: "A 27-MW CMOS FRACTIONAL-N SYNTHESIZER USING DIGITAL COMPENSATION FOR 2.5-MB/S GFSK MODULATION", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE INC. NEW YORK, US, vol. 32, no. 12, December 1997 (1997-12-01), pages 2048 - 2060, XP000767454, ISSN: 0018-9200
RATEGH H R ET AL: "A CMOS FREQUENCY SYNTHESIZER WITH AND INJECTION-LOCKED FREQUENCY DIVIDER FOR A 5-GHZ WIRELESS LAN RECEIVER", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE INC. NEW YORK, US, vol. 35, no. 5, 1 May 2000 (2000-05-01), pages 780 - 787, XP001011001, ISSN: 0018-9200
RATEGH H R ET AL: "A CMOS FREQUENCY SYNTHESIZER WITH AND INJECTION-LOCKED FREQUENCY DIVIDER FOR A 5-GHZ WIRELESS LAN RECEIVER", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE INC. NEW YORK, US, vol. 35, no. 5, 1 May 2000 (2000-05-01), pages 780 - 787, XP001011001, ISSN: 0018-9200
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