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Title:
GALLIUM ARSENIDE SEMICONDUCTOR MATERIAL INCORPORATING BISMUTH AND PROCESS FOR EPITAXIAL GROWTH
Document Type and Number:
WIPO Patent Application WO/2009/079777
Kind Code:
A1
Abstract:
A process for epitaxial growth of a semiconductor material is disclosed. The process involves heating a substrate, and exposing the substrate to respective fluxes of gallium, arsenic and bismuth. Heating includes heating the substrate to a sufficiently low substrate temperature and exposing includes controlling respective flux rates of the respective fluxes to facilitate epitaxial growth of an electroluminescent active region including gallium arsenide and incorporated bismuth. A semiconductor material and semiconductor light emitting device including gallium arsenide and incorporated bismuth are also disclosed.

Inventors:
TIEDJE THOMAS J (CA)
LU XIANFENG (CA)
LEWIS RYAN B (CA)
BEATON DANIEL A (CA)
Application Number:
PCT/CA2008/002245
Publication Date:
July 02, 2009
Filing Date:
December 19, 2008
Export Citation:
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Assignee:
UNIV BRITISH COLUMBIA (CA)
TIEDJE THOMAS J (CA)
LU XIANFENG (CA)
LEWIS RYAN B (CA)
BEATON DANIEL A (CA)
International Classes:
C30B23/04; C30B23/06; H01L21/20; H01L33/00; H05B33/10; H01L33/30
Foreign References:
US4047123A1977-09-06
US20070267646A12007-11-22
US20050083979A12005-04-21
US20060108603A12006-05-25
Attorney, Agent or Firm:
CRAMER, Owen, W. et al. (Box Vancouver Centre650 West Georgia Street, Suite 220, Vancouver British Columbia V6B 4N8, CA)
Download PDF:
Claims:
What is claimed is:

1. A process for epitaxial growth of an active region of a semiconductor device, the process comprising:

heating a substrate; and

exposing said substrate to respective fluxes of gallium, arsenic and bismuth;

wherein heating comprises heating said substrate to a sufficiently low substrate temperature and exposing comprises controlling respective flux rates of said respective fluxes to facilitate epitaxial growth of an electroluminescent active region including gallium arsenide and incorporated bismuth.

2. The process of claim 1 wherein said substrate temperature is less than about 3.5 x 10 2 degrees Celsius.

3. The process of claim 1 wherein said substrate temperature is less than

3.5 x 10 2 degrees Celsius.

4. The process of claim 1 wherein said substrate temperature is between 2.5 x 10 2 and 3.5 x 10 2 degrees Celsius.

5. The process of claim 1 wherein controlling said respective flux rates comprises controlling a bismuth flux rate to cause an adsorption layer of bismuth to cover a substantial portion of a surface of the active region.

6. The process of claim 1 wherein controlling said respective flux rates comprises controlling a bismuth flux rate to cause an adsorption layer

of bismuth to cover between 10% and 95% of the surface of the active region.

7. The process of claim 5 wherein controlling said bismuth flux comprises controlling said bismuth flux rate to substantially match a combined rate of incorporation of bismuth into the active region and a rate of evaporation of bismuth from the adsorption layer, thereby preventing segregation of said bismuth adsorption layer into droplets on said surface.

8. The process of claim 1 wherein controlling said respective flux rates comprises controlling a gallium flux rate to cause said active region to be grown at a rate of less than about 2 micrometers per hour.

9. The process of claim 8 wherein controlling said respective flux rates comprises controlling the gallium flux rate to cause said active region to be grown at a rate of less than or equal to 1 micrometer per hour.

10. The process of claim 1 wherein controlling said respective flux rates comprises proportionally controlling an arsenic flux rate and a gallium flux rate to facilitate substitution of arsenic by bismuth in the active region to produce a desired concentration of incorporated bismuth in the active region.

11. The process of claim 10 wherein said proportionally controlling comprises controlling said arsenic flux rate in a stoichiometric proportion of between about 1:1 and about 4:1 to said gallium flux rate.

12. The process of claim 1 wherein controlling said respective flux rates comprises controlling respective temperatures of respective flux generators for generating said respective fluxes.

13. The process of claim 9 further comprising controlling said arsenic flux rate in a stoichiometric proportion of greater than 4:1 to said gallium flux rate to discontinue incorporation of bismuth in said active layer.

14. The process of claim 1 wherein an emission spectrum associated with said electroluminescence of the active region has a center wavelength of greater than 8.7 x 10 "7 meters.

15. The process of claim 1 wherein an emission spectrum associated with said electroluminescence of the active region has a center wavelength of greater than 1.2 x 10 '6 meters.

16. The process of claim 1 wherein an emission spectrum associated with said electroluminescence of the active region has a spectral width of greater than 7 x 10 "8 meters full width half maximum.

17. The process of claim 11 wherein an emission spectrum associated with said electroluminescence of the active region has a generally Gaussian shape.

18. The process of claim 1 wherein said heating and said exposing facilitate epitaxial growth of an active region comprising a zinc blende crystalline structure, said gallium and said arsenic occupying respective gallium and arsenic lattice sites in said crystalline structure, and wherein at least some of said arsenic lattice sites are occupied by incorporated bismuth in the active region.

19. A semiconductor light emitting device having an electroluminescent active region comprising gallium arsenide and incorporated bismuth, said active region being fabricated in accordance with the process of any one of- claim 1 to claim 17.

20. The device of claim 19 wherein an emission spectrum associated with said electroluminescent active region has a center wavelength of greater than 8.7 x 10 '7 meters.

21. The device of claim 19 wherein an emission spectrum associated with said electroluminescent active region has a center wavelength of greater than 1.2 x 10 '6 meters.

22. The device of claim 19 wherein an emission spectrum associated with said electroluminescent active region has a spectral width of greater than 7 x 10 '8 meters full width half maximum.

23. The device of claim 19 wherein an emission spectrum associated with said electroluminescent active region has a generally Gaussian shape.

24. A semiconductor light detector having an active region operable to generate charge carriers in response to illumination by light, said active region comprising gallium arsenide and incorporated bismuth, said active region being fabricated in accordance with the process of any one of claims 1 - 11.

25. A process for epitaxial growth of a semiconductor material, the process comprising:

heating a substrate; and

exposing said substrate to respective fluxes of gallium, arsenic and bismuth;

wherein heating comprises heating said substrate to a sufficiently low substrate temperature and exposing comprises controlling respective flux rates of said respective fluxes to

facilitate epitaxial growth of a semiconductor material having a zinc blende crystalline structure, said gallium and said arsenic occupying respective gallium and arsenic lattice sites in said crystalline structure and at least some of said arsenic lattice sites being occupied by incorporated bismuth.

26. The process of claim 25 wherein said substrate temperature is less than about 3.5 x 10 2 degrees Celsius.

27. The process of claim 25 wherein said substrate temperature is less than 3.5 x 10 2 degrees Celsius.

28. The process of claim 25 wherein said substrate temperature is between 2.5 x 10 2 and 3.5 x 10 2 degrees Celsius.

29. The process of claim 25 wherein controlling said respective flux rates comprises controlling a bismuth flux rate to cause an adsorption layer of bismuth to cover a substantial portion of a surface of the semiconductor material.

30. The process of claim 25 wherein controlling said respective flux rates comprises controlling a bismuth flux rate to cause an adsorption layer of bismuth to cover between 10% and 95% of the surface of the semiconductor material.

31. The process of claim 29 wherein controlling said bismuth flux comprises controlling said bismuth flux rate to substantially match a combined rate of incorporation of bismuth into the semiconductor material and a rate of evaporation of bismuth from the adsorption layer, thereby preventing segregation of said bismuth adsorption layer into droplets on said surface.

32. The process of claim 25 wherein controlling said respective flux rates comprises controlling a gallium flux rate to cause said semiconductor material to be grown at a rate of less than about 2 micrometers per hour.

33. The process of claim 25 wherein controlling said respective flux rates comprises controlling a gallium flux rate to cause said semiconductor material to be grown at a rate of less than or equal to 1 micrometer per hour.

34. The process of claim 25 wherein controlling said respective flux rates comprises proportionally controlling an arsenic flux rate and a gallium flux rate to facilitate substitution of arsenic by bismuth in the semiconductor material to produce a desired concentration of incorporated bismuth in the semiconductor material.

35. The process of claim 34 wherein said proportionally controlling comprises controlling said arsenic flux rate in a stoichiometric proportion of between about 1 :1 and about4:1 to said gallium flux rate.

36. The process of claim 25 wherein controlling said respective flux rates comprises controlling respective temperatures of respective flux generators for generating said respective fluxes.

37. A semiconductor light emitting device having an electroluminescent active region comprising gallium arsenide and incorporated bismuth.

38. The device of claim 37 wherein said incorporated bismuth is substantially uniformly distributed laterally across the active region.

39. The device claim 37 wherein an emission spectrum associated with said electroluminescent active region has a center wavelength of greater than 8.7 x 10 "7 meters.

40. The device of claim 37 wherein said incorporated bismuth in said active layer has a concentration of greater than about 4.5% such that an emission spectrum associated with said electroluminescent active region has a center wavelength of greater than 1.2 x 10 '6 meters.

41. The device of claim 37 wherein an emission spectrum associated with said electroluminescent active region has a spectral width of greater than 7 x 10 '8 meters full width half maximum.

42. The device of claim 37 wherein an emission spectrum associated with said electroluminescent active region has a generally Gaussian shape.

43. The device of claim 37 wherein the active region comprises a zinc blende crystalline structure, said gallium and said arsenic occupying respective gallium and arsenic lattice sites in said crystalline structure, and wherein at least some of said arsenic lattice sites are occupied by incorporated bismuth in the active region.

44. The device of claim 37 wherein the active region comprises at least one quantum well layer disposed between a first confinement layer and a second confinement layer, and wherein said incorporated bismuth is substantially uniformly laterally across said quantum well layer, said first and second confinement layers being operable to confine charge carriers to said quantum well layer, thereby promoting radiative recombination of charge carriers within the quantum well layer.

45. The device of claim 44 wherein the first and second confinement layers have a smaller refractive index than the quantum well layer such that

emission of light from the active region occurs at an emission area located at an edge of the quantum well layer.

46. The device of claim 44 wherein said first confinement layer and said second confinement layer each comprise gallium arsenide.

47. The device of claim 46 wherein said first confinement layer comprises dopants of a first conductivity type and said second confinement layer comprises dopants of a second conductivity type.

48. The device of claim 37 wherein said active region comprises a plurality of quantum well layers separated by respective spacer layers and wherein said incorporated bismuth is substantially uniformly distributed laterally across each of said plurality of quantum well layers.

49. The device of claim 37 wherein said active region is disposed between a region of first conductivity type material and a region of second conductivity type material, and further comprising:

a first electrode in ohmic contact with an outer surface of said region of first conductivity type material; and

a second electrode in ohmic contact with an outer surface of said region of second conductivity type material;

wherein said first and second electrodes are configured to cause an electric current to flow between the electrodes through the active region of the semiconductor light emitting device to cause generation of photons in the active region.

50. The device of claim 49 wherein said region of first conductivity material comprises a current spreading layer underlying said outer surface.

51. A semiconductor light detector having an active region operable to generate charge carriers in response to illumination by light, said active region comprising gallium arsenide and incorporated bismuth having a zinc blende crystalline structure, said gallium and said arsenic occupying respective gallium and arsenic lattice sites in said crystalline structure, and at least some of said arsenic lattice sites being occupied by incorporated bismuth in the active region.

52. The device of claim 51 wherein said active region is disposed between a region of first conductivity type material and a region of second conductivity type material, and further comprising:

a first electrode in ohmic contact with an outer surface of said region of first conductivity type material; and

a second electrode in ohmic contact with an outer surface of said region of second conductivity type material;

wherein said first and second electrodes are configured to cause an electric current to flow between the electrodes through the first and second conductivity type materials and the active region.

53. The device of claim 51 wherein the device is an avalanche photodiode.

54. An avalanche photodiode comprising a IM-V semiconductor alloy comprising bismuth in an active carrier multiplication region.

Description:

GALLIUM ARSENIDE SEMICONDUCTOR MATERIAL INCORPORATING BISMUTH AND PROCESS FOR EPITAXIAL GROWTH

CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of priority from United States patent application no. 61/008,576 filed December 21 , 2007, and from United States patent application no. 61/071 ,373 filed April 24, 2008.

BACKGROUND OF THE INVENTION 1. Field of Invention

This invention relates generally to semiconductor material. More particularly, illustrative embodiments relate to semiconductor light emitting devices, semiconductor light detectors, and processes for epitaxial growth of semiconductor devices.

2. Description of Related Art

Gallium arsenide (GaAs) is an important semiconductor material having high electron mobility and a higher breakdown voltage than silicon. One advantage of Gallium arsenide is that it can be easily alloyed with other elements in Group III and Group V on the periodic table of elements (i.e. elements such as Aluminum, Indium, Nitrogen, Phosphorus and Antimony) to produce semiconductor materials having a wide range of bandgap energies.

Semiconductor materials having different bandgap energies may be used to fabricate double heterostructures by disposing a low bandgap energy semiconductor material between semiconductor layers having higher bandgap energy. Double heterostructure semiconductor materials are particularly useful in fabricating semiconductor devices having optoelectronic properties.

Silica fibers used in fiber optical data communications have almost no dispersion at a wavelength of 1330 nanometers and are almost transparent at a wavelength of 1550 nanometers, which correspond to bandgap energies of 0.93 eV and 0.80 eV respectively. Gallium arsenide semiconductor material has a bandgap energy of about 1.42 eV, which may be lowered by alloying in various combinations with Group III and Group V elements for use in a semiconductor device having optoelectronic properties at longer wavelengths.

Optical Coherence Tomography (OCT) is an optical imaging technique in which a fiber optic Michelson interferometer is used to form an image. When illuminated using an incoherent light source having a wavelength of between

850 and 1300 nanometers, an OCT interferometer facilitates production of three-dimensional images having a resolution of a few micrometers in an optical scattering media such as biological tissue. In order to make high resolution images, the light source of the OCT interferometer should have a broad emission spectrum, preferably broader than 100 nm. Superluminescent diodes that emit light over a range of wavelengths have been used as illumination sources for OCT interferometers. The quality and resolution of images produced by an OCT interferometer is largely dependent on the illumination source, which should ideally have a near Gaussian spectrum.

However, in practice, superluminescent diodes may have an emission spectrum that is not sufficiently smooth and broad for high resolution OCT.

Accordingly, there remains a need for devices that have optoelectronic properties at wavelengths greater than 870 nanometers. There also remains a need for illumination sources that have broad and Gaussian shaped emission spectra at center wavelengths of greater than 870 nanometers. There also remains a need for semiconductor materials having low bandgap energies for use in non-optoelectronic semiconductor devices.

SUMMARY OF THE INVENTION

In accordance with an illustrative embodiment of the invention, there is provided a process for epitaxial growth of an active region of a semiconductor device. The process includes heating a substrate, and exposing the substrate to respective fluxes of gallium, arsenic and bismuth. Heating includes heating the substrate to a sufficiently low substrate temperature and exposing includes controlling respective flux rates of the respective fluxes to facilitate epitaxial growth of an electroluminescent active region including gallium arsenide and incorporated bismuth.

In accordance with another illustrative embodiment of the invention, there is provided a semiconductor light emitting device having an electroluminescent active region including gallium arsenide and incorporated bismuth fabricated in accordance with the above process.

In accordance with another illustrative embodiment of the invention, there is provided a semiconductor light detector having an active region operable to generate charge carriers in response to illumination by light, the active region including gallium arsenide and incorporated bismuth and being fabricated in accordance with the above process.

In accordance with another illustrative embodiment of the invention, there is provided a process for epitaxial growth of a semiconductor material. The process includes heating a substrate, and exposing the substrate to respective fluxes of gallium, arsenic and bismuth. Heating includes heating the substrate to a sufficiently low substrate temperature and exposing includes controlling respective flux rates of the respective fluxes to facilitate epitaxial growth of a semiconductor material having a zinc blende crystalline structure, the gallium and the arsenic occupying respective gallium and arsenic lattice sites in the crystalline structure and at least some of the arsenic lattice sites being occupied by incorporated bismuth.

-A-

In accordance with another illustrative embodiment of the invention, there is provided a semiconductor light emitting device having an electroluminescent active region including gallium arsenide and incorporated bismuth.

In accordance with another illustrative embodiment of the invention, there is provided a semiconductor light detector having an active region operable to generate charge carriers in response to illumination by light. The active region includes gallium arsenide and incorporated bismuth having a zinc blende crystalline structure, the gallium and the arsenic occupying respective gallium and arsenic lattice sites in the crystalline structure, and at least some of the arsenic lattice sites are occupied by incorporated bismuth in the active region.

In accordance with another illustrative embodiment of the invention, there is provided an avalanche photodiode. The photodiode includes a Hl-V semiconductor alloy including bismuth in an active carrier multiplication region.

Other aspects and features of the present invention will become apparent to those ordinarily skilled in the art upon review of the following description of specific embodiments of the invention in conjunction with the accompanying figures.

BRIEF DESCRIPTION OF THE DRAWINGS

In drawings which illustrate embodiments of the invention,

Figure 1 is a schematic view of a semiconductor light emitting device in accordance with a first embodiment of the invention;

Figure 2 is a perspective view of a crystal unit cell in an active region of the semiconductor light emitting device shown in Figure 1;

Figure 3 is a perspective view of an edge emitting light emitting device (LED) in accordance with an embodiment of the invention;

Figure 4 is a top view of an exemplary embodiment for coupling radiation produced by the LED shown in Figure 3 into an optical fiber;

Figure 5 is side view of a molecular beam epitaxy chamber for growing the device shown in Figure 1 ;

Figure 6 is a flowchart illustrating steps in a process for epitaxial growth of the device shown in Figure 1 ;

Figure 7 is a schematic side view representation of the semiconductor crystal shown in Figure 2;

Figure 8 is a graph of bismuth concentration for various growth temperatures as a function of bismuth to arsenic flux ratio;

Figure 9 is a graphical depiction of an emission spectrum of a semiconductor light emitting device;

Figure 10 is a schematic view of a semiconductor light detector in accordance with another embodiment of the invention;

Figure 11 is a graph showing the efficiency of photoluminescence for

GaAsBi samples with different bismuth concentrations;

Figure 12 is a graph comparing two electroluminescence spectra for a light emitting diode with a bismuth-containing active layer to an electroluminescence spectrum of a light emitting diode with InGaAs quantum wells in the active region; and

Figure 13 is a graph comparing one of the electroluminescence spectra shown in Figure 12 for the light emitting diode with the bismuth containing active layer to the electroluminescence spectrum of a device with a GaAs active layer grown under conventional conditions.

DETAILED DESCRIPTION

Referring to Figure 1 , a semiconductor light emitting device according to a first embodiment of the invention is shown generally at 100. The device 100 includes an active region 102, which in the embodiment shown includes a quantum well layer 104 disposed between a first confinement layer 106 and a second confinement layer 108. The quantum well layer 104 of the active region includes epitaxially grown gallium arsenide (GaAs) and further includes incorporated bismuth (Bi). The incorporated bismuth is substantially uniformly distributed laterally across the quantum well layer 104 and is operable to cause the active region to exhibit electroluminescence.

The first and second confinement layers 106 and 108 each have a higher bandgap energy than the quantum well layer 104 and act to confine and promote radiative recombination of charge carriers within the quantum well layer. Promotion of radiative recombination over non-radiative recombination in the quantum well layer 104 facilitates generation of light in response to an external current flowing through the active region or external electric field being applied to the device 100. This optoelectrical phenomenon is commonly referred to as electroluminescence. In this specification, including the claims, the term "light" includes electromagnetic radiation (i.e., photons)

regardless of whether or not the wavelengths of such electromagnetic radiation fall within the spectrum of light that is visible to the human eye. Thus, for example, the various infrared wavelengths described herein are considered to be "light".

In one embodiment the first and second confinement layers 106 and 108 may each include aluminum gallium arsenide, which has a bandgap energy that increases with aluminum concentration from about 1.42 electron volts (eV). The bandgap energy of the quantum well layer 104 is given by the following empirical formula:

W,,- =1-42-1.78*- ) Eqn 1

where:

EβaAsi-xβix is the bandgap energy of the quantum well layer in eV; and x is the atomic concentration of bismuth in the GaAsi -x Bi x quantum well layer.

The bandgap energy of the quantum well layer 104 thus decreases with increasing atomic concentration of bismuth and is lower than the bandgap energy of gallium arsenide and aluminum gallium arsenide.

The center wavelength of the light generated by the electroluminescent active region is dependent on the bandgap energy £ of the quantum well layer 104 and may be written as:

A - | Eqn 2 where: h is Planck's constant; and c is the speed of light.

Advantageously, incorporating bismuth in the quantum well layer 104 causes a large shift in bandgap energy for relatively dilute concentrations of bismuth.

The confinement layers 106 and 108 and the quantum well layer 104 together make up a double heterostructure active region 102. The quantum well layer

104 may also be a double heterostructure with GaAs confinement layers on either side of the GaAsI -xBix active layer. In other embodiments, the active region 102 may include a plurality of quantum well layers (not shown), similar to the quantum well layer 104, separated by respective confinement layers of GaAs, each quantum well layer including incorporated bismuth and being operable to generate light. Advantageously, inclusion of a plurality of quantum wells facilitates fabrication of devices capable of producing a higher power light output.

The quantum well active region may also be alloyed with other group III or group V elements to form quaternary alloys or five component alloys. For example, alloying the bismide layer with nitrogen will have the effect of further reducing the bandgap while at the same time reducing the lattice constant to make it better matched to GaAs. Growth of InGaAsBi alloys on InP substrates can be used to further extend the optoelectronic response of the bismide alloys to longer wavelengths with smaller bismuth concentrations than the concentrations according to Eqn 1.

In the embodiment shown in Figure 1, the active region 102 is disposed between a region of first conductivity type material 110 and a region of second conductivity type material 112. For example, the region 110 may include a p- type dopant such as carbon and the region 112 may include an n-type dopant such as silicon (Si).

The device 100 also includes a first electrode 114 in ohmic contact with an outer surface 116 of the region 110. For a p-type region 110, the first

electrode 114 may include a layer of titanium in contact with the surface 116 of the p-type region, a layer of platinum deposited over the titanium layer, and a layer of gold deposited over the platinum layer. The titanium layer provides good ohmic contact with the p-type layer, while the gold layer facilitates wire- bonding to the electrode 114. The device 100 further includes a second electrode 118 in ohmic contact with the region 112. For an n-type region 112, the second electrode 118 may include nickel in contact with a surface of the n-type region 112, a layer of gold-germanium (AuGe) over the nickel layer, and a layer of gold over the gold-germanium layer. The gold layer facilitates wire-bonding to the electrode 118. The region 112 may further include a shallow region 120 having a higher dopant concentration than a bulk of the region 110. In one embodiment the shallow region 120 includes diffused Germanium from the second electrode 118. In this embodiment, the first and second electrodes 114 and 118 are configured to cause an electric current to flow between the electrodes through the active region 102. To achieve this, the first and second electrodes are connectable to an external electric power source (not shown), to cause the electric current to flow through the p-type region, the active region and the n-type region.

The regions 110 and 112 and the active region 102 together operate as a light emitting diode (LED) when forward biased by an electric current externally applied between the first and second electrodes 114 and 118. In response to the applied current, charge carriers (electrons and holes) flow into the quantum well layer 104 where radiative recombination occurs, thereby generating photons in the active region.

In other embodiments, the structure shown in Figure 1 may be modified in various ways to provide a device suitable for specific requirements. For example, the composition of the second electrode 118 may be altered to enhance reflectivity of the electrode, thereby redirecting light from the active layer that impinges on the second electrode. The device may also be

fabricated as a flip-chip device where the device is fabricated on a transparent substrate and then flipped over, so that the light emission is directed through the transparent substrate. Various other electrical contact configurations may be utilized to maximize light output from the device. Furthermore, the composition of the layers, and inclusion of additional layers such as a current spreading layer, may be included for enhancing performance of the device.

A unit cell representing a portion of the crystalline structure of the quantum well layer 104 is shown generally at 140 in Figure 2. Referring to Figure 2, gallium arsenide semiconductor materials generally form a zinc blende type crystalline structure including covalently bonded gallium atoms 142 and arsenic atoms 144 each occupying lattice sites in respective interpenetrating face-centered cubic lattices, as shown. The unit cell 140 of the quantum well layer 104 also includes an incorporated bismuth atom 146. The bismuth atom 146 occupies one of the arsenic lattice sites in the unit cell and thus the composition of the quantum well layer 104 may be written as GaAsi -x Bi x where x is the atomic concentration of bismuth expressed as a percentage of the arsenic atomic concentration.

In practice, the unit cell 140 may have some inadvertent defects such as vacant lattice sites, or interstitially located gallium, arsenic, or bismuth. However, the inventors believe that such defects adversely affect the electroluminescent properties of the active region 102 and should thus be minimized during epitaxial growth, as described later herein.

For the unit cell 140, the atomic concentration of bismuth is approximately 12.5%, which in accordance with Eqn 1 and Eqn 2 above would result in light emission having a center wavelength of about 1700 nanometers. However, as described later herein, emission spectra of realized devices of the general structure as shown in Figure 1 have been found to be relatively broad. The inventors believe that the broad emission spectrum may be caused by

bismuth clustering in the crystalline structure such that for a specific overall concentration level, some portions of the quantum well layer 104 have a higher local concentration of bismuth atoms than other portions. Higher concentrations of bismuth would lead to longer wavelength emission of light, thus tending to broaden the emission spectrum. The quantum well layer 104 is thus made up of a plurality of unit cells such as the unit cell 140 shown in Figure 2. However, in some portions of the quantum well layer 104, unit cells may have more than a single bismuth atom 146, while in other regions some unit cells may have no bismuth atoms.

Referring to Figure 3, an edge emitting LED is shown generally at 180. The device 180 is generally similar in structure to the device 100 shown in Figure 1 and has a double heterostructure active region 182, including a quantum well layer 184 and first and second confinement layers 186 and 188. Alternatively, the quantum well layer 184 may include a plurality of quantum well layers separated by spacer layers (not shown). The device 180 also includes an n-type gallium arsenide region 190 and a p-type gallium arsenide region 192. Electrical contact to the p-type region 192 is provided by an elongated p-electrode 194 and the p-type region has been mesa-etched to remove material not underlying the p-type electrode 194 in order to limit lateral current spreading. The n-type region 190 is in electrical contact with a metallic heat sink 196.

In operation, the p-type region 192 confines electrical current to flow through only a centrally located portion of the active region 182. The confinement layers 186 and 188 of the double heterostructure active region 182 act to guide light generated in the quantum well layer 184 toward an emission area

198 located on an end of the device 180. Light emission thus occurs from a relatively small emission area 198 and forms a diverging cone of light, as shown at 200, thus producing a high radiance light output. Radiance is a

measure of the amount of light that is emitted from a particular area (such as the emission area 198) within a given solid angle.

Referring to Figure 4, the edge emitting LED 180 shown in Figure 3 may be configured to illuminate an optical fiber 220, such as may be used in fiber optic communications systems or an OCT interferometer, for example. The optical fiber 220 includes a core 222, which is surrounded by a cladding 224 having a lower refractive index than the core. A small lens 226 is used to gather the diverging light emitted from the device 180 and to direct the light into the optical fiber 220. The diameter and focal length of the lens are selected to couple a substantial portion of the emitted light from the device 180 into the core 222 of the optical fiber 220, thereby substantially preserving the high radiance of the light output from the LED 180.

Advantageously, the LED 180 emits a relatively broad spectrum of wavelengths at a center wavelength longer than 870 nanometers. The small emission area 198 provides high radiance, suitable for coupling into the optical fiber 220.

Molecular beam epitaxy

Molecular beam epitaxy (MBE) is one commonly utilized method for the preparation of gallium arsenide based semiconductor materials. Referring to Figure 5, a schematic diagram of a molecular beam epitaxy system is shown generally at 300. The system 300 includes a vacuum chamber 302 having a vacuum port 304 for connecting to vacuum pumps. The vacuum chamber

302 includes a wall 306 having a void 307 for circulation of liquid nitrogen. The liquid nitrogen circulating in the void 307 causes the temperature of the wall 306 to be lowered to cause contaminants in the chamber 302 to be trapped by freezing on the wall, thus reducing contaminant concentrations in the chamber.

The chamber 302 also includes an access port 308 for introducing a substrate 310 into the chamber. The access port 308 is typically in communication with a preparation chamber (not shown), which is also be evacuated and has a gate valve (also not shown) for sealing off the chamber 302 from the preparation chamber. The substrate 310 is mounted on a molybdenum carrier 312 and is oriented to prevent contaminants from settling on an exposed surface 311. The carrier 312 is in turn mounted on a block 313 having a heating element and temperature sensor (not shown) for controlling a temperature of the block and thus the substrate 310.

The MBE system 300 further includes one or more cells for generating a flux of atoms or molecules which are incident on the heated substrate 310. In the embodiment shown, the system 300 includes effusion cells 314, 316, and 320 for generating the respective fluxes of gallium, bismuth, and a dopant (such as silicon). Each of the effusion cells 314, 316, and 320 operate by heating the respective element to a temperature at which atoms begin to evaporate to produce a gaseous atomic beam. Each of the cells further includes an electrically actuated shutter 322, which permits the respective beams to be turned on or off in a fraction of a second. The MBE system 300 also includes a dual stage cracker cell 318 having a high temperature cracker stage 319 for generating a diatomic As 2 flux. The arsenic flux rate produced by the high temperature cracker stage may be controlled by adjusting a valve between the two stages of the cracker cell. In the embodiment shown the system 300 also includes a gas injection port 324 for introducing a gaseous dopant (such as CBr 4 ).

In operation, the vacuum system draws a vacuum at the port 304, which together with the liquid nitrogen flow through the void 307 continually removes contaminants and gaseous elements from the chamber 302. The ultra high vacuum in the chamber 302 causes atoms to have a long mean free path and thus the respective fluxes of atoms and/or molecules do not generally react

with each other until reaching the heated substrate surface 311 , where epitaxial crystal growth occurs. The temperature of the substrate 310 may be monitored using optical bandgap thermometry and the flux rates may be monitored and/or calibrated using a retractable ion gauge to permit control over the growth process.

Epitaxial growth process overview

Referring to Figure 6, an illustrative example of a process for epitaxial growth of gallium arsenide having incorporated bismuth is shown generally at 340. As shown at 342, the process begins when a suitable substrate 310 has been loaded into the chamber 302 through the access port 308. In one embodiment the substrate 310 comprises n-doped gallium arsenide, in which the [100] crystal face (i.e. the crystal face 148 shown in Figure 2) is oriented outwardly as the exposed substrate surface 311.

As shown at 344, the process continues with commencement of conventional growth of non-active layers of the device 100. Conventional growth occurs under generally conventional gallium arsenide growth conditions (for example, 550 - 580 0 C substrate temperature (T), growth rate of about 1 micrometer per hour, and an overpressure of arsenic).

As shown at 346, the temperature of the substrate T is then lowered to below 360 0 C for growth of layers having incorporated bismuth. As shown at 348, the gallium flux rate F Ga is also lowered to less than 1 micrometer per hour. The flux rate F Ga determines the overall growth rate of the semiconductor material and is controlled by adjusting a temperature of the gallium effusion cell 314. In one embodiment, the gallium flux rate F Ga is lowered to about 0.1 micrometers per hour to provide improved process latitude, as described later herein. However, in other embodiments, more precise process control of growth conditions and the respective fluxes may permit growth at higher rates than 0.1 micrometers per hour.

As shown at 350, the arsenic flux rate F As is controlled to relative to the gallium flux rate FG 3 in a proportion of between 1:1 and 4:1 by adjusting the valve of the dual stage cracker cell 318. Gallium arsenide is conventionally grown under conditions of arsenic overpressure of as high as 10:1 , but the present inventors have found that in order to promote bismuth incorporation, the arsenic flux should be lowered closer to stoichiometric levels (i.e. 1 :1) for growth of layers in which it is desired to incorporate bismuth.

As shown at 352, generation and control of the bismuth flux then commences by adjusting a temperature of the effusion cell 316 to achieve a desired bismuth flux rate F 6/ . The inventors have found that the bismuth flux rate F B ; can be controlled to avoid undesirable growth conditions. Bismuth has a strong tendency to surface segregate into droplets across the surface. The presence of droplets results in non-uniform incorporation of bismuth and adversely impacts electrical properties of the resulting semiconductor material, likely due to build up of bismuth droplets causing some portions of the crystal to have high bismuth incorporation while other portions have substantially lower bismuth incorporation in the bulk of the semiconductor material.

Referring to Figure 7, a representation of a gallium arsenide bismide semiconductor crystal lattice is shown generally at 380, for the purpose of illustrating the atomic scale phenomena which occur on the surface during epitaxial crystal growth. The representation 380 is a simplified two- dimensional schematic representation of a portion of the unit cell crystal structure 140 shown in Figure 2, and is presented for illustrative purposes only. In the representation 380, gallium atoms are shown on a first row 382 of the crystal lattice while arsenic and bismuth atoms are shown on a second row 384 of the crystal lattice. The first and second rows 382 and 384 respectively represent planes of the crystal unit cell 140 taken parallel to the

crystal face 148 (as shown in Figure 1). A third row 386 of bismuth atoms represents an adsorption layer of bismuth that forms on a surface 387 of the gallium arsenide crystal (i.e. rows 382 and 384) due to the strong tendency of bismuth to surface segregate and a relatively low bismuth vapor pressure at the substrate temperature T. The bismuth adsorption layer 386 has a surface coverage of θ Bi . An element that is present on the surface of the crystal during epitaxial growth but does not incorporate is known as a surfactant. At high growth temperatures, Bi behaves like a surfactant. Arsenic has a much higher vapor pressure than bismuth and thus does not accumulate on the surface in an adsorption layer. Accordingly, since the arsenic flux rate F^ 5 is equal to or greater than the gallium flux rate F Ga , the second row 384 will be primarily arsenic terminated under the bismuth adsorption layer 386.

Bismuth incorporation into the crystal is generally slow and is affected by three processes. First, a gallium atom 388 may insert between one of the arsenic atoms (390) in the second row 384 and one of the bismuth atoms

(392) in the adsorption layer 386, thus forming an As-Ga-Bi bond. Since bismuth incorporation into the semiconductor crystal is associated with the formation of Ga-Bi bonds, this first process is desirable and occurs at a rate proportional to:

«„ (!-*) Eqn 3 where:

- x is the atomic concentration of bismuth;

- θ B i is the surface coverage of the bismuth adsorption layer; and - F Ga is the gallium flux rate.

A second process, in which a gallium atom 394 inserts between a bismuth atom 396 that is already incorporated in the crystal and one of the bismuth atoms 398 in the adsorption layer 386, is undesirable. This second process is also less likely to occur because the relatively large size of the bismuth atoms

does not favor formation of next-neighbor bismuth bonds of the form Bi-Ga-Bi. Accordingly, in Eqn 3 the inclusion of the factor (l-χ) means that the second process is being excluded for practical purposes.

A third process involves the insertion of an arsenic atom 400 between a gallium atom 402 and a bismuth atom 404 in a Ga-Bi bond, thereby displacing the bonded bismuth atom back into the surface adsorption layer 386. Since a Ga-Bi bond is broken in this process, it is assumed that the third process is thermally activated with a rate proportional to: F As e- UJkT x Eqn 4 where:

F As is the arsenic flux rate; T is the substrate temperature in degrees Kelvin; Ui is the bonding energy between gallium and bismuth in eV; and k is the Boltzmann constant.

Putting the first and third processes together the following rate equation is obtained:

^ ∞ θ Bi F Ga (l-x)-aF As e^ x Eqn 5

where the constant a is a dimensionless fitting parameter that takes into account relative cross sections of the gallium and arsenic insertion reactions. In steady state (i.e. dx/dt = 0), the rate equation can be solved for x:

x = — θ *" e gUl ' kT ;F% — Eqn 6

Ur λs + σ Bi e r Ga

The bismuth surface coverage θBI has been measured on gallium arsenide as a function of temperature and flux rate and is expected to obey a Langmuir isotherm with a surface binding energy of Uo =1.8±0.4 eV. The Langmuir

isotherm assumes that adsorbed atoms or molecules do not interact or deposit on each other and that at maximum adsorption, only a monolayer of atoms is formed. One difference in this case is that some of the bismuth from the adsorption layer 386 is absorbed into the second row 384 of the crystal during growth. Another difference is that the adsorption layer is constantly moving up as the films grow. Accordingly, it is reasonable to replace the bismuth flux (or pressure) in the Langmuir isotherm expression with the net flux, in which the incorporated bismuth has been subtracted (i.e. (F 6 , - xF Ga )), to take into account the Bi atoms that incorporate into the second row 384 during growth. The Langmuir isotherm expression is then written as follows: b{F -xF )e u ° J'kT

' V Bi Ga J '

** = - l. + b 1 { IF TT -xF r- G . α y \ U 0 IkT Eqn 7

where: b is a constant; and

Uo is the surface binding energy of bismuth on gallium arsenide (Uo =1.8±0.4 eV).

Substituting the expression in Eqn 7 for θ B , into Eqn 6 provides a mathematical model for representing the process of incorporation of bismuth into gallium arsenide as a function of temperature and the respective flux rates of gallium, arsenide and bismuth.

Referring to Figure 8, the bismuth content in % provided by Eqn 6 is plotted as a function of the bismuth to arsenic flux ratio (i.e. FBJFA S ) for various substrate temperatures and for b =8.5χl(T u nm-s , a =2.5χlO 8 , U 0 = 1.3 eV, and Ui = 0.8 eV. In general, Eqn 6 shows that incorporated bismuth content increases with decreasing arsenic flux rate F As , when the bismuth flux rate F B , and the substrate temperature Tare held constant. The bismuth content also saturates at high bismuth flux rate F B , for a particular substrate temperature T and arsenic flux rate FA S -

In Eqn 6 and Eqn 7 the gallium flux rate Fβa, which is proportional to an overall growth rate of the crystal 380, appears only as a ratio with the bismuth and arsenic flux rates F β/ and F As , thus suggesting that the incorporated bismuth concentration is not dependent on overall growth rate. However, the inventors have found that preventing bismuth in the adsorption layer 386 from segregating into droplets is difficult when growth occurs at conventional gallium arsenide growth rates of about 1 micrometer per hour or faster, with particular difficulty at growth rates of about 2 micrometers per hour or faster. Bismuth atoms in the overall flux incident on the crystal surface 387 will either (1) incorporate into the crystal, (2) evaporate back into the chamber 302 as gaseous bismuth vapor, or (3) attach to a bismuth droplet on the surface (if droplets exist). The present inventors have found that causing the incident bismuth flux Fe / to be less than a combined rate of evaporation of bismuth from the adsorption layer 386 (assuming that the adsorption layer completely covers the surface) and the rate of incorporation of bismuth into the crystal can advantageously prevent segregation of the bismuth adsorption layer 386 into droplets. This criterion may be expressed using the following inequality:

0 < F Bi -xF < E Bi Eqn 8

where E 6 , is the evaporation rate of bismuth from the adsorption layer 386, assuming that the bismuth adsorption layer completely covers the surface. The evaporation rate £ S / is dependent on the substrate temperature T.

If the criteria of Eqn 8 is violated, that is if the bismuth flux rate FB; exceeds the bismuth incorporation rate by more than the rate of bismuth evaporation

EB;, then excess Bi will accumulate into droplets. As can be seen from the graph in Figure 8, lower growth temperatures are favorable for growth of semiconductor material having high bismuth content. However lower temperatures also reduce the bismuth evaporation rate E β; . Accordingly, for low temperature growth, the bismuth flux rate F 6/ is preferably controlled to

approximately match the bismuth incorporation rate (xFca), since the evaporation rate E B ; is generally low.

The ratio of the evaporation rate EB; to the bismuth incorporation rate provides an indication of process latitude for growth of the gallium arsenide bismide crystal. Process latitude may thus be increased by relatively slow overall growth rate (i.e. lower gallium flux rate Fβa), so that any excess bismuth in the adsorption layer 386 has sufficient opportunity to evaporate. Higher growth rates may be achieved through precise control of the bismuth flux rate FB;. By reducing the growth rate to about 0.07 micrometers per hour, the present inventors have been able to grow mirror-like films with high bismuth concentrations and a reduced density of bismuth droplets.

Referring back to Figure 6, as shown at 352 the bismuth flux rate F β/ is thus controlled in accordance with the criterion set forth in Eqn 8. In one embodiment, the bismuth effusion cell 316 (shown in Figure 5) is configured to produce a bismuth flux rate F 6 / such that coverage of the surface 387 is maintained in a range of between 50% - 90% of the surface area of the surface 387.

As shown at 354, when the layer having incorporated bismuth reaches a desired thickness (i.e. on expiration of an elapsed time calculated in accordance with the expected growth rate for the respective fluxes), the growth of the layer is discontinued by interrupting the bismuth flux and/or increasing the arsenic flux to an overpressure condition to prevent further incorporation of bismuth.

The process then continues as shown at 356, with epitaxial growth of non- luminescent layers.

Advantageously, the process 340 facilitates growth of gallium arsenide electroluminescent semiconductor material having incorporated bismuth concentrations of 10% or greater.

Example 1

Samples were grown in accordance with the process 340 in a VG-V80H molecular beam epitaxy system provided by Oxford Instruments, UK. The sample substrate used was a [100] gallium arsenide wafer having an n-type dopant concentration of about 2x10 18 cm "3 and a diameter of 50 mm. The wafers were diced into quarters for the sample growth. The respective fluxes were generated using effusion cells for gallium and bismuth, and a dual stage cracker for arsenic. Gas injection of CBr 4 was provided for p-type doping and a silicon effusion cell for n-type doping.

The substrate temperature was monitored throughout the growth process using optical bandgap thermometry with an accuracy of about 5 0 C. For the respective fluxes, beam equivalent pressures were measured using a retractable ion gauge.

Standard growth conditions for non-luminescent gallium arsenide layers were as follows: arsenic overpressure (FAS-FG 3 ) of 8:1 ; growth rate of about 1 micrometer per hour (i.e. F G aY, arsenic cell temperature 400 0 C; gallium cell temperature 950 0 C; and substrate temperatures of between 550 0 C and 580 0 C.

In general the gallium, bismuth and silicon flux rates are determined by the cell temperature for the particular cell. The arsenic flux rate is determined by cell pressure and the valve setting between the two stages of the dual stage cracker cell.

Several samples having a structure similar to the device 100 shown in Figure 1 were grown. A 1000 nanometer n-doped buffer layer was first grown on the substrate at the standard gallium arsenide growth conditions above. The temperature of the silicon effusion cell was controlled to achieve the desired level of dopant concentration (typically a temperature of about 800 degrees Celsius to 1100 degrees Celsius). The silicon effusion cell temperature was varied to provide an n-type doping gradient ranging from 2 * 10 18 cm "3 at the interface between the buffer layer and the substrate to 5 * 10 17 cm "3 at 100 nanometers into the buffer layer. The substrate and n-type buffer layer together correspond to the region of second conductivity type material 112 shown Figure 1.

The growth was then interrupted for about 10 minutes to adjust growth conditions for growing the active region including an undoped gallium arsenide confinement layer (corresponding to the layer 108 shown in Figure

1 ), a gallium arsenide bismide quantum well layer (corresponding to the layer

104), and a further undoped gallium arsenide confinement layer

(corresponding to the layer 106). Common growth conditions for the active region layers were as follows: growth temperature of 300 0 C; arsenic cell temperature of 350 0 C; gallium cell temperature of 850 0 C; and bismuth cell temperature of between 400 0 C and 500 0 C.

Alternatively, such growth interruptions can be eliminated, if desired. For example, such an interruption can be avoided by programming the cell temperatures to ramp at the appropriate times and by attaching a servo motor to the valve which controls the arsenic flux. Avoiding growth interruptions may be advantageous in particular embodiments to prevent or reduce the

accumulation of impurities on the surface during periods when no growth is occurring.

In the present example, the temperature of the gallium effusion cell was further controlled to achieve a growth rate of about 0.1 micrometers per hour.

The gallium arsenide confinement layers were grown at standard arsenic overpressure of greater than 4:1 to a thickness of about 25 nanometers. Bismuth flux was generated and incident on the substrate while growing the gallium arsenide confinement layers, but due to the arsenic overpressure conditions bismuth atoms do not incorporate into the arsenic lattice sites under these conditions. This allows the bismuth adsorption layer to accumulate on the surface, while still preventing bismuth incorporation until the arsenic flux rate is lowered.

During growth of the quantum well layer the arsenic cell temperature was further controlled to allow for control over the diatomic arsenic flux rate to provide low arsenic overpressure conditions of nearly stoichiometric levels (2.5:1) to enhance bismuth incorporation in the quantum well layer. The quantum well layer thickness was about 50 nanometers. The bismuth cell temperature is controlled to produce a bismuth flux that meets the criterion in

Eqn 8. Determining the bismuth cell temperature for a particular substrate temperature may involve performing flux calibration runs at various flux rates to determine a bismuth flux rate and corresponding temperature that meets the criterion in Eqn 8.

Once the second confinement layer had been grown to a thickness of about 25 nanometers, the overall growth rate (i.e. the gallium flux rate F Ga ) and the substrate temperature were ramped back to the standard gallium arsenide growth conditions above for growth of a p-doped gallium arsenide layer (i.e. the region 110 shown in Figure 1). Gas injection of CBr4 was enabled causing a small region about 25 nanometers thick where the p-doping has a

non-uniform increasing concentration gradient. During gas injection of CBr4 the overall growth rate and the substrate temperature were ramped back up to standard growth conditions for gallium arsenide, such that the growth was permitted to continue without a break. The p-doped gallium arsenide layer was grown to about 1000 nanometer thickness and p-dopant concentration of about 5* 10 17 cm "3 , followed by about a 100 nanometer thickness capping layer of high p-dopant concentration (approximately 5x10 18 cm "3 ). The highly doped capping layer was included to provide for good ohmic connection to the p-doped gallium arsenide layer. High resolution x-ray diffraction was used to confirm layer thicknesses and bismuth incorporation in the samples.

For electrical connection to the samples, small circular Ti/Pt/Au p-type Ohmic contacts having a diameter of about 0.32mm were deposited over the p-type capping layer through a metal shadow mask using e-beam evaporation. A large area Ni/AuGe/Au n-type contact was deposited on the back of the wafer

(i.e. the back of the n-doped gallium arsenide substrate).

The wafer was then annealed at 450 0 C for 20 seconds to improve the contact conductivity. Then, using the circular p-type Ti/Pt/Au contacts as a mask, 300 nm mesas were etched from the surface of the capping layer to minimize current spreading in the device. The wafer was then diced into pieces of about 3mm x 5mm, each having several circular p-type contacts on the front and an area n-type contact on the back. The n-type contact was bonded to a copper block using silver epoxy providing a cathode connection for the device, while an anode connection was provided by wire bonding to the p-type contact.

Electroluminescence measurements were made in a closed cycle optical cryostat using an optical spectrometer with a cooled linear array InGaAs detector. The emission spectra for a device having a bismuth concentration of about 1.8% is shown at 160 in Figure 9 under current density conditions of

100A/cm 2 , 75A/cm 2 , and 50A/cm 2 and a temperature of about 300 degrees Kelvin. Referring to Figure 9, the device shows a first emission peak 162 at about 870 nanometers, which is due to electroluminescence of the gallium arsenide confinement layers. The 870 nanometer electroluminescence will generally be eliminated in commercial devices by fabrication of confinement layers comprising aluminum gallium arsenide, for example, above and below the active region.

A second emission peak 164 at about 987 nanometers is due to electroluminescence of the GaAsi -x Bi x quantum well layer. The GaAs-ι -x Bi x spectrum is centered at about 986 nanometers and has a spectral width of about 100 nanometers full width half maximum (FWHM). The emitted light intensity was collected from around the periphery of the circular p-type contact, which is opaque. No significant shift of the spectral peak is evident over the range of current densities at which the spectrum was measured (i.e.

50A/cm 2 - 100A/cm 2 ). Furthermore, in subsequent tests, no significant shift of the spectral peak was observed between operating temperatures of 100 degrees Kelvin to 300 degrees Kelvin.

It should be readily appreciated that various enhancements to the rudimentary light emitting diode structure shown in Figure 1 and grown in accordance with the above example may be achieved. Optimization of the quantum well layer thickness, incorporation of a plurality of quantum well layers, optimization of ohmic contacts, and/or using aluminum gallium arsenide confinement layers, are examples of optimizations that are expected to lead to enhanced light generation.

Further Examples

Referring to Figure 11 , the photoluminescence intensities for a series of samples of GaAsI -xBix with different bismuth concentrations are shown generally at 1100. The samples were all in the form of double

heterostructures with a 300 nm thick buffer layer of GaAs deposited on a GaAs (100) substrate, followed by a 60 nm layer of GaAsI -xBix and capped with 300 nm of GaAs, all layers grown by molecular beam epitaxy. The bismuth containing layers were grown under different conditions as follows: the lowest bismuth concentration sample in Figure 11 was grown at 360 0 C and the highest bismuth concentration sample was grown at 270 0 C. The samples were not annealed after growth. In order to increase the bismuth concentration, the high bismuth concentration samples were grown at higher bismuth flux rates and lower arsenic flux rates than the lower bismuth concentration samples. As shown in Figure 11 , the photoluminescence intensity increases with bismuth content for bismuth concentrations up to about 4%. This is an unexpected result: in contrast, in a GaAsI -xNx alloy, for example, the photoluminescence intensity drops rapidly with increasing nitrogen content in the same concentration range. The two different alloys, one containing nitrogen and the other containing bismuth, are similar in that clusters of bismuth atoms and clusters of nitrogen atoms are expected to produce localized states. Produced in sufficient numbers with sufficiently strong binding energy, localized states can cause non-radiative recombination which can reduce the photoluminescence intensity.

Referring to Figures 12 and 13, the electroluminescence from a device fabricated according to the method described in the example above is compared with two other devices. One of the other devices is fabricated by a similar method except that the bismuth containing active layer is replaced with a layer containing three InxGai-xAs quantum wells spaced with GaAs. In the third device the active light emitting region consists of a GaAs layer grown in a conventional way without bismuth. It is well known that GaAs grown by molecular beam epitaxy at conventional growth temperatures (550 - 600 0 C) with excess arsenic is a high quality optoelectronic material. High quality in this case means that it produces strong electroluminescence. Similarly, lnxGa1-xAs quantum well structures are also known to be high quality

optoelectronic materials as long as they are below the critical thickness for formation of misfit dislocations. GaAs samples grown at low temperatures, namely 300 0 C and lower are known to have poor optoelectronic properties. In fact, the very short electron and hole lifetimes in low temperature GaAs are exploited in fast photoconductive switches.

Figure 12 shows first and second electroluminescence spectra 1200 and 1202, from a GaAs1-xBix device in which the active layer contains 1.4% bismuth, when pumped by a 20 mA injection current. The first electroluminescence spectrum 1200 corresponds to a measurement temperature of 100K, while the second spectrum 1202 corresponds to a measurement temperature of 296K. The structure of GaAsI -xBix device is the same as the structure of the device discussed in the example above, except that the growth conditions for the active bismuth-containing layer have been adjusted to give 1.4% bismuth. The output light intensity of the GaAsI- xBix device was found to be about 1000x greater at 100 Kelvins than at 296 K.

Figure 12 also shows an electroluminescence spectrum 1204 from a similarly structured device containing three InxGai-xAs quantum wells in the active region, instead of the GaAs1-xBix layer. The spectrum 1204 corresponds to a device operating at 296K, pumped by a 10 mA current. The 100K GaAsI- xBix device is about 25Ox brighter than the room temperature InxGai-xAs quantum well device. Low temperature electroluminescence from the InxGal- xAs device is not shown as it was observed to have lower intensity than at room temperature. This means that the light output efficiency of the bismuth alloy measured at low temperature is as good or better than a well known high quality optoelectronic material. This is a surprising result because the GaAsI- xBix layer is grown at low temperatures at which GaAs grown without bismuth is known to have low quality. Also, clusters of bismuth atoms are expected to produce localized states which normally reduce photoluminescence efficiency.

Referring to Figure 13, the electroluminescence spectra 1200 and 1202 shown in Figure 12 for the GaAsI -xBix device at 100K and 296 K respectively, are compared to first and second electroluminescence spectra 1300 and 1302 for a GaAs device grown under conventional GaAs growth conditions at high substrate temperatures. The first GaAs spectrum 1300 corresponds to a measurement temperature of 100K, while the second GaAs spectrum 1302 corresponds to a measurement temperature of 295K. The undoped active region in this GaAs device was 100 nm thick, the same as for the GaAs1-xBix and lnxGa1-xAs devices whose spectra are shown in Figure

12. The other steps in the fabrication process were the same as for these other devices. The GaAs device was pumped with a 10 mA current to produce the electroluminescence spectra 1300 and 1302 at temperatures of 100K and 295K, respectively. Figure 13 shows that the room temperature intensity from the device with the GaAs active region is about 10x brighter than the room temperature intensity for the device with the GaAsBi active region, while conversely, at 100K, the bismuth containing device is about 10x brighter than the GaAs device. Again, since GaAs grown under conventional conditions by molecular beam epitaxy is known to be a high quality optoelectronic material, this result shows that GaAsBi grown under nonstandard growth conditions of low substrate temperature and low arsenic overpressure as described herein produces electroluminescence efficiently.

Avalanche photodiode Referring to Figure 10, in another embodiment of the invention, a gallium arsenide bismide active layer may be incorporated in a light detector, such as the avalanche photodiode shown generally at 500.

In this embodiment, the avalanche photodiode includes a Ml-V semiconductor alloy including bismuth in an active carrier multiplication region. More particularly, in the present embodiment, the avalanche photodiode 500

includes a relatively thick gallium arsenide bismide active layer 502 grown generally in accordance with the process 340 shown in Figure 6. The active layer 502 is surrounded by a p-type gallium arsenide layer 504 and an n-type gallium arsenide layer 506. The n-type layer anode contact is provided by a conductive electrode 508, while an annular p-type cathode contact 510 also provides a centrally located light receiving window 512.

The avalanche photodiode operated under high reverse-bias voltage provided by the direct current source 514. A high reverse bias voltage causes a strong internal electric field, close to the breakdown field, within the active layer 502.

In response to light received through the window 512, charge carriers are generated in the active layer and are accelerated by the electric field to increased kinetic energies. These high kinetic energy charge carriers in turn produce additional electron-hole pairs through impact ionization within the active region, resulting in a multiplication or "gain" that results in an increased photocurrent in response to the incident light.

In the presence of an electric field close to the breakdown field, electrons and holes photogenerated in the active layer 502 can impact-ionize covalent bonds and generate additional electron-hole pairs. In silicon, the cross section for impact ionization for electrons is higher than for holes, while in most IN-V semiconductors, including GaAs, the cross section for impact ionization by electrons and holes is similar. If the cross section for impact ionization is nearly the same for electrons and holes, then the total number of carriers generated per absorbed photon is not uniform from one photon absorption event to another but rather fluctuates with a high degree of variability or noise associated with each event. The avalanche photocurrent with the least noise is generated when only one of the carriers creates electron hole pairs by impact ionization. This is one of the reasons that silicon avalanche photodiodes have broader application than avalanche photodiodes made from Hl-V alloy semiconductors. Bismuth alloying of GaAs strongly

affects the mobility of holes but has only a small effect on the mobility of electrons. Therefore, the holes will not gain energy by acceleration in an electric field as efficiently as the electrons, so that the impact ionization coefficient of holes will be substantially reduced. In this case, the avalanche photocurrent will be dominated by electrons which will produce a low noise avalanche photodiode. This characteristic of GaAs-bismuth alloys is expected to be present in other bismuth alloys, for example in the InxGai.xAsi.yBiy quaternary alloys. These alloys can be grown lattice matched to InP substrates by adjusting the Ga/ln ratio and the As/Bi ratio. Low noise Nl-V photodiodes open up the possibility of making low noise avalanche photodiodes that operate over a broader range of wavelengths than silicon avalanche photodiodes, for example at the 1300 nm and 1550 nm wavelengths use in optical communication systems.

Advantageously, the process described above may be employed for growth of gallium arsenide bismide semiconductor material having high bismuth concentrations where the incorporated bismuth substantially substitutes arsenic and is located in arsenic lattice sites. Such semiconductor material provides useful optoelectronic properties and may be used in devices that operate at wavelengths longer than 870 nanometers.

Semiconductor materials including gallium arsenide and incorporated bismide fabricated in accordance with the process 340 shown in Figure 6 may also be utilized in other semiconductor devices, such as in the base layer of heteroju notion bipolar transistors, for example.

While specific embodiments of the invention have been described and illustrated, such embodiments should be considered illustrative of the invention only and not as limiting the invention as construed in accordance with the accompanying claims.