Title:
GATE DRIVER CIRCUIT AND IMAGE DISPLAY DEVICE EMPLOYING SAME
Document Type and Number:
WIPO Patent Application WO/2015/008447
Kind Code:
A1
Abstract:
This gate driver IC (12), when set to a first mode by a logic signal of an FNC* terminal, shifts data within the gate driver IC (12) (gate driver circuit) in sync with one clock cycle of a clock input to a CLK** terminal (clock input terminal), and outputs a select voltage or a non-select voltage, according to data position within the gate driver IC (12); and when set to a second mode by a logic signal of the FNC* terminal, shifts data within the gate driver IC (12) (gate driver circuit) in sync with n (n is an integer equal to 2 or greater) clock cycles of the clock input to the CLK** terminal, and outputs a select voltage or a non-select voltage, according to data position within the gate driver IC (12).
Inventors:
TAKAHARA HIROSHI
NAKAGAWA HIROFUMI
NAKAGAWA HIROFUMI
Application Number:
PCT/JP2014/003554
Publication Date:
January 22, 2015
Filing Date:
July 03, 2014
Export Citation:
Assignee:
PANASONIC CORP (JP)
International Classes:
G09G3/30; G09G3/20; H01L51/50
Foreign References:
| JP2010266715A | 2010-11-25 | |||
| JP2010170144A | 2010-08-05 | |||
| JPH11311980A | 1999-11-09 | |||
| JP2006209152A | 2006-08-10 |
Attorney, Agent or Firm:
NII, Hiromori et al. (JP)
New house Extensive 守 (JP)
New house Extensive 守 (JP)
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