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Title:
GENERATING SAMPLES OF OUTCOMES FROM A QUANTUM SIMULATOR
Document Type and Number:
WIPO Patent Application WO/2019/154602
Kind Code:
A1
Abstract:
Techniques for improving a quantum simulatorare provided. In one example,a system includes a simulation component and a snapshot component. The simulation component determines a set of random numbers and simultaneously provides the set of random numbers to an arithmetic decoder to perform a stochastic simulation process. The snapshot component generates snapshot data indicative of a state of the stochastic simulation process based on data associated with a stochastic branching point for the stochastic simulation process.

Inventors:
BISHOP, Lev, Samuel (IBM CORPORATION, PO BOX 218,1101 KITCHAWAN R, YORKTOWN HEIGHTS New York, 10598, US)
WOOD, Christopher, James (IBM CORPORATION, PO BOX 218,1101 KITCHAWAN R, YORKTOWN HEIGHTS New York, 10598, US)
Application Number:
EP2019/051141
Publication Date:
August 15, 2019
Filing Date:
January 17, 2019
Export Citation:
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Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION (New Orchard Road, Armonk, New York, 10504, US)
IBM UNITED KINGDOM LIMITED (PO Box 41, North Harbour, Portsmouth Hampshire PO6 3AU, PO6 3AU, GB)
International Classes:
G06N10/00; G06N5/00; G06N20/00
Domestic Patent References:
WO2017069835A22017-04-27
Foreign References:
US20060155525A12006-07-13
US20080140749A12008-06-12
Other References:
CERF N J ET AL: "Monte Carlo Simulation of Quantum Computation", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 26 March 1997 (1997-03-26), XP080611262
NAVARRO CRISTÓBAL A ET AL: "Adaptive multi-GPU Exchange Monte Carlo for the 3D Random Field Ising Model", COMPUTER PHYSICS COMMUNICATION, ELSEVIER SCIENCE PUBLISHERS B.V., AMSTERDAM, NL, vol. 205, 27 April 2016 (2016-04-27), pages 48 - 60, XP029560587, ISSN: 0010-4655, DOI: 10.1016/J.CPC.2016.04.007
MOHAMED MOUSSA ET AL: "Decision tree module within decision support simulation system", SIMULATION CONFERENCE, 2004. PROCEEDINGS OF THE 2004 WINTER, IEEE, 5 December 2004 (2004-12-05), pages 1268 - 1276, XP058099725, ISBN: 978-0-7803-8786-7
Attorney, Agent or Firm:
WILLIAMS, Julian (IBM United Kingdom Limited, Intellectual Property LawHursley Park, Winchester Hampshire SO21 2JN, SO21 2JN, GB)
Download PDF:
Claims:
CLAIMS

1. A computer-implemented method, comprising:

determining, by a system operatively coupled to a processor, a set of random numbers;

performing, by the system, a stochastic simulation process by simultaneously providing the set of random numbers to an arithmetic decoder; and

generating, by the system, snapshot data indicative of a state of the stochastic simulation process based on data associated with a stochastic branching point for the stochastic simulation process.

2. The method of claim 1 , wherein the performing comprises performing a quantum circuit simulation process associated with a quantum circuit based on the set of random numbers.

3. The method of claim 1 , further comprising:

performing, by the system, one or more other portions of the stochastic simulation process based on the snapshot data.

4. The method of claim 1 , further comprising:

avoiding, by the system, processing of one or more other portions of the stochastic simulation process based on the snapshot data.

5. The method of claim 1 , further comprising:

altering, by the system, a random number from the set of random numbers to provide improved numerical precision during the stochastic simulation process.

6. A computer program product, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform the steps of a method as claimed in any of claims 1 to 5.

7. A system, comprising:

a memory that stores computer executable components;

a processor that executes computer executable components stored in the memory, wherein the computer executable components comprise:

a simulation component that determines a set of random numbers and simultaneously provides the set of random numbers to an arithmetic decoder to perform a stochastic simulation process; and

a snapshot component that generates snapshot data indicative of a state of the stochastic simulation process based on data associated with a stochastic branching point for the stochastic simulation process.

8. The system of claim 7, wherein the simulation component performs a quantum circuit simulation process associated with a quantum circuit based on the set of random numbers simultaneously provided to the arithmetic decoder.

9. The system of claim 7, wherein the simulation component generates a quantum wavefunction for the stochastic simulation process based on the data associated with the stochastic branching point for the stochastic simulation process.

10. The system of claim 7, wherein the simulation component performs another portion of the stochastic simulation process based on the snapshot data that is indicative of the state of the stochastic simulation process.

11. The system of claim 7, wherein the simulation component alters one or more portions of the stochastic simulation process based on the snapshot data that is indicative of the state of the stochastic simulation process.

12. The system of claim 7, wherein the simulation component avoids processing one or more portions of the stochastic simulation process based on the snapshot data that is indicative of the state of the stochastic simulation process.

13. The system of claim 7, wherein the simulation component updates a data list for the stochastic simulation process based on the snapshot data that is indicative of the state of the stochastic simulation process.

14. The system of claim 7, wherein the simulation component adds the set of random numbers to a data list for the stochastic simulation process and updates one or more indices in the data list at the stochastic branching point for the stochastic simulation process.

15 The system of claim 14, wherein the simulation component partitions the data list based on a binary search process at the stochastic branching point for the stochastic simulation process.

16. The system of claim 7, wherein the simulation component alters a random number from the set of random numbers to provide improved numerical precision during the stochastic simulation process.

17. The system of claim 7, wherein the simulation component generates the snapshot data indicative of the state of the stochastic simulation process to reduce processing time associated with the stochastic simulation process.

18. A system, comprising:

a memory that stores computer executable components; a processor that executes computer executable components stored in the memory, wherein the computer executable components comprise:

a random number component that generates a set of random numbers;

an entropy coding component that performs entropy coding based on the set of random numbers, wherein the set of random numbers is simultaneously provided to an arithmetic decoder employed by the entropy coding component; and

a snapshot component that generates snapshot data indicative of a state of a stochastic simulation process based on data associated with a stochastic branching point for the stochastic simulation process.

19. The system of claim 18, wherein the entropy coding component performs one or more portions of the entropy coding based on the snapshot data that is indicative of the state of the stochastic simulation process.

20. The system of claim 18, wherein the random number component alters a random number from the set of random numbers to provide improved numerical precision during the stochastic simulation process.

Description:
GENERATING SAMPLES OF OUTCOMES FROM A QUANTUM SIMULATOR

Background

[0001] The present invention relates to quantum computer simulation.

[0002] Quantum computing employs quantum physics to encode information rather than binary digital techniques based on transistors. For example, a quantum computer can employ quantum bits (e.g., qubits) that operate according to a superposition principle of quantum physics and an entanglement principle of quantum physics. The superposition principle of quantum physics allows each qubit to represent both a value of Ί" and a value of "0" at the same time. The entanglement principle of quantum physics states allows qubits in a superposition to be correlated with each other. For instance, a state of a first value (e.g., a value of "1 " or a value of "0") can depend on a state of a second value. As such, a quantum computer can employ qubits to encode information rather than binary digital techniques based on transistors. Often times, it is desirable to simulate a quantum computer.

Conventionally, a quantum computer can be employed for quantum simulation. For instance, a quantum simulator can employ a quantum computer to perform a set of calculations to determine information associated with a quantum system. In one example, a quantum simulator can employ a quantum computer to perform a set of calculations to determine information associated with a physics model. For example, Amato et al. (U.S. Patent Publication No. 2008/0140749) discloses“a quantum algorithm where the superposition, entanglement with interference operators determined for performing selection, crossover, and mutation operations based upon a genetic algorithm.” Amato also discloses that“moreover, entanglement vectors generated by the entanglement operator of the quantum algorithm may be processed by a wise controller implementing a genetic algorithm before being input to the interference operator.” Amato further states that“this algorithm may be implemented with a hardware quantum gate or with a software computer program running on a computer,” and“further, the algorithm can be used in a method for controlling a process and a relative control device of a process which is more robust, requires very little initial information about dynamic behavior of control objects in the design process of an intelligent control system, or random noise insensitive (invariant) in a measurement system and in a control feedback loop.” Flowever, conventional simulators of a quantum computer are often inefficient and/or computationally expensive.

As such, conventional simulators of a quantum computer can be improved.

Summary

[0003] The following presents a summary to provide a basic understanding of embodiments of the invention. This summary is not intended to identify key or critical elements or delineate scope of the invention. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that is presented later. In one or more embodiments described herein, devices, systems, computer-implemented methods, apparatus and/or computer program products for facilitating classical simulation of a quantum computer are described. [0004] According to an embodiment of the invention, a system comprises a simulation component and a snapshot component. The simulation component determines a set of random numbers and simultaneously provides the set of random numbers to an arithmetic decoder to perform a stochastic simulation process. The snapshot component generates snapshot data indicative of a state of the simulation process based on data associated with a stochastic branching point for the simulation process. This provides an improved stochastic simulation process that includes a reduced amount of time for processing by the simulation process, a reduced amount of storage utilized by the simulation process, and a reduced amount of processing by the simulation process. The simulation component may perform a quantum circuit simulation process associated with a quantum circuit based on the set of random numbers simultaneously provided to the arithmetic decoder. The simulation component may generate a quantum wavefunction for the simulation process based on the data associated with the stochastic branching point for the simulation process. The simulation component may perform another portion of the simulation process based on the snapshot data. The simulation component may alter one or more portions of the simulation process based on the snapshot data. The simulation component may avoid processing one or more portions of the simulation process based on the snapshot data. The simulation component may update a data list for the simulation process based on the snapshot data. The simulation component may add the set of random numbers to a data list for the simulation process and updates one or more indices in the data list at the branching point. The simulation component may partition the data list based on a binary search process at the branching point. The simulation component may alter a random number from the set of random numbers to provide improved numerical precision during the simulation process. The simulation component may generate the snapshot data to reduce processing time associated with the simulation process.

[0005] According to another embodiment of the invention, a computer-implemented method is provided. The method comprises determining, by a system operatively coupled to a processor, a set of random numbers. The method also comprises performing, by the system, a stochastic simulation process by simultaneously providing the set of random numbers to an arithmetic decoder. Furthermore, the method comprises generating, by the system, snapshot data indicative of a state of the simulation process based on data associated with a stochastic branching point for the simulation process. The method provides an improved stochastic simulation process that includes a reduced amount of time for processing by the simulation process, a reduced amount of storage utilized by the simulation process, and/or a reduced amount of processing by the simulation process. In certain embodiments, the performing the stochastic simulation process can comprise performing a quantum circuit simulation process associated with a quantum circuit based on the set of random numbers. The method may further provide performing, by the system, one or more other portions of the simulation process based on the snapshot data. The method may further provide avoiding, by the system, processing of one or more other portions of the simulation process based on the snapshot data. The method may further provide altering, by the system, a random number from the set of random numbers to provide improved numerical precision during the simulation process. The generating the snapshot data may comprise improving the simulation process. [0006] According to yet another embodiment of the invention, a computer program product for improving a quantum simulator comprises a computer readable storage medium having program instructions embodied therewith. The instructions are executable by a processor and cause the processor to determine, by the processor, a set of random numbers. The instructions also cause the processor to perform, a quantum circuit simulation process associated with a quantum circuit by simultaneously providing the set of random numbers to an arithmetic decoder. The instructions also cause the processor to generate, snapshot data indicative of a state of the simulation process based on data associated with a stochastic branching point for the simulation process. The product provides an improved quantum circuit simulation process that includes a reduced amount of time for processing by the simulation process, a reduced amount of storage utilized by the simulation process, and/or a reduced amount of processing by the simulation process. The instructions may also cause the processor to perform, one or more other portions of the simulation process based on the snapshot data. The instructions may also cause the processor to alter, one or more portions of the simulation process based on the snapshot data.

[0007] According to yet another embodiment of the invention, a system comprises a random number component, an entropy coding component and a snapshot component. The random number component generates a set of random numbers. The entropy coding component performs entropy coding based on the set of random numbers, where the set of random numbers is simultaneously provided to an arithmetic decoder employed by the entropy coding component. The snapshot component generates snapshot data indicative of a state of a stochastic simulation process based on data associated with a stochastic branching point for the simulation process. The system provides an improved stochastic simulation process that includes a reduced amount of time for processing by the simulation process, a reduced amount of storage utilized by the simulation process, and/or a reduced amount of processing by the simulation process. The entropy coding component may perform one or more portions of the entropy coding based on the snapshot data. The random number component may alter a random number from the set of random numbers to provide improved numerical precision during the simulation process.

[0008] According to yet another embodiment of the invention, a computer-implemented method is provided. The method comprises determining, by a system operatively coupled to a processor, a set of random numbers. The method also comprises performing, by the system, a quantum circuit simulation process associated with a quantum circuit by simultaneously providing the set of random numbers to an arithmetic decoder. Furthermore, the method comprises generating, by the system, snapshot data indicative of a state of the simulation process based on data associated with a stochastic branching point for the simulation process. The method provides an improved quantum circuit simulation process that includes a reduced amount of time for processing by the simulation process, a reduced amount of storage utilized by the simulation process, and/or a reduced amount of processing by the simulation process. The method may further comprise performing, by the system, one or more other portions of the simulation process based on the snapshot data. Description of the Drawings

[0009] FIG. 1 is a block diagram of a system that includes a quantum simulator component embodying the invention;

[0010] FIG. 2 is a block diagram of another system that includes a quantum simulator component embodying the invention;

[0011] FIG. 3 is a block diagram of yet another system that includes a quantum simulator component embodying the invention

[0012] FIG. 4 is a block diagram of yet another system that includes a quantum simulator component in accordance embodying the invention;

[0013] FIG. 5 is a block diagram of yet another system that includes a quantum simulator component embodying the invention;

[0014] FIG. 6 is a flow chart of a system that facilitates a stochastic simulation process embodying the invention;

[0015] FIG. 7 is a block diagram of a system associated with a stochastic simulation process embodying the invention;

[0016] FIG. 8 is a graph that illustrates a decision tree process embodying the invention;

[0017] FIG. 9 is a flow diagram of a computer-implemented method embodying the invention for improving a quantum simulator; and,

[0018] FIG. 10 is a block diagram of an operating environment in which one or more embodiments of the invention can be facilitated.

Detailed Description

[0019] The following detailed description is merely illustrative and is not intended to limit the invention or uses thereof. Furthermore, there is no intention to be bound by any expressed or implied information presented in the preceding Background or Summary sections, or in the Detailed Description section.

[0020] Embodiments of the invention are now described with reference to the drawings, wherein like referenced numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of the invention. It is evident, however, in various cases, that the invention can be practiced without these specific details.

[0021] Quantum computing employs quantum physics to encode information rather than binary digital techniques based on transistors. For example, a quantum computer can employ quantum bits (e.g., qubits) that operate according to a superposition principle of quantum physics and an entanglement principle of quantum physics. The superposition principle of quantum physics allows each qubit to represent both a value of Ί" and a value of "0" at the same time. The entanglement principle of quantum physics states allows qubits in a superposition to be correlated with each other. For instance, a state of a first value (e.g., a value of Ί" or a value of "0") can depend on a state of a second value. As such, a quantum computer can employ qubits to encode information rather than binary digital techniques based on transistors. Often times, it is desirable to simulate a quantum computer.

Conventionally, a quantum computer can be employed for quantum simulation. For instance, a quantum simulator can employ a quantum computer to perform a set of calculations to determine information associated with a quantum system. In one example, a quantum simulator can employ a quantum computer to perform a set of calculations to determine information associated with a physics model. Flowever, conventional simulators of a quantum computer are often inefficient and/or computationally expensive. As such, conventional simulators of a quantum computer can be improved.

[0022] To address these and/or other issues, embodiments of the invention include systems, computer- implemented methods, and computer program products for classical simulation of a quantum computer. For instance, one or more classical computing resources (e.g., computing run time, memory, etc.) can be minimized for simulating stochastic evolution of a quantum state of a quantum computer by improving samples of outcomes from a quantum simulator. As used herein,“classical” can refer to classical computer processing using a digital computer (e.g., a computer that is not a quantum computer). In an embodiment of the invention, entropy coding such as, for example, arithmetic coding, is employed to optimize determination of a state of simulation by a quantum simulator. A set of N random numbers is generated at a start of a simulation process for a quantum simulator where N is a number of samples for the quantum simulator. The set can be, for example, a set of random real numbers between an interval [0,1]. An entropy decoding algorithm is performed using the set to determine and/or select a processing branch during the simulation process. In one example, an arithmetic decoding algorithm is performed using the set to determine and/or select a processing branch during the simulation process. A processing branch can be determined and/or selected at a branch point associated with the simulation process. A branch point can be, for example, a stochastic decision point during the simulation process. In another aspect, an entire set of data is decoded simultaneously. Therefore, neighboring data values from a particular data value in the set is determined at each branch point. Furthermore, it is determined whether another processing branch during the simulation process is employed by another data value in the set. If so, a snapshot of the simulation process can be generated. The snapshot represents a state of the simulation process. The snapshot is employed at one or more other instances during the simulation process to, for example, avoid redoing one or more calculations during the simulation process. In an example where the set of N random numbers are chosen on the interval [0, 1], the interval [0, 1] is successively subdivided according to a set of branch points to generate a decision tree indicative of a tree-like model associated with a set of processing decisions during simulation. The set of N random numbers is employed to determine a set of paths through the decision tree during simulation. A snapshot can also be obtained before a branch point of the decision tree to save simulation costs up to the branch point by resuming computation from the snapshot at one or more decision forks in the decision tree.

[0023] In another embodiment of the invention, a stochastic simulation is performed by generating a set of random numbers and providing the set to an arithmetic decoder. Presence and/or absence of one or more samples at a stochastic branching point is employed during the simulation to inform a checkpointing process for the simulation. The simulation may be a simulation of a quantum circuit via wavefunction evolution. The set of random numbers may be implemented via a sorted data list and tracking of a remaining set of data at a decision point may be performed by updating indices into the sorted data list. Partitioning of a remaining sublist may be chosen at a decision point by performing a binary search into the sorted data list between current indices. In another aspect, the set is initially generated with limited numerical precision and additional precision is dynamically added during the simulation. For example, additional precision may be dynamically added during the simulation by determining additional random numbers, adding new entropy as one or more additional digits, etc. Ordering of data values for a random number from the set may be reordered to facilitate adding additional precision.

[0024] As such, accuracy and/or efficiency of classical simulation of a quantum computer can be improved. Furthermore, time to perform amount of processing performed, and/or amount of storage utilized by a quantum simulation process can be reduced. Moreover, performance of, efficiency of, timing characteristics of, power characteristics of, and/or other characteristics of a quantum circuit and/or a classical processor associated with a quantum simulator can be improved.

[0025] FIG. 1 is a block diagram of a system 100 for improving samples of outcomes from a quantum simulator embodying the invention. The system 100 may be a quantum simulation system associated with technologies such as, but not limited to, classical computing technologies, quantum simulation technologies, quantum circuit technologies, quantum processor technologies, quantum computing technologies, artificial intelligence technologies, medicine and materials technologies, supply chain and logistics technologies, financial services technologies, and/or other digital technologies. The system 100 employs hardware and/or software to solve problems that are highly technical in nature, that are not abstract and that cannot be performed as a set of mental acts by a human. Some of the processes performed may be performed by one or more specialized computers (e.g., one or more specialized processing units, a specialized computer with a quantum simulator component, etc.) for carrying out defined tasks related to machine learning. The system 100 and/or components of the system 100 can be employed to solve new problems that arise through advancements in technologies mentioned above, computer architecture, and/or the like. The system 100 provides technical improvements to simulations of performance of a quantum computer, quantum circuit systems, classical simulation systems, classical computing systems, artificial intelligence systems, medicine and materials systems, supply chain and logistics systems, financial services systems, and/or other systems. The system 100 also provides technical improvements to a quantum device (e.g., a quantum processor, a quantum computer, etc.) by improving processing performance, processing efficiency, processing characteristics, timing characteristics and/or power efficiency of the quantum device.

[0026] The system 100 includes a quantum simulator component 102. The quantum simulator component 102 includes a simulation component 104 and a snapshot component 106. The quantum simulator component 102 may include a machine-executable component embodied within a machine, e.g., embodied in a computer readable medium associated with a machine. Such a component, when executed by the machine, (e.g., computer, computing device, virtual machine, etc.) can cause the machine to perform the operations described. The quantum simulator component 102 also includes memory 108 that stores computer executable components and instructions. Furthermore, the quantum simulator component 102 includes a processor 110 to facilitate execution of the instructions. The simulation component 104, snapshot component 106, memory 108 and processor 110 are communicatively coupled to one another.

[0027] The quantum simulator component 102 (e.g., the simulation component 104 of the quantum simulator component 102) receives simulation input data 112, for example, information associated with a quantum system.

For example, the simulation input data 112 can be associated with a physics model, a statistical model, or a quantum circuit. The simulation input data 112 may include a machine-readable description of a quantum circuit. The quantum circuit may be a model for quantum computations associated with a sequence of quantum gates. The simulation input data 112 may textually describe qubit gates of a quantum circuit associated with qubits.

Additionally, or alternatively, the simulation input data 112 may include marker data indicative of information for marker elements that tag locations associated with a quantum circuit. The marker data may include marker elements that tag a location of qubit gates of a quantum circuit associated with qubits.

[0028] The simulation component 104 may determine a set of random numbers. The random numbers may be a set of random real numbers. The set of random numbers may be between a first value (e.g., a value equal to“0”) and a second value (e.g., a value equal to Ί”). The set of random numbers may be initially generated with limited numerical precision. Additional precision may be dynamically added during simulation. For example, a random number from the set may be initially generated with a certain number of bits. Additional bits may be dynamically added during simulation. The simulation component can alter at least one random number from the set to provide improved numerical precision during the stochastic simulation process. Additionally, the simulation component 104 may simultaneously provide the set to an arithmetic decoder to perform a stochastic simulation process. The stochastic simulation may be a process that analyzes, monitors and/or simulates transformation of outcomes that may change randomly. The stochastic simulation process may be a quantum simulation process (e.g., a quantum circuit simulation process). The quantum simulation process may be, for example, a classical simulation process for a quantum circuit that employs qubits to encode information and/or perform calculations. The simulation component 104 may perform a quantum circuit simulation process associated with a quantum circuit based on the set of random numbers simultaneously provided to the arithmetic decoder. In another embodiment of the invention, the simulation component 104 may generate a quantum wavefunction for the stochastic simulation process based on the data associated with the stochastic branching point. Simulation of a quantum circuit based on the set of random numbers may be employed to determine a set of outcomes of stochastic circuit operations such as, for example, measurements, errors, etc.

[0029] The snapshot component 106 generates snapshot data 114 based on data associated with a stochastic branching point for the stochastic simulation process. The snapshot data 114 may be indicative of a state of the stochastic simulation process. The stochastic branching point may be a branch point during the stochastic simulation process. The stochastic branching point may be a stochastic decision point during the stochastic simulation process. The snapshot data 114 may be indicative of a state of the quantum circuit simulation process. For example, a stochastic branching point of the quantum circuit simulation process may be related to a noise event associated with a quantum circuit. In another example, a stochastic branching point of the quantum circuit simulation process may be related to a measurement associated with a quantum circuit. The simulation component 104 may perform another portion of the stochastic simulation process based on the snapshot data 114. For example, in response to a determination during the stochastic simulation process that a stochastic branching point satisfies a defined criterion, the stochastic simulation process may employ the snapshot data 114 rather that recalculating one or more calculations associated with the stochastic simulation process. A defined criterion associated with the stochastic branching point can be, for example, a determination that one or more calculations for the stochastic simulation process have been previously performed during the stochastic simulation process. In another embodiment of the invention, the simulation component 104 may alter one or more portions of the stochastic simulation process based on the snapshot data 114. For example, a processing decision tree and/or a processing workflow for the stochastic simulation process may be altered based on the snapshot data 114. The simulation component 104 may avoid processing portions of the stochastic simulation process based on the snapshot data 114. For example, the simulation component 104 may avoid redoing calculations during the stochastic simulation process by employing the snapshot data 114. In another embodiment of the invention, the simulation component 104 may update a data list for the stochastic simulation process based on the snapshot data 114. The data list may be updated to track data at a stochastic branching point for the stochastic simulation process. The simulation component 104 may add the set of random numbers to a data list for the stochastic simulation process. Furthermore, the simulation component 104 may update one or more indices in the data list at the stochastic branching point for the stochastic simulation process. The simulation component 104 may partition the data list based on a binary search process at the stochastic branching point for the stochastic simulation process. The simulation component 104 may generate stochastic simulation output data. Such output data may be data generated by the stochastic simulation process. Such output data may include a set of samples of outcomes from the stochastic simulation process. Such output data may include a set of samples of outcomes from a quantum circuit simulation process (e.g., from a quantum simulator).

[0030] The snapshot component 106 may generate the snapshot data 114 based on classifications, correlations, inferences and/or expressions associated with principles of artificial intelligence. For instance, the snapshot component 106 may employ an automatic classification system and/or process to determine the snapshot data 114. In one example, the snapshot component 106 may employ a probabilistic and/or statistical-based analysis (e.g., factoring into the analysis utilities and costs) to learn and/or generate inferences with respect to the stochastic simulation process. The snapshot component 106 may include an inference component (not shown) that can further enhance aspects of the snapshot component 106 utilizing in part inference based schemes to facilitate learning and/or generating inferences associated with the stochastic simulation process. The snapshot component 106 may employ any suitable machine-learning based techniques, statistical-based techniques and/or probabilistic- based techniques. For example, the snapshot component 106 can employ expert systems, fuzzy logic, SVMs, Hidden Markov Models (HMMs), greedy search algorithms, rule-based systems, Bayesian models (e.g., Bayesian networks), neural networks, other non-linear training techniques, data fusion, utility-based analytical systems, systems employing Bayesian models, etc. The snapshot component 106 may perform a set of machine learning computations associated with generation of the snapshot data 114. For example, the snapshot component 106 may perform clustering, logistic regression, decision tree, random forest, regression tree, least square, instance based, regression, support vector regression, k-means, spectral clustering, rule learning, Bayesian deep

Boltzmann, deep belief network computations, and/or different machine learning computations to determine the snapshot data 114.

[0031] It is to be appreciated that the quantum simulator component 102 (e.g., the simulation component 104 and/or the snapshot component 106) performs a stochastic simulation process and/or a decoding process that cannot be performed by a human (e.g., is greater than the capability of a single human mind). For example, an amount of data processed, a speed of data processed and/or data types of data processed by the quantum simulator component 102 (e.g., the simulation component 104 and/or the snapshot component 106) over a certain period of time is greater, faster and different than that which can be processed by a single human mind over the same period of time. The quantum simulator component 102 (e.g., the simulation component 104 and/or the snapshot component 106) are also fully operational towards performing one or more other functions (e.g., fully powered on, fully executed, etc.) while also performing the above-referenced stochastic simulation process and/or a decoding process. Moreover, snapshot data 114 generated by the quantum simulator component 102 (e.g., the simulation component 104 and/or the snapshot component 106) may include information impossible to obtain manually by a user. Information included in the snapshot data 114, and the variety and amount thereof can be more complex than information obtained manually by a user. [0032] The system 100 provides various advantages as compared to conventional simulators for a quantum computer. For instance, accuracy and efficiency of classical simulation of a quantum computer is improved by the system 100. Furthermore, the amount of time to perform processing performed and storage utilized by a quantum simulation process is reduced by the system 100. Moreover, performance and efficiency, power characteristics and/or other characteristics of a quantum circuit and/or a classical processor associated with a quantum simulator are improved by the system 100.

[0033] FIG. 2 is a block diagram of a system 200 of the invention.

[0034] The system 200 includes the quantum simulator component 102. The quantum simulator component 102 includes the simulation component 104, the snapshot component 106, the memory 108 and the processor 110.

The simulation component 104 includes a random number component 202. The random number component 202 facilitates a random number generation step for a stochastic simulation process (e.g., a quantum circuit simulation process). The random number component 202 may determine a set of random numbers. In one example, the random number component 202 employs a pseudorandom number generator to generate the set. Flowever, it is to be appreciated that other random number generation techniques can be employed to generate the set. The set may be, for example, a set of random real numbers.

[0035] A random number from the set may be a sequence of bit values that are randomly generated. In another embodiment of the invention, a random number from the set corresponds to a value between a first value (e.g., a value equal to“0”) and a second value (e.g., a value equal to“1”). The random number component 202 may initially generate the set with limited numerical precision. Furthermore, the random number component 202 may dynamically add additional precision for the set during the stochastic simulation process (e.g., the quantum circuit simulation process). For example, the random number component 202 may initially generate a random number from the set with a defined number of bits (e.g., four bits, etc.). Additionally, the random number component 202 may dynamically add one or more additional bits to the random number during the stochastic simulation process (e.g., the quantum circuit simulation process). The random number component 202 may dynamically add one or more additional bits to the random number multiple times during the stochastic simulation process (e.g., the quantum circuit simulation process). The random number component 202 may dynamically add one or more additional bits to the random number during the stochastic simulation process (e.g., the quantum circuit simulation process) based on a determination that the stochastic simulation process (e.g., the quantum circuit simulation process) satisfies a defined criterion. For example, the random number component 202 may dynamically add one or more additional bits to the random number during the stochastic simulation process (e.g., the quantum circuit simulation process) based on a determination that the stochastic simulation process (e.g., the quantum circuit simulation process) requires additional precision. In one example, the random number component 202 may dynamically add one or more additional bits to the random number during the stochastic simulation process (e.g., the quantum circuit simulation process) based on a determination that an entropy coding process of the stochastic simulation process (e.g., the quantum circuit simulation process) requires additional precision. In another example, the random number component 202 may dynamically add one or more additional bits to the random number during the stochastic simulation process (e.g., the quantum circuit simulation process) based on a determination that an arithmetic coding process of the stochastic simulation process (e.g., the quantum circuit simulation process) requires additional precision.

[0036] The system 200 provides various advantages as compared to conventional simulators for a quantum computer. For instance, accuracy and efficiency of classical simulation of a quantum computer is improved by employing the system 200. Furthermore, an amount of time to perform, processing performed, and storage utilized by a quantum simulation process is reduced by employing the system 200. Moreover, performance, efficiency, timing characteristics, power characteristics, and other characteristic of a quantum circuit and/or a classical processor associated with a quantum simulator are improved by employing the system 200.

[0037] FIG. 3 is a block diagram of a system 300 of the invention.

[0038] The system 300 includes the quantum simulator component 102. The quantum simulator component 102 includes the simulation component 104, the snapshot component 106, the memory 108 and the processor 110.

The simulation component 104 includes the random number component 202 and an entropy coding component 302. The entropy coding component 302 facilitates an entropy coding step for a stochastic simulation process (e.g., a quantum circuit simulation process). The entropy coding component 302 employs an arithmetic decoder associated with the entropy coding step. The arithmetic decoder facilitates information-theoretic optimal data compression indicative of compression limited only by quality of a statistical model. The arithmetic decoder divides data into sub-intervals representing all possible data strings, where a size of a sub-interval corresponds to probability of the data string. A length of a bit-string to uniquely identify a given data string whose probability is p, is an information-theoretic optimal value equal to log2(p). The entropy coding component 302 employs the set of random numbers generated by the random number component 202 to facilitate the entropy coding step. The entropy coding component 302 may provide the set to the arithmetic decoder to generate random samples from the simulation input data 112. The arithmetic decoder associated with the entropy coding component 302 decodes the set of random numbers simultaneously. The stochastic simulation process (e.g., the quantum circuit simulation process) maintains a current interval specified by the arithmetic decoder. The current interval is reduced as the stochastic simulation process (e.g., the quantum circuit simulation process) progresses.

[0039] The system 300 provides various advantages as compared to conventional simulators for a quantum computer. For instance, accuracy and efficiency of classical simulation of a quantum computer is improved by the system 300. Furthermore, an amount of time to perform processing performed, storage utilized by a quantum simulation process is reduced by the system 300. Moreover, performance, efficiency, timing characteristics, power characteristics, and other characteristic of a quantum circuit and/or a classical processor associated with a quantum simulator are improved by the system 300.

[0040] FIG. 4 is a block diagram of a system 400 of the invention.

[0041] The system 400 includes the quantum simulator component 102 and a quantum circuit 402. The quantum simulator component 102 performs a simulation of the quantum circuit 402. The quantum simulator component 102 may perform a simulation of the quantum circuit 402 via wavefunction evolution indicative of a quantum model that describes changes and/or quantum effects of the quantum circuit 402 over a defined time interval. The quantum circuit 402 may be a machine that performs a set of calculations based on principle of quantum physics. The quantum circuit 402 may encode and/or process information using qubits. The quantum circuit 402 may be a hardware quantum processor (e.g., a hardware superconducting quantum processor) that can run encode and/or process information using qubits. The quantum circuit 402 may be a hardware quantum processor that executes a set of instruction threads associated with qubits. In another embodiment of the invention, the quantum circuit 402 may be a quantum simulator that can simulate execution of a sect of processing threads on a quantum circuit.

[0042] The system 400 provides various advantages as compared to conventional simulators for a quantum computer. For instance, accuracy and efficiency of classical simulation of a quantum computer is improved by the system 400. Furthermore, an amount of time to perform, processing performed, and storage utilized by a quantum simulation process is reduced by the system 400. Moreover, performance, efficiency, timing characteristics, power characteristics, and other characteristic of a quantum circuit and/or a classical processor associated with a quantum simulator and improved by the system 400.

[0043] FIG. 5 is a block diagram of a system 500 of the invention.

[0044] The system 500 includes the quantum simulator component 102, the quantum circuit 402 and a display device 502. The display device 502 may be, for example, a computing device with a display, a computer, a desktop computer, a laptop computer, a monitor device, a smart device, a smart phone, a mobile device, a handheld device, a tablet, a wearable device, a portable computing device or another type of device associated with a display. The display device 502 may include an application programming interface to facilitate display of information associated with a stochastic simulation process (e.g., a quantum circuit simulation process). The display device 502 may include an application programming interface to facilitate display of information related to a stochastic simulation process (e.g., a quantum circuit simulation process) associated with the quantum circuit 402. The display device 502 may be in communication with the quantum simulator component 102 via a network (e.g., a network device) such as a local area networks (LAN), a wide area network (WAN) such as the Internet, and/or a network that provides interconnections for devices associated with a workspace environment. The application programming interface may be a user interface to display, in a human interpretable format, information associated with a stochastic simulation process (e.g., a quantum circuit simulation process). [0045] The system 500 provides various advantages as compared to conventional simulators for a quantum computer. For instance, accuracy and efficiency of classical simulation of a quantum computer are improved by the system 500. Furthermore, an amount of time to perform, processing performed, and storage utilized by a quantum simulation process is reduced by the system 500. Moreover, performance, efficiency, power characteristics, and other characteristics of a quantum circuit and/or a classical processor associated with a quantum simulator are improved by employing the system 500.

[0046] FIG. 6 is a block diagram of a system 600 of the invention.

[0047] The system 600 is associated with a stochastic simulation process (e.g., a quantum circuit simulation process) that employs an entropy coding process. The system 600 is associated with an arithmetic decoder employed by the entropy coding component 302. The stochastic simulation process associated with the system 600 includes generating random real numbers by subdividing an interval, using the random real numbers to generate a decision tree which an arithmetic decoder can map to a specific path in a simulation of an evolution of a quantum system with stochastic operations. Samples during the stochastic simulation process represent points in the interval. Furthermore, a path through the decision tree is determined based on which interval the samples are located within. A stochastic aspect of the stochastic simulation process is due to measurements performed on a state of a quantum system (e.g., a quantum circuit) or stochastic error processes that are simulated to model physical error mechanisms that occur in a quantum system (e.g., a quantum circuit). Snapshotting may be employed during the stochastic simulation process to minimize number of times early paths in a decision tree are traversed to available memory and/or to minimize storage of a computing device (e.g., a processor, a classical processor, etc.) employed to implement the stochastic simulation process. The system 600 includes a step 602 for the stochastic simulation process, a step 604 for the stochastic simulation process, a step 606 for the stochastic simulation process, a step 608 for the stochastic simulation process, a step 610 for the stochastic simulation process, a step 612 for the stochastic simulation process, a step 614 for the stochastic simulation process, a step 616 for the stochastic simulation process, and a step 616 for the stochastic simulation process. At the step 602, a set S of M random numbers in an interval [0,1] is determined. At the step 604, a simulation state for a quantum circuit is initialized to a starting state. At the step 606, the interval is initialized to a current interval [0,1]. At the step 608, the simulation state for the quantum circuit is evolved. At the step 610, a number of samples given by a number of elements of the set s in the current interval is recorded. At the step 612, in response to a determination that the simulation state is evolved to a next stochastic decision point, the current interval is divided into subintervals of a size proportional to probabilities of one or more stochastic outcomes based on recursive division. At the step 614, a snapshot of the simulation state is generated and the sub-intervals which contain elements of the set S from the snapshot are initialized. At the step 616, it is determined whether the simulation state process is complete. If no, the stochastic simulation process returns to step 608. If yes, the stochastic simulation process ends. [0048] The step 612 may determine if the set S has elements that fall within only one sub-interval, or if the set S has elements within more than one of the sub-intervals. If the set S has elements that fall within only one subinterval: the current interval ia updated to the particular sub-interval with the elements and the stochastic simulation process returns to step 608 without generating a snapshot. However, if the set S has elements within more than one of the sub-intervals, the stochastic simulation process proceeds to step 614 After all sub-intervals have been sampled, snapshots for the stochastic simulation process can be deleted. Recursive division of the sub-intervals may be performed using a finite-precision binary representation of the interval based on an entropy coding algorithm (e.g., an arithmetic coding algorithm).

[0049] In an alternate embodiment of the invention, a stochastic simulation process may be performed without generating random numbers explicitly at a beginning of the stochastic simulation process. For instance, a set K is set equal to M and a simulation state may be initialized to a starting state. Furthermore, the simulation state may be evolved.

[0050] If the simulation state is evolved to an end of the simulation, an outcome for a number of samples given by the set K is recorded. If the simulation state is evolved to a stochastic decision point, a number of possible outcomes of the stochastic decision point and corresponding probabilities of the possible outcomes is determined. Depending on a type of decision point, the probabilities can be dependent or independent of a current state of the stochastic simulation process. The number of samples K may be randomly partitioned across outcomes in accordance with the probability of the outcomes. Additionally, it may be determined whether the samples are associated with one outcome or more than one outcome. If all samples are in one outcome, the simulation state may be further evolved without taking a snapshot. However, if samples are included in more than one outcome, a snapshot of the simulation state may be generated at the decision potion and for one or more outcomes with a nonzero number of samples, K may be set equal to a number of samples for that outcome, the simulation state from the snapshot may be initialized, and the simulation state may be further evolved. It can be determined at a branch point whether a first branch or a second branch should be utilized given a full set of random numbers. Therefore, optimal decisions regarding processing and/or a location for a checkpoint during a stochastic simulation process can be achieved. A checkpoint may be performed in response to a determination that a first branch and a second branch are utilized for processing. As such, zero duplicate computations may be achieved and a number of snapshots may be equal to a depth of a decision tree for the stochastic simulation process. In another example, a number of snapshots to generate may be optimally determined during the stochastic simulation process.

[0051] FIG. 7 is a block diagram of a system 700 of the invention.

[0052] The system 700 includes a stochastic simulation process 702. The stochastic simulation process 702 may be a quantum circuit simulation process associated with a quantum circuit. The stochastic simulation process 702 may be performed by the quantum simulator component 102. The stochastic simulation process 702 includes a random number generation process 704. The random number generation process 704 may be performed by the random number component 202. The random number generation process 704 generates a set of random numbers. The random number generation process 704 may be performed prior to an entropy coding process 706. The set of random numbers generated by the random number generation process 704 may be generated based on a required sample size for the entropy coding process 706. The entropy coding process 706 may be performed based on the set of random numbers generated by the random number generation process 704. The entropy coding process 706 may be an arithmetic coding process. The entropy coding process 706 may be performed by an arithmetic decoder 708. The arithmetic decoder 708 decodes the set of random numbers generated by the random number generation process 704 simultaneously. In another embodiment of the invention, the entropy coding process 706 may generate snapshot data 710. The snapshot data 710 may be indicative of information regarding a full state of the stochastic simulation process 702. The snapshot data 710 may be captured at a branch point associated with the entropy coding process 706. The snapshot data 710 may be employed by the entropy coding process 706 to reduce a number of calculations performed by the stochastic simulation process 702 and/or the entropy coding process 706.

[0053] FIG. 8 is a graph 800.

[0054] The graph 800 illustrates a decision tree process associated with a stochastic simulation process of the invention. A horizontal axis of the graph 800 depicts a set of paths of a decision tree. A vertical axis of the graph 900 depicts simulation step for the stochastic simulation process. As shown in the graph 800, an interval for processing may be divided into a decision tree based on branch points. Furthermore, random number samples may be employed to select branches. The decision tree process may include generating random real numbers by subdividing an interval, using the random real numbers to generate a decision tree which an arithmetic decoder may map to a specific path in a simulation of an evolution of a quantum system with stochastic operations.

Samples during the decision tree process represent points in the interval. Furthermore, a path through the decision tree may be determined based on which interval the samples are located within. A stochastic aspect of the stochastic simulation process associated with the decision tree process may be due to measurements performed on a state of a quantum system (e.g., a quantum circuit) or stochastic error processes simulated to model physical error mechanisms in a quantum system (e.g., a quantum circuit). Snapshotting may be employed during the decision tree process to minimize number of times early paths in a decision tree are traversed to available memory and/or storage employed to implement the decision tree process. As such, simulation (e.g., classical simulation) of a quantum circuit is improved compared to conventional simulation techniques

[0055] FIG. 9 is a flow diagram of a computer-implemented method 900 of the invention for improving a quantum simulator. At 902, a set of random numbers is determined, by a system operatively coupled to a processor (e.g., by simulation component 104). A pseudorandom number generator may be employed to generate the set of random numbers. The set of random numbers may be a set of random real numbers. A random number from the set may be a sequence of bit values that are randomly generated. In another embodiment of the invention, a random number from the set may correspond to a value between a first value (e.g., a value equal to“0”) and a second value (e.g., a value equal to“1”). The set may be initially generated with limited numerical precision. Additional precision for the set may be dynamically added during a stochastic simulation process.

[0056] At 904, a stochastic simulation process is performed, by the system (e.g., by simulation component 104), by simultaneously providing the set of random numbers to an arithmetic decoder. The stochastic simulation process may be, a simulation process that analyzes, monitors and/or simulates transformation of outcomes for the simulation process that can change randomly. The stochastic simulation process may be a quantum circuit simulation process for a quantum simulator. The quantum circuit simulation process may be a simulation process for a quantum circuit that employs qubits to encode information and/or perform one or more calculations.

Performing the stochastic simulation process may include performing a quantum circuit simulation process associated with a quantum circuit based on the set of random numbers.

[0057] At 906, snapshot data indicative of a state of the stochastic simulation process is generated, by the system (e.g., snapshot component 106), based on data associated with a stochastic branching point for the stochastic simulation process. The stochastic branching point may be a branch point during the stochastic simulation process. For example, the stochastic branching point may be a stochastic decision point during the stochastic simulation process. The snapshot data may be indicative of a state of the quantum circuit simulation process.

[0058] At 908, it is determined whether the stochastic simulation process is complete. If no, the method 900 returns to 906. The method 900 may return to 906 to generate additional snapshot data associated with the stochastic simulation process. If yes, the method 900 proceeds to 910.

[0059] At 910, stochastic simulation output data is generated by the system (e.g., by simulation component 104). For example, a set of samples of outcomes from the stochastic simulation process may be generated. A set of samples of outcomes from the quantum circuit simulation process (e.g., from a quantum simulator) may be generated.

[0060] The method 900 may include performing, by the system, one or more other portions of the stochastic simulation process based on the snapshot data indicative of the state of the stochastic simulation process. The method 900 may include avoiding, by the system, processing of other portions of the stochastic simulation process based on the snapshot data indicative of the state of the stochastic simulation process. The method 900 may include altering, by the system, a random number from the set of random numbers to provide improved numerical precision during the stochastic simulation process. The method 900 may include performing, by the system, a quantum circuit simulation process associated with a quantum circuit by simultaneously providing the set to an arithmetic decoder. Additionally or alternatively, the method 900 may include generating, by the system, snapshot data indicative of a state of the quantum circuit simulation process based on data associated with a stochastic branching point for the quantum circuit simulation process. The method 900 may include performing, by the system, other portions of the quantum circuit simulation process based on the snapshot data indicative of the state of the quantum circuit simulation process.

[0061] For simplicity of explanation, the computer-implemented methodologies are depicted and described as a series of acts. It is to be understood and appreciated that the subject innovation is not limited by the acts illustrated and/or by the order of acts, for example acts can occur in various orders and/or concurrently, and with other acts not presented and described herein. Furthermore, not all illustrated acts can be required to implement computer- implemented methodologies in accordance with the invention. In addition, those skilled in the art will understand and appreciate that such methodologies could alternatively be represented as a series of interrelated states via a state diagram or events. Additionally, it should be further appreciated that such methodologies are capable of being stored on an article of manufacture to facilitate transporting and transferring such methodologies to computers. The term article of manufacture, as used herein, is intended to encompass a computer program accessible from any computer-readable device or storage media.

[0062] Moreover, because at least performing a stochastic simulation process, generating snapshot data, generating stochastic simulation output data, etc. are established from a combination of electrical and mechanical components and circuitry, a human is unable to replicate or perform processing performed by the quantum simulator component 102 (e.g., the simulation component 104, the snapshot component 106, the random number component 202 and/or the entropy coding component 302) disclosed herein. For example, a human is unable to perform a stochastic simulation process, generate snapshot data, generate stochastic simulation output data, etc.

[0063] In order to provide a context for the various aspects of the invention, FIG. 10 as well as the following discussion are intended to provide a general description of a suitable environment in which the invention can be implemented. FIG. 10 is a block diagram of an operating environment in which embodiments of the invention described herein can be facilitated.

[0064] With reference to FIG. 10, a suitable operating environment 1000 for implementing embodiments of the invention includes a computer 1012. The computer 1012 includes a processing unit 1014, a system memory 1016, and a system bus 1018. The system bus 1018 couples system components including, but not limited to, the system memory 1016 to the processing unit 1014. The processing unit 1014 may be any of various available processors. Dual microprocessors and other multiprocessor architectures also may be employed as the processing unit 1014. The system bus 1018 may be any of several types of bus structure(s) including the memory bus or memory controller, a peripheral bus or external bus, and/or a local bus using any variety of available bus architectures including, but not limited to, Industrial Standard Architecture (ISA), Micro-Channel Architecture (MSA), Extended ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Card Bus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), Firewire (IEEE 1394), and Small Computer Systems Interface (SCSI).

[0065] The system memory 1016 includes volatile memory 1020 and nonvolatile memory 1022. The basic input/output system (BIOS), containing the basic routines to transfer information between elements within the computer 1012, such as during start-up, is stored in nonvolatile memory 1022. Computer 1012 can also include removable/non-removable, volatile/non-volatile computer storage media. FIG. 10 illustrates, for example, a disk storage 1024. Disk storage 1024 may also include, but is not limited to, devices like a magnetic disk drive, floppy disk drive, tape drive, Jaz drive, Zip drive, LS-100 drive, flash memory card, or memory stick. The disk storage 1024 also may include storage media separately or in combination with other storage media. To facilitate connection of the disk storage 1024 to the system bus 1018, a removable or non-removable interface is typically used, such as interface 1026. FIG. 10 also depicts software that acts as an intermediary between users and the basic computer resources described in the suitable operating environment 1000. Such software may also include, for example, an operating system 1028. Operating system 1028, which may be stored on disk storage 1024, acts to control and allocate resources of the computer 1012.

[0066] System applications 1030 take advantage of the management of resources by operating system 1028 through program modules 1032 and program data 1034, e.g., stored either in system memory 1016 or on disk storage 1024. It is to be appreciated that the invention can be implemented with various operating systems or combinations of operating systems. A user enters commands or information into the computer 1012 through input device(s) 1036. Input devices 1036 include, but are not limited to, a pointing device such as a mouse, trackball, stylus, touch pad, keyboard, microphone, joystick, game pad, satellite dish, scanner, TV tuner card, digital camera, digital video camera, web camera, and the like. These and other input devices connect to the processing unit 1014 through the system bus 1018 via interface port(s) 1038. Interface port(s) 1038 include, for example, a serial port, a parallel port, a game port, and a universal serial bus (USB). Output device(s) 1040 use some of the same type of ports as input device(s) 1036. Thus, for example, a USB port can be used to provide input to computer 1012, and to output information from computer 1012 to an output device 1040. Output adapter 1042 is provided to illustrate that there are some output devices 1040 like monitors, speakers, and printers, among other output devices 1040, which require special adapters. The output adapters 1042 include, by way of illustration and not limitation, video and sound cards that provide a means of connection between the output device 1040 and the system bus 1018. It should be noted that other devices and/or systems of devices provide both input and output capabilities such as remote computer(s) 1044.

[0067] Computer 1012 can operate in a networked environment using logical connections to one or more remote computers, such as remote computer(s) 1044. The remote computer(s) 1044 can be a computer, a server, a router, a network PC, a workstation, a microprocessor based appliance, a peer device or other common network node and the like, and typically can also include many or all of the elements described relative to computer 1012. For purposes of brevity, only a memory storage device 1046 is illustrated with remote computer(s) 1044. Remote computer(s) 1044 is logically connected to computer 1012 through a network interface 1048 and then physically connected via communication connection 1050. Network interface 1048 encompasses wire and/or wireless communication networks such as local-area networks (LAN), wide-area networks (WAN), cellular networks, etc.

LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Distributed Data Interface (CDDI), Ethernet, Token Ring and the like. WAN technologies include, but are not limited to, point-to-point links, circuit switching networks like Integrated Services Digital Networks (ISDN) and variations thereon, packet switching networks, and Digital Subscriber Lines (DSL). Communication connection(s) 1050 refers to the hardware/software employed to connect the network interface 1048 to the system bus 1018. While communication connection 1050 is shown for illustrative clarity inside computer 1012, it can also be external to computer 1012. The hardware/software for connection to the network interface 1048 can also include, for exemplary purposes only, internal and external technologies such as, modems including regular telephone grade modems, cable modems and DSL modems,

ISDN adapters, and Ethernet cards.

[0068] The present invention may be implemented as a system, a method, an apparatus and/or a computer program product at any possible technical detail level of integration. The computer program product can include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present invention. The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium can be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer readable storage medium can also include the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing. A computer readable storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire.

[0069] Computer readable program instructions described herein can be downloaded to respective

computing/processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and/or a wireless network. The network can comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. A network adapter card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing/processing device. Computer readable program instructions for carrying out operations of the present invention can be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuitry, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++, or the like, and procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) can execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present invention.

[0070] Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer readable program instructions. These computer readable program instructions can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions can also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable storage medium having instructions stored therein comprises an article of manufacture including instructions which implement aspects of the function/act specified in the flowchart and/or block diagram block or blocks. The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational acts to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process, such that the instructions which execute on the computer, other programmable apparatus, or other device implement the functions/acts specified in the flowchart and/or block diagram block or blocks. [0071] The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams can represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the blocks can occur out of the order noted in the Figures. For example, two blocks shown in succession can, in fact, be executed substantially concurrently, or the blocks can sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.

[0072] While the invention has been described above in the general context of computer-executable instructions of a computer program product that runs on a computer and/or computers, those skilled in the art will recognize that the invention can be implemented in combination with other program modules. Generally, program modules include routines, programs, components, data structures, etc. that perform particular tasks and/or implement particular abstract data types. Moreover, those skilled in the art will appreciate that the inventive computer- implemented methods can be practiced with other computer system configurations, including single-processor or multiprocessor computer systems, mini-computing devices, mainframe computers, as well as computers, hand-held computing devices (e.g., PDA, phone), microprocessor-based or programmable consumer or industrial electronics, and the like. The illustrated aspects can also be practiced in distributed computing environments in which tasks are performed by remote processing devices that are linked through a communications network. Flowever, some, if not all aspects of the invention can be practiced on stand-alone computers. In a distributed computing environment, program modules can be located in both local and remote memory storage devices.

[0073] As used in this application, the terms“component,”“system,”“platform,”“interfac e,” and the like, can refer to and/or can include a computer-related entity or an entity related to an operational machine with one or more specific functionalities. The entities disclosed herein can be either hardware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to being, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a server and the server can be a component. One or more components can reside within a process and/or thread of execution and a component can be localized on one computer and/or distributed between two or more computers. In another example, respective components can execute from various computer readable media having various data structures stored thereon. The components can communicate via local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network such as the Internet with other systems via the signal). As another example, a component can be an apparatus with specific functionality provided by mechanical parts operated by electric or electronic circuitry, which is operated by a software or firmware application executed by a processor. In such a case, the processor can be internal or external to the apparatus and can execute at least a part of the software or firmware application. As yet another example, a component can be an apparatus that provides specific functionality through electronic components without mechanical parts, wherein the electronic components can include a processor or other means to execute software or firmware that confers at least in part the functionality of the electronic components. In an aspect, a component can emulate an electronic component via a virtual machine, e.g., within a cloud computing system.

[0074] In addition, the term“or” is intended to mean an inclusive“or” rather than an exclusive“or.” That is, unless specified otherwise, or clear from context,“X employs A or B” is intended to mean any of the natural inclusive permutations. That is, if X employs A; X employs B; or X employs both A and B, then“X employs A or B” is satisfied under any of the foregoing instances. Moreover, articles“a” and“an” as used in the subject specification and annexed drawings should generally be construed to mean“one or more” unless specified otherwise or clear from context to be directed to a singular form. As used herein, the terms“example” and/or“exemplary” are utilized to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. In addition, any aspect or design described herein as an“example” and/or “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs, nor is it meant to preclude equivalent exemplary structures and techniques known to those of ordinary skill in the art.

[0075] As it is employed in the subject specification, the term“processor” can refer to substantially any computing processing unit or device comprising, but not limited to, single-core processors; single-processors with software multithread execution capability; multi-core processors; multi-core processors with software multithread execution capability; multi-core processors with hardware multithread technology; parallel platforms; and parallel platforms with distributed shared memory. Additionally, a processor can refer to an integrated circuit, an application specific integrated circuit (ASIC), a digital signal processor (DSP), a field programmable gate array (FPGA), a

programmable logic controller (PLC), a complex programmable logic device (CPLD), a discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. Further, processors can exploit nano-scale architectures such as, but not limited to, molecular and quantum-dot based transistors, switches and gates, in order to optimize space usage or enhance performance of user equipment. A processor can also be implemented as a combination of computing processing units. In this disclosure, terms such as“store,”“storage,”“data store,” data storage,”“database,” and substantially any other information storage component relevant to operation and functionality of a component are utilized to refer to “memory components,” entities embodied in a“memory,” or components comprising a memory. It is to be appreciated that memory and/or memory components described herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of illustration, and not limitation, nonvolatile memory can include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or nonvolatile random access memory (RAM)

(e.g., ferroelectric RAM (FeRAM). Volatile memory can include RAM, which can act as external cache memory, for example. By way of illustration and not limitation, RAM is available in many forms such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM). Additionally, the disclosed memory components of systems or computer-implemented methods herein are intended to include, without being limited to including, these and any other suitable types of memory.

[0076] What has been described above include mere examples of systems and computer-implemented methods. It is, of course, not possible to describe every conceivable combination of components or computer-implemented methods for purposes of describing the invention, but one of ordinary skill in the art can recognize that many further combinations and permutations of the invention are possible. Furthermore, to the extent that the terms“includes,” “has,”“possesses,” and the like are used in the detailed description, claims, appendices and drawings such terms are intended to be inclusive in a manner similar to the term“comprising” as“comprising” is interpreted when employed as a transitional word in a claim.

[0077] The descriptions of the various embodiments have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments of the invention disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope of the invention. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments of the invention disclosed herein.




 
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