Title:
GENERATION OF QUADRATURE DIFFERENTIAL CLOCK SIGNALS WITH TWENTY-FIVE PERCENT DUTY CYCLE
Document Type and Number:
WIPO Patent Application WO/2014/062983
Kind Code:
A3
Abstract:
Exemplary embodiments are directed to systems, methods, and devices for generating quadrature clock signals. A device may include a plurality of dynamic logic cells and a plurality of inverters. Each inverter of the plurality of inverters may be coupled to at least two dynamic logic cells of the plurality of dynamic logic cells. Each inverter may be configured to output a twenty-five percent duty cycle clock signal.
Inventors:
GOLDBLATT JEREMY MARK (US)
VORA SAMEER V (US)
VORA SAMEER V (US)
Application Number:
PCT/US2013/065544
Publication Date:
June 19, 2014
Filing Date:
October 17, 2013
Export Citation:
Assignee:
QUALCOMM INC (US)
International Classes:
H03K3/356; H03K23/44
Foreign References:
| CN102118158A | 2011-07-06 | |||
| US20120046004A1 | 2012-02-23 | |||
| US6859109B1 | 2005-02-22 | |||
| US20120098592A1 | 2012-04-26 | |||
| US20080111639A1 | 2008-05-15 | |||
| KR20110039019A | 2011-04-15 | |||
| EP1801969A1 | 2007-06-27 | |||
| US20070013418A1 | 2007-01-18 | |||
| CN101867346A | 2010-10-20 | |||
| US7904036B2 | 2011-03-08 | |||
| US3852663A | 1974-12-03 |
Other References:
GHIAASI G ET AL: "A CMOS broadband divide-by-32/33 dual modulus prescaler for high speed wireless applications", CIRCUITS AND SYSTEMS, 2005. 48TH MIDWEST SYMPOSIUM ON CINICINNATI, OHIO AUGUST 7-10, 2005, PISCATAWAY, US, 7 August 2005 (2005-08-07), pages 183 - 186, XP010893557, ISBN: 978-0-7803-9197-0, DOI: 10.1109/MWSCAS.2005.1594069
Attorney, Agent or Firm:
HOOKS, William M. (5775 Morehouse DriveSan Diego, Califonia, US)
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