FORMING SAME

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to and benefits of Chinese Patent Application Serial No.

201210123673.7, filed with the State Intellectual Property Office of P. R. China on April 24, 2012, the entire contents of which are incorporated herein by reference.

FIELD

The present disclosure relates to current and voltage transformation field, and more particularly to a group III-V semiconductor DC transformer and a method for forming the same.

BACKGROUND

With a development of an electronic technology, an application range of a DC (direct current) electricity has gradually been broadened, such as various electronic devices, a LED device, an electric vehicle, a solar cell or a fuel cell. In this case, a DC voltage transformation, especially a DC boosting, has become a focus. Conventionally, only an AC (alternating current) voltage transformation can be simply realized by electromagnetic coupling. Currently, One of DC voltage transformation solutions is "conversion from DC to AC, AC voltage transformation, and then conversion from AC to DC". Another solution to realize the DC voltage transformation is a use of a large amount of power electronic devices and electronic components such as large inductors and large capacitors to coordinately control a circuit. Both solutions have disadvantages of complicated structure, low convention efficiency, numerous elements, large volume, heavy weight and high cost.

Therefore, a development of a DC transformer, especially a DC booster with simple structure, small volume, light weight and reliable performance is one of key problems that urgently need to be solved.

SUMMARY

The present disclosure is aimed to solve at least one of the problems existing in the prior art to at least some extent. According to a first aspect of the present disclosure, a group III-V semiconductor DC transformer is provided. The group III-V semiconductor DC transformer comprises: an isolation layer with a material of transparent insulating dielectric; a plurality of group III-V semiconductor light emitting diodes formed on one surface of the isolation layer for emitting a working light with specified wavelength to convert an electric energy into an optical energy, at least two group III-V semiconductor light emitting diodes connected in series; a plurality of group III-V semiconductor photovoltaic cells formed on one surface of the isolation layer for absorbing the working light to convert the optical energy into the electric energy, at least two group III-V semiconductor photovoltaic cells connected in series, in which a working light spectrum of each group III-V semiconductor light emitting diode is matched with that of each group III-V semiconductor photovoltaic cell, and the isolation layer is transparent to the working light. A number of the at least two group III-V semiconductor light emitting diodes connected in series is proportional to that of the at least two group III-V semiconductor photovoltaic cells connected in series to realize a DC voltage transformation.

The group III-V semiconductor DC transformer according to embodiments of the present disclosure has advantages of simple structure, high convention efficiency, high voltage withstand, non-electromagnetic radiation, non-coil structure, safety and reliability, small volume, long lifetime, light weight, convenient installation and maintenance, etc.

In one embodiment, each group III-V semiconductor light emitting diode comprises: a group III-V semiconductor active layer; a first P-type contact layer formed on a surface of the group III-V semiconductor active layer away from the isolation layer; a first N-type contact layer formed on a surface of the group III-V semiconductor active layer close to the isolation layer; a first electrode layer formed on the first P-type contact layer; and a second electrode layer formed on the first N-type contact layer.

In one embodiment, each group III-V semiconductor photovoltaic cell comprises: a group

III-V semiconductor light absorbing layer; a second P-type contact layer formed on a surface of the group III-V semiconductor light absorbing layer away from the isolation layer; a second N-type contact layer formed on a surface of the group III-V semiconductor light absorbing layer close to the isolation layer; a third electrode layer formed on the second P-type contact layer; and a fourth electrode layer formed on the second N-type contact layer.

In one embodiment, refractive indices of materials of each group III-V semiconductor active layer, each first N-type contact layer, the isolation layer, each second N-type contact layer and each group III-V semiconductor light absorbing layer are matched with each other.

In one embodiment, the plurality of group III-V semiconductor light emitting diodes are formed on one surface of the isolation layer, the plurality of group III-V semiconductor photovoltaic cells are formed on the other surface of the isolation layer, and the working light is transmitted through the isolation layer by transmission.

In one embodiment, the plurality of group III-V semiconductor light emitting diodes and the plurality of group III-V semiconductor photovoltaic cells are alternately arranged on a same surface of the isolation layer, the working light is transmitted by reflection, the isolation layer has a reflecting structure for reflecting a light emitted by each group III-V semiconductor light emitting diode into one or more of the plurality of group III-V semiconductor photovoltaic cells.

In one embodiment, the group III-V semiconductor DC transformer further comprises a light trap for trapping the working light inside the group III-V semiconductor DC transformer.

In one embodiment, the light trap comprises: a first reflecting layer formed on a surface of the group III-V semiconductor active layer away from the isolation layer; and a second reflecting layer formed on a surface of the group III-V semiconductor light absorbing layer away from the isolation layer.

In one embodiment, the light trap comprises: a first reflecting layer formed between the first P-type contact layer and the first electrode layer; and a second reflecting layer formed between the second P-type contact layer and the third electrode layer.

In one embodiment, a transparent insulating dielectric is filled between the plurality of group III-V semiconductor light emitting diodes and between the plurality of group III-V semiconductor photovoltaic cells, or between each group III-V semiconductor light emitting diode and each group III-V semiconductor photovoltaic cell, and a top surface of the transparent insulating dielectric is covered by a reflecting material.

In one embodiment, a reflecting insulating dielectric is filled between the plurality of group III-V semiconductor light emitting diodes and between the plurality of group III-V semiconductor photovoltaic cells, or between each group III-V semiconductor light emitting diode and each group III-V semiconductor photovoltaic cell.

In one embodiment, the working light is a blue-to-violet light; the group III-V semiconductor active layer has a multi quantum well structure with a material of GaN, InGaN or AlGalnN; a material of the group III-V semiconductor light absorbing layer is GaN, InGaN or AlGalnN; and a material of the isolation layer is any one of SrTi0 ₃ , ZnO, Ti0 ₂ , Si ₃ N ₄ , SiC, diamond, GaN, Zr0 ₂ , A1N, MgF ₂ , CaF ₂ , CeF ₂ , LiF ₂ , PbF ₂ , Ga ₂ 0 ₃ , BN, Gd ₂ 0 ₃ , KTai_ _x Nb _x 0 ₃ , KTa0 ₃ , LiGa0 ₂ , LiNb0 ₃ , LiTa0 ₃ , MgA10 ₂ , MgO, PbW0 ₄ , Sr _x Bai_ _x Nb ₂ 0 ₆ , YV0 ₄ , Ga ₂ 0 ₃ , and a combination thereof.

In one embodiment, the working light is a red-to-yellow light; the group III-V semiconductor active layer has a multi quantum well structure with a material of AlGalnP; a material of the group III-V semiconductor light absorbing layer is AlGalnP; and a material of the isolation layer is any one of insulating or semi-insulating GaP, A1P, AlAs, ZnS, ZnSe, ZnTe, InP, Ti0 ₂ , Zr0 ₂ , Si0 ₂ , and a combination thereof.

In one embodiment, the working light is an infrared light; the group III-V semiconductor active layer has a multi quantum well structure with a material of AlGaAs, AlGalnAs, GaAs or InGaAs; a material of the group III-V semiconductor light absorbing layer is AlGaAs, AlGalnAs, GaAs or InGaAs; and a material of the isolation layer is any one of insulating or semi-insulating Si0 ₂ , Zr0 ₂ , Ti0 ₂ , InAs, Si, GaAs, AlAs, AlGaAs, InP, A1P, GaP, and a combination thereof.

According to a second aspect of the present disclosure, a method for forming a group III-V semiconductor DC transformer is provided. The method comprises steps of: providing a first substrate, and forming a group III-V semiconductor electricity-to-light conversion structure layer on the first substrate by epitaxial growth; providing a second substrate, and forming a group III-V semiconductor light-to-electricity conversion structure layer on the second substrate by epitaxial growth; providing an isolation layer; transferring the group III-V semiconductor electricity-to-light conversion structure layer from the first substrate to one surface of the isolation layer, and transferring the group III-V semiconductor light-to-electricity conversion structure layer from the second substrate to the other surface of the isolation layer; dividing the group III-V semiconductor electricity-to-light conversion structure layer by etching and depositing a first electrode to form a plurality of group III-V semiconductor light emitting diodes, and connecting the plurality of group III-V semiconductor light emitting diodes in series and/or in parallel; and dividing the group III-V semiconductor light-to-electricity conversion structure layer by etching and depositing a second electrode to form a plurality of group III-V semiconductor photovoltaic cells, and connecting the plurality of group III-V semiconductor photovoltaic cells in series and/or in parallel, in which a working light spectrum of each group III-V semiconductor light emitting diode is matched with that of each group III-V semiconductor photovoltaic cell, and the isolation layer is transparent to the working light.

The group III-V semiconductor DC transformer formed by the above method has a double-surface structure. The method according to embodiments of the present disclosure is a simple and mature process which is applicable for a large scale production.

According to a third aspect of the present disclosure, a method for forming a group III-V semiconductor DC transformer is provided. The method comprises steps of: providing a substrate, in which the substrate is transparent to a working light of the group III-V semiconductor DC transformer; forming a group III-V semiconductor electricity-to-light conversion structure layer on a first surface of the substrate by epitaxial growth; forming a group III-V semiconductor light-to-electricity conversion structure layer on a second surface of the substrate by epitaxial growth; dividing the group III-V semiconductor electricity-to-light conversion structure layer by etching and depositing a first electrode to form a plurality of group III-V semiconductor light emitting diodes, and connecting the plurality of group III-V semiconductor light emitting diodes in series and/or in parallel; and dividing the group III-V semiconductor light-to-electricity conversion structure layer by etching and depositing a second electrode to form a plurality of group III-V semiconductor photovoltaic cells, and connecting the plurality of group III-V semiconductor photovoltaic cells in series and/or in parallel, in which a working light spectrum of each group III-V semiconductor light emitting diode is matched with that of each group III-V semiconductor photovoltaic cell.

The group III-V semiconductor DC transformer formed by the above method also has a double- surface structure. With the method according to embodiments of the present disclosure, the substrate is used as an isolation layer, and the electricity-to-light conversion structure layer and the light-to-electricity conversion structure layer of a device are directly formed on both surfaces of the isolation layer by epitaxial growth respectively, so that an additional substrate is not required.

According to a fourth aspect of the present disclosure, a method for forming a group III-V semiconductor DC transformer is provided. The method comprises steps of: providing a substrate; forming a group III-V semiconductor electricity-to-light conversion structure layer on the substrate by epitaxial growth; dividing the group III-V semiconductor electricity-to-light conversion structure layer by etching and depositing a first electrode to form a plurality of group III-V semiconductor light emitting diodes, and connecting the plurality of group III-V semiconductor light emitting diodes in series and/or in parallel; forming an isolation layer on the plurality of group III-V semiconductor light emitting diodes by epitaxial growth; forming a group III-V semiconductor light-to-electricity conversion structure layer on the isolation layer by epitaxial growth; and dividing the group III-V semiconductor light-to-electricity conversion structure layer by etching and depositing a second electrode to form a plurality of group III-V semiconductor photovoltaic cells, and connecting the plurality of group III-V semiconductor photovoltaic cells in series and/or in parallel, in which a working light spectrum of each group III-V semiconductor light emitting diode is matched with that of each group III-V semiconductor photovoltaic cell, and the isolation layer is transparent to the working light.

The group III-V semiconductor DC transformer formed by the above method also has a double- surface structure. With the method according to embodiments of the present disclosure, the electricity-to-light conversion structure layer and the light-to-electricity conversion structure layer of a device are directly formed on the substrate by epitaxial growth sequentially without a film transferring process.

According to a fifth aspect of the present disclosure, a method for forming a group III-V semiconductor DC transformer is provided. The method comprises steps of: providing a first substrate, and forming a group III-V semiconductor electricity-to-light conversion structure layer on the first substrate by epitaxial growth; forming an isolation layer on the group III-V semiconductor electricity-to-light conversion structure layer by epitaxial growth; providing a second substrate, and forming a group III-V semiconductor light-to-electricity conversion structure layer on the second substrate by epitaxial growth; transferring the group III-V semiconductor light-to-electricity conversion structure layer from the second substrate onto the isolation layer; dividing the group III-V semiconductor electricity-to-light conversion structure layer by etching and depositing a first electrode to form a plurality of group III-V semiconductor light emitting diodes, and connecting the plurality of group III-V semiconductor light emitting diodes in series and/or in parallel; and dividing the group III-V semiconductor light-to-electricity conversion structure layer by etching and depositing a second electrode to form a plurality of group III-V semiconductor photovoltaic cells, and connecting the plurality of group III-V semiconductor photovoltaic cells in series and/or in parallel, in which a working light spectrum of each group III-V semiconductor light emitting diode is matched with that of each group III-V semiconductor photovoltaic cell, and the isolation layer is transparent to the working light.

The group III-V semiconductor DC transformer formed by the above method also has a double-surface structure. The method according to embodiments of the present disclosure is applicable for a thinner isolation layer with an amorphous material which is not favorable for a further epitaxial growth.

According to a sixth aspect of the present disclosure, a method for forming a group III-V semiconductor DC transformer is provided. The method comprises steps of: providing a substrate, in which the substrate is transparent to a working light of the group III-V semiconductor DC transformer and has a reflecting structure; forming a plurality of group III-V semiconductor light emitting diodes on the substrate; forming a plurality of group III-V semiconductor photovoltaic cells on the substrate, in which the plurality of group III-V semiconductor light emitting diodes and the plurality of group III-V semiconductor photovoltaic cells are arranged alternately, and the reflecting structure is used for reflecting a light emitted by each group III-V semiconductor light emitting diode into one or more of the plurality of group III-V semiconductor photovoltaic cells; and connecting the plurality of group III-V semiconductor light emitting diodes in series and/or in parallel, and connecting the plurality of group III-V semiconductor photovoltaic cells in series and/or in parallel, in which a working light spectrum of each group III-V semiconductor light emitting diode is matched with that of each group III-V semiconductor photovoltaic cell. The group III-V semiconductor DC transformer formed by the above method has a single-surface structure.

Additional aspects and advantages of the embodiments of the present disclosure will be given in part in the following descriptions, become apparent in part from the following descriptions, or be learned from the practice of the embodiments of the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

These and other aspects and advantages of the disclosure will become apparent and more readily appreciated from the following descriptions taken in conjunction with the drawings in which: Fig. 1 is a schematic working principle diagram of a group III-V semiconductor DC transformer according to the present disclosure;

Fig. 2 is a schematic cross-sectional view of a group III-V semiconductor DC transformer with a double- surface structure according to an embodiment of the present disclosure;

Fig. 3 is a schematic cross-sectional view of a group III-V semiconductor DC transformer with a single-surface structure according to an embodiment of the present disclosure;

Fig. 4 is a flow chart of a method for forming a group III-V semiconductor DC transformer according to an embodiment of the present disclosure;

Fig. 5 is a flow chart of a method for forming a group III-V semiconductor DC transformer according to an embodiment of the present disclosure;

Fig. 6 is a flow chart of a method for forming a group III-V semiconductor DC transformer according to an embodiment of the present disclosure;

Fig. 7 is a flow chart of a method for forming a group III-V semiconductor DC transformer according to an embodiment of the present disclosure; and

Fig. 8 is a flow chart of a method for forming a group III-V semiconductor DC transformer according to an embodiment of the present disclosure.

DETAILED DESCRIPTION

Embodiments of the present disclosure will be described in detail in the following descriptions, examples of which are shown in the accompanying drawings, in which the same or similar elements and elements having same or similar functions are denoted by like reference numerals throughout the descriptions. The embodiments described herein with reference to the accompanying drawings are explanatory and illustrative, which are used to generally understand the present disclosure. The embodiments shall not be construed to limit the present disclosure.

In addition, terms such as "first" and "second" are used herein for purposes of description and are not intended to indicate or imply relative importance or significance or imply a number of technical features indicated. Therefore, a "first" or "second" feature may explicitly or implicitly comprise one or more features. Further, in the description, unless indicated otherwise, "a plurality of refers to two or more. Terms concerning attachments, coupling and the like, such as "connected" and "interconnected", refer to a relationship in which structures are secured or attached to one another either directly or indirectly through intervening structures, as well as both movable or rigid attachments or relationships, unless expressly described otherwise.

According to embodiments of the present disclosure, a group III-V semiconductor DC transformer and a method for forming the same are provided.

A working principle of the group III-V semiconductor DC transformer may be shown in Fig.

1. As shown in Fig. 1, a plurality of group III-V semiconductor light emitting diodes are connected in series at an input end of the group III-V semiconductor DC transformer, and a plurality of group III-V semiconductor photovoltaic cells are connected in series at an output end of the group III-V semiconductor DC transformer. A DC voltage Vi is input to each group III-V semiconductor light emitting diode so as to inject carriers in each group III-V semiconductor light emitting diode for recombination to generate photons. The photons are transmitted to each group III-V semiconductor photovoltaic cell so as to excite each group III-V semiconductor photovoltaic cell to generate non-equilibrium carriers, which will be separated by an internal electric field in the each group III-V semiconductor photovoltaic cell, and consequently a DC voltage V ₂ is output from each group III-V semiconductor photovoltaic cell, thus realizing an energy transmission via light. It should be noted that a working light spectrum of the group III-V semiconductor light emitting diodes should be matched with that of the group III-V semiconductor photovoltaic cells so as to ensure a high convention efficiency and a low energy loss. During an energy transmission process, in one aspect, Vi and V ₂ are dependent on material characteristic parameters, such as a material type, a strain characteristic, a bandgap or a doping concentration, of the group III-V semiconductor light emitting diodes and the group III-V semiconductor photovoltaic cells respectively so as to realize an optimization of the energy convention efficiency by adjusting a corresponding characteristic parameter; in another aspect, by disposing different numbers of group III-V semiconductor light emitting diodes and group III-V semiconductor photovoltaic cells connected in series at the input end and the output end respectively, a DC transformation may be realized by a number ratio of the group III-V semiconductor light emitting diodes to the group III-V semiconductor photovoltaic cells. For example, assuming that the number of the group III-V semiconductor light emitting diodes is m, and the number of the group III-V semiconductor photovoltaic cells is n, total output voltage/total input voltage=(n*V ₂ )/(m*Vi).

It should be noted that the group III-V semiconductor light emitting diodes at the input end of the group III-V semiconductor DC transformer and the group III-V semiconductor photovoltaic cells at the output end of the group III-V semiconductor DC transformer may be connected in series and/or in parallel according to practical requirements.

The group III-V semiconductor DC transformer and methods for forming the same will be described below in details in conjunction with the drawings.

Fig. 2 is a schematic cross-sectional view of a group III-V semiconductor DC transformer with a double- surface structure according to an embodiment of the present disclosure. As shown in Fig. 2, the group III-V semiconductor DC transformer comprises: a plurality of group III-V semiconductor light emitting diodes 1, a plurality of group III-V semiconductor photovoltaic cells 2, and an isolation layer 3.

The plurality of group III-V semiconductor light emitting diodes 1 are formed on one surface of the isolation layer 3 for emitting a working light with specified wavelength to convert an electric energy into an optical energy. At least two group III-V semiconductor light emitting diodes 1 are connected in series. Specifically, each group III-V semiconductor light emitting diode 1 comprises: a group III-V semiconductor active layer 101 ; a first P-type contact layer 102 formed on a surface of the group III-V semiconductor active layer 101 away from the isolation layer 3; a first N-type contact layer 103 formed on a surface of the group III-V semiconductor active layer 101 close to the isolation layer 3; a first electrode layer 104 formed on the first P-type contact layer 102; and a second electrode layer 105 formed on the first N-type contact layer 103. It should be noted that only a basic structure of the group III-V semiconductor light emitting diode 1 is shown herein, and those skilled in the art may design more details thereof according to practical requirements. For example, a P-type restriction layer and/or an N-type contact layer may be added in the group III-V semiconductor light emitting diode 1, or the group III-V semiconductor light emitting diode 1 may have a multi quantum well structure.

The plurality of group III-V semiconductor photovoltaic cells 2 are formed on one surface of the isolation layer 3 for absorbing the working light to convert the optical energy into the electric energy. At least two group III-V semiconductor photovoltaic cells 2 are connected in series. Specifically, each group III-V semiconductor photovoltaic cell 2 comprises: a group III-V semiconductor light absorbing layer 201 ; a second P-type contact layer 202 formed on a surface of the group III-V semiconductor light absorbing layer 201 away from the isolation layer 3; a second N-type contact layer 203 formed on a surface of the group III-V semiconductor light absorbing layer 201 close to the isolation layer 3; a third electrode layer 204 formed on the second P-type contact layer 202; and a fourth electrode layer 205 formed on the second N-type contact layer 203. It should be noted that only a basic structure of the group III-V semiconductor photovoltaic cell 2 is shown herein, and those skilled in the art may design more details thereof according to practical requirements. For example, the group III-V semiconductor light absorbing layer 201 may have an active absorbing layer, a PN structure, a PIN structure, a multi quantum well structure, etc.

A working light spectrum of each group III-V semiconductor light emitting diode 1 is matched with that of each group III-V semiconductor photovoltaic cell 2. It should be noted that, the spectrum matching between the emitting spectrum of the group III-V semiconductor light emitting diode 1 and the absorption spectrum of the group III-V semiconductor photovoltaic cell 2 means that a characteristic of a light emitted by the group III-V semiconductor light emitting diode 1 is matched with that of a light with an optimized light-to-electricity conversion efficiency of the group III-V semiconductor photovoltaic cell 2 so as to increase the energy conversion efficiency of the semiconductor electricity converter and reduce an energy loss of photons in a conversion process. Specifically, the light emitted by the group III-V semiconductor light emitting diode 1 may be a monochromatic light whose frequency is corresponding to a maximum absorption frequency of the group III-V semiconductor photovoltaic cell 2, and also may be a light with another specific frequency which may enable the photovoltaic effect with a quantum efficiency in the group III-V semiconductor photovoltaic cell 2 to be larger than 100%. One optimized case is that the photon energy of the light emitted by the group III-V semiconductor light emitting diode 1 should be just absorbed by the group III-V semiconductor photovoltaic cell 2, but should not be over large to cause an excess thermalization loss. One possible ideal case is that a bandgap energy of an active material of the group III-V semiconductor light emitting diode 1 is substantially equal to that of the group III-V semiconductor photovoltaic cell 2 so as to not only ensure the light absorption, but also not to cause the excess thermalization loss. It should be noted that, in this embodiment, the monochromatic light has certain spectrum width (for instance, the red light LED has a spectrum width of about 20nm) rather than is limited to some specific frequency point.

A number of the at least two group III-V semiconductor light emitting diodes 1 connected in series is proportional to that of the at least two group III-V semiconductor photovoltaic cells 2 connected in series to realize a DC voltage transformation. The isolation layer 3 is made of a transparent insulating dielectric material which is transparent to the working light.

The group III-V semiconductor DC transformer according to embodiments of the present disclosure has advantages of simple structure, high convention efficiency, high voltage withstand, non-electromagnetic radiation, non-coil structure, safety and reliability, small volume, long lifetime, light weight, convenient installation and maintenance, etc.

Fig. 3 is a schematic cross-sectional view of a group III-V semiconductor DC transformer with a single-surface structure according to an embodiment of the present disclosure. It should be noted that, there is no difference in effects achieved by the group III-V semiconductor DC transformer with a single- surface structure and the group III-V semiconductor DC transformer with a double- surface structure, and thus the group III-V semiconductor DC transformer with a single- surface structure and the group III-V semiconductor DC transformer with a double- surface structure may be selected according to a practical installment environment.

As shown in Fig. 3, the group III-V semiconductor DC transformer comprises: a plurality of group III-V semiconductor light emitting diodes 1, a plurality of group III-V semiconductor photovoltaic cells 2, and an isolation layer 3. The plurality of group III-V semiconductor light emitting diodes 2 and the plurality of group III-V semiconductor photovoltaic cells 3 are alternately arranged on a same surface of the isolation layer 3. The isolation layer 3 has a reflecting structure 301 for reflecting a light emitted by each group III-V semiconductor light emitting diode 1 into one or more of the plurality of group III-V semiconductor photovoltaic cells 2.

In addition, in order to obtain a good light-to-electricity energy conversion efficiency, a total reflection occurring at each interface during a process of transmitting a light from each group III-V semiconductor light emitting diode 1 to each group III-V semiconductor photovoltaic cell 2 should be avoided. Because the total reflection occurs if and only if a light enters from a material with a larger refractive index to a material with a smaller refractive index, an occurrence of the total reflection may be avoided merely by properly matching the refractive indices of individual layers of materials in a light transmission direction. In one preferred embodiment, the refractive indices of individual layers of materials in a transmission path of the working light are matched with each other. Specifically, refractive indices of materials of the group III-V semiconductor active layer 101, the first N-type contact layer 103, the isolation layer 3, the second N-type contact layer 203 and the group III-V semiconductor light absorbing layer 201 are approximate or are slightly increased sequentially.

In one embodiment, the group III-V semiconductor DC transformer may further comprise a light trap for trapping a light inside the group III-V semiconductor DC transformer, so as to prevent the energy loss caused by the light leakage and improve an energy transmission efficiency. In one embodiment, the light trap may comprise: a first reflecting layer formed on a surface of the group III-V semiconductor active layer 101 away from the isolation layer 3; and a second reflecting layer formed on a surface of the group III-V semiconductor light absorbing layer 201 away from the isolation layer 3. In other words, the first reflecting layer and the second reflecting layer are formed on outer surfaces of the group III-V semiconductor active layer 101 and the group III-V semiconductor light absorbing layer 201 respectively, so as to trap a light inside the group III-V semiconductor DC transformer. In another embodiment, the light trap may comprise: a first reflecting layer formed between the first P-type contact layer 102 and the first electrode layerl04; and a second reflecting layer formed between the second P-type contact layer 202 and the third electrode layer 204. Preferably, the first reflecting layer and the second reflecting layer are a Bragg reflector structure or an omnidirectional metal reflector structure.

Preferably, for the group III-V semiconductor DC transformer with a double- surface structure, a transparent insulating dielectric is filled between the plurality of group III-V semiconductor light emitting diodes 1 and between the plurality of group III-V semiconductor photovoltaic cells 2; and for the group III-V semiconductor DC transformer with a single- surface structure, the transparent insulating dielectric is filled between each group III-V semiconductor light emitting diode 1 and each group III-V semiconductor photovoltaic cell 2. Moreover, a top surface of the transparent insulating dielectric is covered by a reflecting material. Alternatively, for the group III-V semiconductor DC transformer with a double- surface structure, a reflecting insulating dielectric is filled between the plurality of group III-V semiconductor light emitting diodes 1 and between the plurality of group III-V semiconductor photovoltaic cells 2; and for the group III-V semiconductor DC transformer with a single- surface structure, the reflecting insulating dielectric is filled between each group III-V semiconductor light emitting diode 1 and each group III-V semiconductor photovoltaic cell 2. The above two methods can effectively trap the working light inside the group III-V semiconductor DC transformer.

The group III-V semiconductor DC transformer according to embodiments of the present disclosure may be classified into three kinds: a nitride semiconductor DC transformer, a phosphide semiconductor DC transformer and an arsenide semiconductor DC transformer.

For the nitride semiconductor DC transformer, the working light is a blue-to-violet light; the group III-V semiconductor active layer 101 has a multi quantum well structure with a material of GaN, InGaN or AlGalnN; a material of the group III-V semiconductor light absorbing layer 201 is ZnO, ZnSe, ZnTe, SiC, GaN, InGaN or AlGalnN, preferably GaN, InGaN or AlGalnN; and a material of the isolation layer 3 is any one of SrTi0 ₃ , ZnO, Ti0 ₂ , Si ₃ N ₄ , SiC, diamond, GaN, Zr0 ₂ , A1N, MgF ₂ , CaF ₂ , CeF ₂ , LiF ₂ , PbF ₂ , Ga ₂ 0 ₃ , BN, Gd ₂ 0 ₃ , KTai_ _x Nb _x 0 ₃ , KTa0 ₃ , LiGa0 ₂ , LiNb0 ₃ , LiTa0 ₃ , MgA10 ₂ , MgO, PbW0 ₄ , Sr _x Bai_ _x Nb ₂ 0 ₆ , YV0 ₄ , Ga ₂ 0 ₃ , and a combination thereof.

For the phosphide semiconductor DC transformer, the working light is a red-to-yellow light; the group III-V semiconductor active layer 101 has a multi quantum well structure with a material of AlGalnP; a material of the group III-V semiconductor light absorbing layer 201 is AlGalnP or InGaP, preferably AlGalnP; and a material of the isolation layer 3 is any one of insulating or semi-insulating GaP, A1P, AlAs, ZnS, ZnSe, ZnTe, InP, Ti0 ₂ , Zr0 ₂ , Si0 ₂ , and a combination thereof. Preferably, the material of the isolation layer 3 is semi-insulating GaP with a high resistivity.

For the arsenide semiconductor DC transformer, the working light is an infrared light; the group III-V semiconductor active layer 101 has a multi quantum well structure with a material of AlGaAs, AlGalnAs, GaAs or InGaAs; a material of the group III-V semiconductor light absorbing layer 201 is Si, CdS, CuInGaSe, CdTe, AlGaAs, AlGalnAs, GaAs or InGaAs, preferably AlGaAs, AlGalnAs, GaAs or InGaAs; and a material of the isolation layer 3 is any one of insulating or semi-insulating Si0 ₂ , Zr0 ₂ , Ti0 ₂ , InAs, Si, GaAs, AlAs, AlGaAs, InP, A1P, GaP, and a combination thereof. Preferably, the material of the isolation layer 3 is semi-insulating GaAs or GaP with a high resistivity.

Fig. 4 is a flow chart of a method for forming a group III-V semiconductor DC transformer with a double- surface structure according to an embodiment of the present disclosure. As shown in Fig. 4, the method comprises following steps.

In step S101, a first substrate is provided, and a group III-V semiconductor electricity-to-light conversion structure layer is formed on the first substrate by epitaxial growth. In one embodiment, the group III-V semiconductor electricity-to-light conversion structure layer comprises from bottom to top: a first N-type contact layer 103, a group III-V semiconductor active layer 101 and a first P-type contact layer 102. It should be noted that only a basic structure of the group III-V semiconductor electricity-to-light conversion structure layer is shown herein, and those skilled in the art may design more details thereof according to practical requirements.

In step S102, a second substrate is provided, and a group III-V semiconductor light-to-electricity conversion structure layer is formed on the second substrate by epitaxial growth. In one embodiment, the group III-V semiconductor light-to-electricity conversion structure layer comprises from bottom to top: a second N-type contact layer 203, a group III-V semiconductor light absorbing layer 201 and a second P-type contact layer 202. It should be noted that only a basic structure of the group III-V semiconductor light-to-electricity conversion structure layer is shown herein, and those skilled in the art may design more details thereof according to practical requirements.

In step S103, an isolation layer 3 is provided. A material of the isolation layer 3 is an insulating dielectric transparent to a working light.

In step SI 04, the group III-V semiconductor electricity-to-light conversion structure layer is transferred from the first substrate to one surface of the isolation layer 3, and the group III-V semiconductor light-to-electricity conversion structure layer is transferred from the second substrate to the other surface of the isolation layer 3.

In step SI 05, the group III-V semiconductor electricity-to-light conversion structure layer is divided by etching and a first electrode (for example, including a first electrode layer 104 and a second electrode layer 105) is deposited to form a plurality of group III-V semiconductor light emitting diodes 1, and the plurality of group III-V semiconductor light emitting diodes 1 are connected in series and/or in parallel by a metal using a planar process.

In step SI 06, the group III-V semiconductor light-to-electricity conversion structure layer is divided by etching and a second electrode (for example, including a third electrode layer 204 and a fourth electrode layer 205) is deposited to form a plurality of group III-V semiconductor photovoltaic cells 2, and the plurality of group III-V semiconductor photovoltaic cells 2 are connected in series and/or in parallel by a planar metallization process.

It should be noted that, the sequence of steps SI 02 and SI 03 may be exchanged, and the sequence of steps S105 and S 106 may be exchanged. In other words, step S103 may be performed prior to step SI 02, and step SI 06 may be performed prior to step SI 05. The method according to embodiments of the present disclosure is a simple and mature process which is applicable for a large scale production.

In some embodiments of the present disclosure, the first substrate, the second substrate and the isolation layer 3 may comprise a same material, so that the steps of transferring the group III-V semiconductor electricity-to-light conversion structure layer and the group III-V semiconductor light-to-electricity conversion structure layer to the isolation layer 3 respectively may be omitted. Instead, the group III-V semiconductor electricity-to-light conversion structure layer and the group III-V semiconductor light-to-electricity conversion structure layer may be directly formed on double polished surfaces of the isolation layer 3 by epitaxial growth respectively. Accordingly, another method for forming a group III-V semiconductor DC transformer with a double- surface structure is provided according to an embodiment of the present disclosure. As shown in Fig. 5, the method comprises following steps.

In step S201, a substrate is provided. The substrate is transparent to a working light of the group III-V semiconductor DC transformer. The substrate is equivalent to an isolation layer 3 in a final group III-V semiconductor DC transformer. Both surfaces (i.e., front and back surfaces) of the substrate need to be polished for epitaxial growth.

In step S202, a group III-V semiconductor electricity-to-light conversion structure layer is formed on a first surface of the substrate by epitaxial growth.

In step S203, a group III-V semiconductor light-to-electricity conversion structure layer is formed on a second surface of the substrate by epitaxial growth.

In step S204, the group III-V semiconductor electricity-to-light conversion structure layer is divided by etching and a first electrode (for example, including a first electrode layer 104 and a second electrode layer 105) is deposited to form a plurality of group III-V semiconductor light emitting diodes 1, and the plurality of group III-V semiconductor light emitting diodes 1 are connected in series and/or in parallel by a planar metallization process.

In step S205, the group III-V semiconductor light-to-electricity conversion structure layer is divided by etching and a second electrode (for example, including a third electrode layer 204 and a fourth electrode layer 205) is deposited to form a plurality of group III-V semiconductor photovoltaic cells 2, and the plurality of group III-V semiconductor photovoltaic cells 2 are connected in series and/or in parallel by a planar metallization process.

It should be noted that, the sequence of steps S204 and S205 may be exchanged. In other words, step S205 may be performed prior to step S204. With the method according to embodiments of the present disclosure, the group III-V semiconductor electricity-to-light conversion structure layer and the group III-V semiconductor light-to-electricity conversion structure layer may be directly formed on both surfaces of the isolation layer without any sacrificed substrate, so as to lower a cost.

In some embodiments of the present disclosure , a thickness of the isolation layer 3 may be smaller, so that the steps of transferring the group III-V semiconductor electricity-to-light conversion structure layer and the group III-V semiconductor light-to-electricity conversion structure layer to the isolation layer 3 respectively may be omitted. Instead, the group III-V semiconductor electricity-to-light conversion structure layer and the group III-V semiconductor light-to-electricity conversion structure layer may be directly formed by epitaxial growth sequentially. Accordingly, another method for forming a group III-V semiconductor DC transformer with a double- surface structure is provided according to an embodiment of the present disclosure. As shown in Fig. 6, the method comprises following steps.

In step S301, a substrate is provided.

In step S302, a group III-V semiconductor electricity-to-light conversion structure layer is formed on the substrate by epitaxial growth.

In step S303, the group III-V semiconductor electricity-to-light conversion structure layer is divided by etching and a first electrode (for example, including a first electrode layer 104 and a second electrode layer 105) is deposited to form a plurality of group III-V semiconductor light emitting diodes 1, and the plurality of group III-V semiconductor light emitting diodes 1 are connected in series and/or in parallel by a planar metallization process.

In step S304, an isolation layer 3 is formed on the plurality of group III-V semiconductor light emitting diodes 1 by epitaxial growth.

In step S305, a group III-V semiconductor light-to-electricity conversion structure layer is formed on the isolation layer 3. In step S306, the group III-V semiconductor light-to-electricity conversion structure layer is divided by etching and a second electrode (for example, including a third electrode layer 204 and a fourth electrode layer 205) is deposited to form a plurality of group III-V semiconductor photovoltaic cells 2, and the plurality of group III-V semiconductor photovoltaic cells 2 are connected in series and/or in parallel by a planar metallization process.

It should be noted that, the sequence of steps S302-S303 and steps S305-S306 may be exchanged. In other words, steps S305-S306 may be performed prior to steps S302-S303. Advantages of the method according to embodiments of the present disclosure lies in that the film transferring process is not required and the method is applicable for a case of a thinner isolation layer 3.

In the above embodiment, if the material of the isolation layer 3 is polycrystalline, it is not favorable for a further epitaxial growth on the isolation layer 3. In order to solve the problem, another method for forming a group III-V semiconductor DC transformer with a double- surface structure is provided according to an embodiment of the present disclosure. As shown in Fig. 7, the method comprises following steps.

In step S401 , a first substrate is provided, and a group III-V semiconductor electricity-to-light conversion structure layer is formed on the first substrate by epitaxial growth.

In step S402, an isolation layer 3 is formed on the group III-V semiconductor electricity-to-light conversion structure layer by epitaxial growth.

In step S403, a second substrate is provided, and a group III-V semiconductor light

-to-electricity conversion structure layer 20 is formed on the second substrate by epitaxial growth.

In step S404, the group III-V semiconductor light-to-electricity conversion structure layer is transferred from the second substrate onto the isolation layer 3.

In step S405, the group III-V semiconductor electricity-to-light conversion structure layer is divided by etching and a first electrode (for example, including a first electrode layer 104 and a second electrode layer 105) is deposited to form a plurality of group III-V semiconductor light emitting diodes 1, and the plurality of group III-V semiconductor light emitting diodes 1 are connected in series and/or in parallel by a planar metallization process.

In step S406, the group III-V semiconductor light-to-electricity conversion structure layer is divided by etching and a second electrode (for example, including a third electrode layer 204 and a fourth electrode layer 205) is deposited to form a plurality of group III-V semiconductor photovoltaic cells 2, and the plurality of group III-V semiconductor photovoltaic cells 2 are connected in series and/or in parallel by a planar metallization process.

It should be noted that, the sequence of steps S405 and S406 may be exchanged. In other words, step S406 may be performed prior to step S405.

Alternatively, steps S401- S404 may be replaced by steps S401 '- S404' as follows.

In step S401 ' , a first substrate is provided, and a group III-V semiconductor light -to-electricity conversion structure layer 20 is formed on the first substrate by epitaxial growth.

In step S402', an isolation layer 3 is formed on the group III-V semiconductor light -to-electricity conversion structure layer 20 by epitaxial growth.

In step S403' , a second substrate is provided, and a group III-V semiconductor electricity-to-light conversion structure layer is formed on the second substrate by epitaxial growth.

In step S404' , the group III-V semiconductor electricity-to-light conversion structure layer is transferred from the second substrate onto the isolation layer 3.

Fig. 8 is a flow chart of a method for forming a group III-V semiconductor DC transformer with a single- surface structure according to an embodiment of the present disclosure. As shown in Fig. 8, the method comprises following steps.

In step S501, a substrate is provided. The substrate is transparent to a working light of the group III-V semiconductor DC transformer. The substrate also plays a role of an isolation layer. The substrate has a reflecting structure 301.

In step S502, a plurality of group III-V semiconductor light emitting diodes 1 are formed on the substrate.

In step S503, a plurality of group III-V semiconductor photovoltaic cells 2 are formed on the substrate. The plurality of group III-V semiconductor light emitting diodes 1 and the plurality of group III-V semiconductor photovoltaic cells 2 are arranged alternately, and the reflecting structure 301 is used for reflecting a light emitted by each group III-V semiconductor light emitting diode 1 into one or more of the plurality of group III-V semiconductor photovoltaic cells 2.

In step S504, the plurality of group III-V semiconductor light emitting diodes 1 are connected in series and/or in parallel by a planar metallization process, and the plurality of group III-V semiconductor photovoltaic cells 2 are connected in series and/or in parallel by a planar metallization process.

It should be noted that, the sequence of steps S502 and S503 may be exchanged. In other words, step S503 may be performed prior to step S502.

In all the above methods for forming a group III-V semiconductor DC transformer according to embodiments of the present disclosure, a working light spectrum of each group III-V semiconductor light emitting diode 1 is matched with that of each group III-V semiconductor photovoltaic cell 2, and the isolation layer 3 is transparent to the working light. Preferably, the all methods further comprise forming a light trap for trapping the working light inside the group III-V semiconductor DC transformer without leakage. In one embodiment, the light trap may comprise: a first reflecting layer formed on a surface of the group III-V semiconductor active layer 101 away from the isolation layer 3; and a second reflecting layer formed on a surface of the group III-V semiconductor light absorbing layer 201 away from the isolation layer 3. In another embodiment, the light trap may comprise: a first reflecting layer formed between the first P-type contact layer 102 and the first electrode layer 104; and a second reflecting layer formed between the second P-type contact layer 202 and the third electrode layer 204. In one embodiment, the first reflecting layer and the second reflecting layer are a Bragg reflector structure or an omnidirectional metal reflector structure.

Reference throughout this specification to "an embodiment", "some embodiments", "one embodiment", "an example", "a specific examples", or "some examples" means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the disclosure. Thus, the appearances of the phrases such as "in some embodiments", "in one embodiment", "in an embodiment", "an example", "a specific examples", or "some examples" in various places throughout this specification are not necessarily referring to the same embodiment or example of the disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

Although explanatory embodiments have been shown and described, it would be appreciated by those skilled in the art that changes, alternatives, and modifications may be made in the embodiments without departing from spirit and principles of the disclosure. Such changes, alternatives, and modifications all fall into the scope of the claims and their equivalents.