Title:
HARDWARE ACCELERATOR, IMAGE PROCESSING DEVICE, AND IMAGE PROCESSING METHOD
Document Type and Number:
WIPO Patent Application WO/2022/064884
Kind Code:
A1
Abstract:
This hardware accelerator is provided with: a reference value derivation unit for using a filter to filter pixel values for each pixel of an image and a plurality of pixels around each pixel, thereby deriving a reference value; a binary pattern generation unit for generating a binary pattern on the basis of the reference value or the pixel value of each pixel of the image, and the pixel value of the plurality of pixels around each pixel; a binary pattern conversion unit for converting the binary pattern to a converted binary pattern; and a histogram generation unit for generating a histogram by means of the binary pattern or the converted binary pattern. The accelerator then outputs the binary pattern, the converted binary pattern, or the histogram obtained by the binary pattern generation unit and at least one of the reference value derivation unit, the binary pattern conversion unit, and the histogram generation unit.
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Inventors:
MATSUMOTO KOSUKE (JP)
Application Number:
PCT/JP2021/029475
Publication Date:
March 31, 2022
Filing Date:
August 10, 2021
Export Citation:
Assignee:
CASIO COMPUTER CO LTD (JP)
International Classes:
G06T7/00
Domestic Patent References:
| WO2013105513A1 | 2013-07-18 |
Foreign References:
| JP2015225469A | 2015-12-14 | |||
| JP2009211179A | 2009-09-17 | |||
| US20160091947A1 | 2016-03-31 |
Attorney, Agent or Firm:
KIMURA, Mitsuru (JP)
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