HARDWARE-EFFICIENT FAULT-TOLERANT OPERATIONS WITH SUPERCONDUCTING CIRCUITS

Title:

HARDWARE-EFFICIENT FAULT-TOLERANT OPERATIONS WITH SUPERCONDUCTING CIRCUITS

Document Type and Number:

WIPO Patent Application WO/2019/156760

Kind Code:

A8

Abstract:

Techniques for providing hardware-efficient fault-tolerant quantum operations are provided. In some aspects a cavity and an ancilla transmon are used to implement a quantum operation by encoding a logical qubit using more than two energy levels of the cavity, encoding information using more than two energy levels of the ancilla transmon, and creating an interaction between the cavity and the ancilla transmon that decouples at least one error type in the ancilla transmon from the cavity.

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Inventors:

ROSENBLUM SERGE (US)
REINHOLD PHILIP (US)
JIANG LIANG (US)
GIRVIN STEVEN (US)
FRUNZIO LUIGI (US)
DEVORET MICHEL (US)
SCHOELKOPF ROBERT (US)

Application Number:

PCT/US2019/012441

Publication Date:

October 31, 2019

Filing Date:

January 05, 2019

Export Citation:

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Assignee:

UNIV YALE (US)

International Classes:

H01L39/22; B82Y10/00; G06N99/00; H03K19/195

Attorney, Agent or Firm:

ACHILLES, Daryl, L. (US)

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