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Patent Searching and Data


Title:
HIGH-LEVEL SYNTHESIS DEVICE, HIGH-LEVEL SYNTHESIS METHOD, AND STORAGE MEDIUM
Document Type and Number:
WIPO Patent Application WO/2021/009797
Kind Code:
A1
Abstract:
Provided are a high-level synthesis device, etc., with which, while easing restrictions pertaining to combining a circuit module based on a high-level language description and a circuit module based on an existing HDL description, it is possible to improve the generated digital circuit. A high-level synthesis device 200 pertaining to one embodiment of the present disclosure comprises: a high-level synthesis unit 130 for generating, from a first function which is included in a first description by which a first circuit is written in a first language and which receives first data to be processed by a second circuit written by a second description in a second language as an argument and returning second data which is the result of processing as a return value, a third description in a third language of the first circuit written so as to pass the first data and a first value that indicates whether or not the first data is valid and receive the second data and a second value that indicates whether or not the second data is valid; and an output unit 140 for outputting the third description.

Inventors:
WATANABE YOSHIKAZU (JP)
Application Number:
PCT/JP2019/027667
Publication Date:
January 21, 2021
Filing Date:
July 12, 2019
Export Citation:
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Assignee:
NEC CORP (JP)
International Classes:
G06F17/50
Foreign References:
JP2015049560A2015-03-16
Attorney, Agent or Firm:
SHIMOSAKA Naoki (JP)
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