This invention relates to solid-state devices and, in particular, to high voltage and high current switches, amplifiers, and opto-isolator circuits. In particular, the invention makes available a circuit capable of handling relatively high voltages- and high currents utilizing as a control an amplifier capable only of relatively low voltage but high current operation. Many applications require relays and other types of switches which operate at high voltage and current levels. There have been many attempts to use photoactivated opto-isolators comprising bipolar transistors as substitutes for mechanical relays. It has been generally found that adapting bipolar transistors to the very high voltage and current requirements needed- is economically unfeasible, because of the limited voltage-handling capabilities of such transistors. In an article entitled "A Field

Terminated Diode" by Douglas E. Houston et al, published in IEEE Transactions on Electron Devices,. Vol. ED-23, No. 8, August 1976, there is described a discrete solid-state high voltage switch that has a vertical geometry and which includes a region which can be pinched off to provide an "OFF" state or which can- be made highly conductive with dual carrier injection to provide an "ON" state. Dual carrier injection refers to the injection of both holes and electrons form ^' a conductive plasma in the. semiconductor. One problem with this switch is that it is not easily manufacturable with other like switching devices on a common substrate. Another problem is that the spacing between the grids and the cathode should be small to limit the magnitude of the control grid voltage; however, this limits the useful voltage range because it reduces grid-to-cathode breakdown voltage. This limitation in. turn limits to relatively low operating voltages the use of two devices connected in

2. antiparallel; i.e., with- the cathode of each coupled to the anode of the other. Such a circuit would be useful as a high voltage bidirectional solid-state switch. An additional problem is that the base region should ideally be highly doped to avoid punch-through from the anode to the grid; however, this leads to a low voltage breakdown between anode and cathode. Widening of the base region limits the punch-through effect; however, it also increases the resistance of the device in the "ON" state. it is desirable to have a high power amplifier/switch which is capable of being operated at at least several hundred volts and several hundred miHiamperes.

A solution to the above problem is appropriately combining an amplifier or switch with low voltage/high current capabilities with a level shifting circuit means and a gated diode switch (GDS) such as that disclosed in the Houston et al paper. A preferred form of GDS is described below in the specification. n one embodiment, the amplifier/switch is a p-n-p transistor with the collector connected to the gate of a GDS and with the base serving as an input. The transistor has a relatively high current handling capability but only a modest voltage handling capability. The level shifting circuit means is a p-n diode. This circuitry is useful as a high power amplifier/switch. The combination of the high voltage and current capabilities of the GDS and the high current capabilities of the p-n-p transistor results in an amplifier/switch which has both high voltage and high current capabilities.

In still other embodiments the amplifier/switch is the combination of a p-n-p transistor and an n-p-n transistor or just a junction field effect transistor.

In another embodiment the circuitry is an opto-isolator circuit having an amplifier comprising a pair of n-p-n transistors (Ql, Q2) coupled in a

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3. Darlington configuration with the base of Ql being photosensitive. The level shifting circuit means is two serially coupled p-n diodes (Dl, D2) . The collectors of Ql and Q2 and the anode of Dl are coupled to a common terminal. The emitter of Q2 is coupled to the anode of the GDS and the cathode of D2 is coupled to the gate of the GDS. The Darlington configuration of transistors (Ql and Q2) has relatively high gain and high current capabilities but only modest voltage blocking capability- These characteristics, when combined with the high current and high voltage blocking capability of the GDS, result in an optically coupled amplifier/switch which provides excellent electrical isolation, high gain, and high current and voltage handling capability. This is accomplished without the need of a high current and high voltage transistor.

Another embodiment of the present invention is an optically responsive bidirectional, switch comprising a combination of two of the opto-isolator circuits as described hereinabove and'two additional diodes.

These and other novel features and advantages of the present invention will be better understood from consideration of the following detailed description taken in conjunction with the accompanying drawing.

In the drawing:

FIGS. 1 and 2 illustrate circuitry in accordance with an illustrative embodiment of the invention; FIG. 3 illustrates other circuitry in accordance with another illustrative embodiment of the invention;

FIG. 4 illustrates circuitry in accordance with still another illustrative embodiment of the invention;

FIG. 5 illustrates circuitry in accordance with still another illustrative embodiment, of the invention; and FIG. 6 illustrates circuitry in accordance with

4. still another illustrative embodiment of the invention.

Referring now to FIGS. 1 and 2, there is illustrated circuitry 10 coupled between terminals X and Y comprising an amplifier A comprising transistors Ql and Q2 (which are illustrated connected in a Darlington configuration), a level shifting circuit L5 comprising diodes Dl and D2, and a gated diode switch (GDS), illustrated in a semiconductor cross-sectional view in FIG. 1 and by an electrical symbol in FIG. 2. Amplifier A may be denoted as an amplifier/switch. Ql is a phototransistor whose base region is photosensitive. The emitter of Ql is coupled to the base of Q2.

Semiconductor substrate 12 and body 16 and regions 18, 20, 22 and 24 are illustrated as ri, p-, p+, n+, £, and n+ type conductivity regions, respectively. Regions 18 and 24 serve as the anode and cathode, respectively, and regions 20 and 12 serve as the gate (control terminal) of the GDS. Region 22 serves as a punch-through shield. Electrode regions 28, 30, and 32 are typically aluminum and provide low resistance contact to regions 18, 20, and 24, respectively.

Switch GDS is characterized by a relatively low resistance path between anode region 18 and cathode region 24 when in the ON (conducting) state and by a substantially higher impedance when in the OFF (blocking) state. In the ON state the potential of the gate electrode 30 is at or below that of the potential of anode 28. Holes are injected into body 16 from anode region 18 and electrons are injected into body 16 from cathode ^' region 24. These holes and electrons can be in sufficient numbers to form a plasma which conductivity modulates body 16. This effectively lowers the resistance of body 16 such that the resistance between anode region 18 and cathode region 24 is relatively low when GDS is operating in the ON state. This type of operation, in which both holes and electrons act as current carriers, is denoted as dual carrier injection. Region 22 helps limit the punch-through

5. of a depletion layer formed during operation between region 20 and substrate 12 and cathode region 24. Region 22 also helps inhibit formation of a surface inversion layer between regions 24 and 20. In addition, it allows anode region 18 and cathode region 24 to be relatively closely spaced. This results in relatively low resistance between anode region 18 and cathode region 24 during the ON state.

Conduction between anode region 18 and cathode region 24 is inhibited or cut off if the potential of gate electrode 30 is sufficiently more positive than that of anode electrode 28 and cathode electrode 32. The amount of excess positive potential needed to inhibit or cut off conduction is a function of the geometry and impurity concentration levels of structure 10. This positive gate potential causes a sufficient part of body 16 to be depleted such that the potential of this portion of body 16 is more positive than that of the anode 18 and cathode 24 regions. This positive potential barrier cuts off the conductive plasma and inhibits the conduction of holes from anode region 18 to cathode region 24. It also serves to collect electrons emitted at cathode region 24 before they can reach anode region 18. The switch GDS has been fabricated on an n_ type substrate having a thickness of 457 to 559 microns and a conductivity of 10^ to 10^" impurities/cm . Body 16 is of p- type conductivity with a thickness of 30 to 40 microns , a width of 720 microns, a length of 910 microns, and an impurity concentration in the range of 5 - 9 x 10 ¹³ impurities/cm . The anode region 18 is of p+ type conductivity with a thickness of 2 to 4 microns, and an impurity concentration of 10 ¹⁹ impurities/cm ³ . The cathode region 24 is of n+ type conductivity with a thickness of 2 to 4 microns and an impurity concentration of 10 ⁱ⁹ impurities/cm ³ . The spacing between anode and cathode is typically 120 microns.

Circuitry 10 is useful as an

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6. opto—isolator which provides a low or high impedance path between terminals X and Y. The current gain and high current capability of the amplifier A and the high voltage and high current capability of the GDS are combined to provide a high voltage, high current switch. In addition, circuitry 10 provides relatively high electrical isolation between the source of input light (not illustrated) and the X and Y terminals.

The collectors of Ql and Q2 and the anode of Dl are all coupled together to terminal X- The emitter of Q2 is coupled to the anode of the GDS at a terminal B. The cathode of D2 is coupled to the gate of the GDS at a terminal C. The cathode of the GDS is coupled to terminal Y. The cathode of Dl is coupled to the anode of D2. Transistor Ql is a phototransistor having a photosensitive base area which serves as an input for circuitry 10. Conduction can occur between the collector and emitter of Ql if there is sufficient light incident on the photosensitive base of Ql. As will become clear,from the below description, when sufficient light is incident upon the photosensitive base of Ql there is established a relatively low impedance path between terminals X and Y and conduction from terminal X to terminal Y occurs if terminal X is more positive than terminal Y by a preselected amount. If there is insufficient light signal incident upon the photosensitive base of Ql then there is essentially an open circuit (a high impedance path) between terminals X and Y. During an ON (conducting) state of the

GDS the potential of anode region 18 is more positive than that of gate regions 12 and 20 and cathode region 24, and there is current flow from anode region 18 through regions 16 and 22 and into cathode region 24. Conduction between anode region 18 and cathode region 24 is inhibited or cut off if the potential of the gate regions 12 and 20 is sufficiently more positive than that of anode region 18 and cathode region 24. The amount of

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7. excess positive potential needed to inhibit or cut off conduction is a function of the geometry and impurity concentration levels of the semiconductor regions of the GDS. Circuitry 10 can be operated to perform a switch function and to serve as an opto-isolator amplifier circuit. If a light signal impinges on the photosensitive base of Ql, then Ql and Q2 are biased so as to support conduction therethrough. Substrate 12 (the gate of the GDS) and region 24 (the cathode of the GDS) also serve as the collector and emitter, respectively, of a vertical n-p-n transistor with body 16 and region 22 serving as the base. Conduction from anode region 18 to cathode region 24 serves as base current which supports conduction from substrate 12 to cathode region 24. A first conduction path from terminal X through Ql, Q2, ' region 18 (anode of the GDS) body 16, and regions 22 and 24 (cathode of the GDS) to terminal Y is established. A second conduction path from terminal X through Dl, D2, region 20, substrate 12, body 16, and regions 22 and 24 to terminal X is also established.

The above-described operating condition is achieved by selecting the collector-emitter voltage of Q2 to be less than the combined forward-bias potentials of Dl and D2. This insures that the potential of terminal C (the potential of the gate of the GDS) is less positive than that of terminal B (the potential of the anode of the GDS) during conduction. This insures that conduction can occur between anode region 18 and cathode region 24.

If the light illuminating the photosensitive base of Ql is removed, then Ql and Q2 are biased off and the flow of current therethrough ceases. The potential of terminal B now falls below that of terminal C such that the GDS is switched to the OFF state. This cuts off all conduction between terminals X and Y. Thus there is a relatively high impedance between terminals X and Y at this time. Most of the voltage drop

8. between terminals X and Y is across the anode region 18 (terminal B) and the cathode region 24 (terminal Y) and only a relatively modest amount exists across the collector-emitter of Q2. The voltage across the 5 collector-emitter of Q2 is such that the potential of terminal B is sufficiently less positive than that of terminal C to insure that the GDS is biased to the OFF state.

From the foregoing it can be appreciated

10 that level shifting circuit LS provides self-biasing for the GDS gate without the need for a separate bias source. It further provides an alternate current path during the ON state which reduces high current flow through the amplifier A.

15 Referring now to FIG. 3, there is illustrated circuitry 100 coupled between terminals XI and Yl which is very similar to that of circuitry 10. Circuitry 100 comprises an amplifier Al, a gated diode . switch (GDS1) , and a level shifting circuit means LSI.

20 Al comprises a p-n-p transistor Q3 and an n-p-n transistor Q4 and may be denoted as an amplifier/switch. The emitter of Q3 is coupled to the collector of Q4 and the collector of Q3 is coupled to the base of Q4. LSI comprises serially connected p-n diodes D3 and D4. The

25 base of transistor Q3 (input terminal Dl) is not photosensitive as is transitor Ql of FIG. 1. The operation of circuitry 100 is very similar to that of circuitry 10 except that the input signal is coupled to the base of Q3 via an electrical connection and not via a

30 light path and the gain of amplif er Al may be different from the gain of amplifier A.

Referring now to FIG. 4, there is illustrated circuitry 102 coupled between terminals X2 and Y2 which is very similar to circuitry 100. Circuitry

35102 comprises amplifier A2 which comprises a junction field effect transistor Q5 whose gate is coupled to an input terminal 12. A2 may be denoted as an amplifier/switch. It further comprises a level shifting

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9. circuit means LS2 which comprises a p-n diode D5 and further comprises a gated diode switch (GDS2) . The basic difference between circuitry 102 and 100 is that junction field effect transistor Q5 is substituted for Q3 and Q4 and a single diode D5 is used instead of diodes D3 and D4. The operation of circuitry 102 is very similar to that of circuitry 100 of FIG. 3 except the gain of amplifier A3 may be somewhat different from the gain of A2 of FIG. 3. Referring now to FIG. 5, there is illustrated circuitry 104 coupled between terminals X5 and Y5 comprising amplifier A5, level shifting circuit means LS5, and a gated diode switch (GDS5) . A5 comprises a p-n-p transistor Q5 and LS5 comprises a p-n diode D10. A5 may be denoted as an amplifier/switch. Circuitry 104 is very similar to circuitry 102 of FIG. 4 except that p-n-p transistor Q8 is used instead of junction field effect transistor Q5 and diode D10 is used instead of diode D5. The operation of circuitry 104 is very similar to that of circuitry 102 but the gain of A5 may be different from the gain of A2.

Referring now to FIG. 6, there is illustrated circuitry 106 coupled between terminals X3 and Y3 comprising amplifiers A3 and A4, gated diode switches GDS3 and GDS4, level shifting circuit means LS3 and LS4 comprising diodes D6 and D8 , respectively, and first and second unidirectional circuit means comprising diodes D7 and D9. A3 and A4 may each be denoted as an amplifier/switch. Circuitry 106 is capable of being operated as a bilateral switch which couples terminals X3 and Y3. Current flow can be achieved from terminal X3 to Y3 or in the reverse direction.

In one illustrative embodiment of circuitry 106, amplifier A3 comprises an n-p-n transistor Q6 whose base region is photosensitive and amplifier A4 comprises an n-p-n transistor Q7 whose base is also photosensitive. The combination of A3, GDS3, and D6 and

10. the combination of A4, GDS4 and D8 are both configured in essentially the same manner as A, GDS and LS of FIGS. 1 and 2, and function in essentially the same manner. The collector of Q6 is coupled to the anode of D6, the cathode of D7, and to terminal X3. The emitter of Q6 is coupled to the anode of GDS3, the cathode of GDS4, and to a terminal U. The collector of Q7 is coupled to the anode of D8, the cathode of D9, and to terminal Y3. The emitter of Q7 is coupled to the anode of GDS4, the cathode of GDS3, and to a terminal V. The cathodes of D6 and D8 and the gates of GDS3 and GDS4 are all coupled together to a terminal W.

If terminal X3 is more positive in potential than Y3 and there is a light signal incident upon the photosensitiv= base of Q6, there is conduction from terminal X3 through Q6 and D6 and through GDS3 into the cathode of GDS3 and then through D9 and into terminal Y3. The impedance between terminals X3 and Y3 with a light signal applied to the photosensitive base of Q6 is relatively low.

If terminal Y3 is more positive in potential than X3 and there is a light signal applied to the photosensitive base of Q7, there is conduction from terminal Y3 through Q7 and D8, and into GDS4 and then through D7 and into terminal X3. The impedance between terminals Y3 and X3 with a light signal applied to the photosensitive base of Q7 is relatively low.

It is thus clear that circuitry 106 provides a bilateral switching function which also introduces gain.

The embodiments described herein are intended to be illustrative of the general principles of the invention. Various modifications are possible consistent with the spirit of the invention. For example, the amplifier(s) can be a single n-channe'l or p-channel MOS transistor and the level shifting circuit means can be an MOS-type diode equivalent. Still further, the amplifier(s) can be a pair of n-p-n

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11. transistors coupled together in a Darlington configuration. Still further, the amplifier/switch (es) can be considerably more complex than just one or two transistors and the level shifting circuit means can likewise be more complex than just one or two diodes. Still further, the amplifier/switch (es) and level shifting circuit means can be formed from components other than junction or field effect transistors or diodes.

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