Title:
HIGH-RESOLUTION DELAYER USING MULTI-STAGE DELAYER
Document Type and Number:
WIPO Patent Application WO/2020/130338
Kind Code:
A1
Abstract:
Provided is a delayer in which an RF TTD and an analog TTD are connected through a mixer in a multistage manner, in order to configure a delay circuit having high resolution, long delay time, and a small gain change. A delayer according to an embodiment of the present invention may include: a first time delay (TD) for adjusting a delay of a received signal; and a second TD for adjusting a delay of a signal delayed by the first TD, wherein each of the first TD and the second TD adjusts a delay of an input signal by using different circuits from each other. Accordingly, a delay circuit having high resolution, long delay time, and a small gain change can be configured by connecting an RF TTD and an analog TTD through a mixer in a multistage manner.
Inventors:
KIM KI JIN (KR)
AHAN KWANG HO (KR)
AHAN KWANG HO (KR)
Application Number:
PCT/KR2019/014952
Publication Date:
June 25, 2020
Filing Date:
November 06, 2019
Export Citation:
Assignee:
KOREA ELECTRONICS TECHNOLOGY (KR)
International Classes:
H03K5/131; H03K5/00
Foreign References:
| US9654310B1 | 2017-05-16 | |||
| JP2008118532A | 2008-05-22 | |||
| KR20100080864A | 2010-07-12 | |||
| KR101918356B1 | 2018-11-13 | |||
| KR20180031859A | 2018-03-29 |
Attorney, Agent or Firm:
NAM, Choong Woo (KR)
Download PDF: