Title:
HISTOGRAM STATISTIC CIRCUIT AND MULTIMEDIA PROCESSING SYSTEM
Document Type and Number:
WIPO Patent Application WO/2018/121627
Kind Code:
A1
Abstract:
A histogram statistic circuit and a multimedia processing system. The histogram statistic circuit (200) is coupled to a memory (1), the memory (1) storing multimedia data. The histogram statistic circuit (200) comprises: a counter buffer (201), a controller (202), a parsing circuit (203), a matching and decoding circuit (204), and a count value updating circuit (205). The controller (202) is coupled to the counter buffer (201), the parsing circuit (203) and the matching and decoding circuit (204). The count value updating circuit (205) is coupled between the counter buffer (201) and the matching and decoding circuit (204). As the histogram statistic circuit can complete the calculation of a plurality of pixels in parallel and reduce some invalid operations by appropriately grouping multimedia data, the calculating efficiency of the multimedia processing system is greatly improved, and the real-time requirements can be satisfied in situations such as facial recognition.
Inventors:
CHEN YUNBI (CN)
HU KAI (CN)
HU KAI (CN)
Application Number:
PCT/CN2017/119110
Publication Date:
July 05, 2018
Filing Date:
December 27, 2017
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
G06T5/40
Foreign References:
| CN106780415A | 2017-05-31 | |||
| CN104217399A | 2014-12-17 | |||
| CN2838183Y | 2006-11-15 | |||
| US20130287299A1 | 2013-10-31 | |||
| CN201611261579A | 2016-12-30 |
Other References:
See also references of EP 3553738A4
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