Title:
HOLDING CIRCUIT, DISPLAY DRIVE CIRCUIT, DISPLAY PANEL, AND DISPLAY DEVICE
Document Type and Number:
WIPO Patent Application WO/2013/002191
Kind Code:
A1
Abstract:
Provided is a latch circuit (15) that, while holding a signal (CMI) acquired when a signal (SROn) is active, outputs a signal (OUTn) that is in response to the signal (CMI). An inverter (18) is configured from a CMOS circuit comprising an N-channel transistor (TN1) and a P-channel transistor (TP1), and a low-level initialization signal (INITB) is input to the source terminal of the P-channel transistor (TP1). As a result, initialization is performed without increasing the number of elements.
Inventors:
YOKOYAMA MAKOTO
FURUTA SHIGE
MURAKAMI YUHICHIROH
GYOUTEN SEIJIROU
FURUTA SHIGE
MURAKAMI YUHICHIROH
GYOUTEN SEIJIROU
Application Number:
PCT/JP2012/066194
Publication Date:
January 03, 2013
Filing Date:
June 25, 2012
Export Citation:
Assignee:
SHARP KK (JP)
YOKOYAMA MAKOTO
FURUTA SHIGE
MURAKAMI YUHICHIROH
GYOUTEN SEIJIROU
YOKOYAMA MAKOTO
FURUTA SHIGE
MURAKAMI YUHICHIROH
GYOUTEN SEIJIROU
International Classes:
H03K3/356; G02F1/133; G09G3/20; G09G3/36
Domestic Patent References:
| WO2010146756A1 | 2010-12-23 |
Foreign References:
| JP2004128767A | 2004-04-22 | |||
| JP2000259132A | 2000-09-22 |
Attorney, Agent or Firm:
HARAKENZO WORLD PATENT & TRADEMARK (JP)
Patent business corporation Hara [Kenzo] international patent firm (JP)
Patent business corporation Hara [Kenzo] international patent firm (JP)
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