IMAGE DISTORTION CORRECTING DEVICE AND IMAGE DISTORTION CORRECTING METHOD

Title:

IMAGE DISTORTION CORRECTING DEVICE AND IMAGE DISTORTION CORRECTING METHOD

Document Type and Number:

WIPO Patent Application WO/2002/009418

Kind Code:

A1

Abstract:

A write-side PLL circuit generates a write clock for writing a video signal in a line memory. A read-side PLL circuit generates a read clock for reading the video signal stored in the line memory. An inner pincushion distortion correcting voltage generating circuit modulates the correction waveform of a horizontal rate with the correction waveform of a vertical rate so as to generate an inner pincushion distortion waveform and adds a dc component correcting pulse to the waveform so as to output the waveform as an inner pincushion distortion correcting voltage. A capacitive-coupling circuit superimposes the inner pincushion distortion correcting voltage on the output voltage of a loop filter of the read-side PLL circuit so as to supply the voltage as a control signal to a VCO.

Inventors:

NAKATSUJI MASANORI (JP)
TANAKA MASANOBU (JP)
UWABATA HIDEYO (JP)
OKUMURA NAOJI (JP)
YAMATE KAZUNORI (JP)

Application Number:

PCT/JP2001/006336

Publication Date:

January 31, 2002

Filing Date:

July 23, 2001

Export Citation:

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Assignee:

MATSUSHITA ELECTRIC IND CO LTD (JP)
NAKATSUJI MASANORI (JP)
TANAKA MASANOBU (JP)
UWABATA HIDEYO (JP)
OKUMURA NAOJI (JP)
YAMATE KAZUNORI (JP)

International Classes:

H04N5/14; G09G1/00; H04N3/23; H04N3/233; (IPC1-7): H04N3/23; H04N5/14

Foreign References:

JPH1042163A	1998-02-13
JPH06230736A	1994-08-19

Other References: