RELATED APPLICATION

This application claims the benefit of priority of Israeli Patent Application No. 238760 filed on May 11, 2015, the contents of which are incorporated herein by reference in their entirety.

FIELD AND BACKGROUND OF THE INVENTION

The present invention, in some embodiments thereof, relates to imaging and, more particularly, but not exclusively, to an imaging sensor having monolithic active pixels made of different material systems.

Imaging systems have been employed for use in a variety of high tech applications, such as medical devices, satellite and telescope apparatus. Recently, imaging systems have been utilized in a variety of additional applications such as digital cameras, computer scanners and camcorders. Complementary metal oxide semiconductor (CMOS) imagers offer improvements in functionality, power and cost over charge-coupled-device (CCD) based imagers. A typical CMOS type image sensor includes a focal plane array of pixel cells, each including a photodiode overlying a substrate for accumulating photo-generated charge in the underlying portion of the substrate. A readout circuit is connected to each pixel cell and includes an output transistor, formed in the substrate, and a charge transfer section connected to the gate of the output transistor. The CMOS imager typically also includes a transistor for performing reset operation.

CMOS imagers utilize less power, have lower fabrications costs and offer high system integration compared to CCD based imagers. Additionally, CMOS imagers have the advantage that they can be manufactured using similar processes employed to those commonly used to manufacture logic transistors, such that the CMOS imager support functions can be fabricated on the same chip.

Known in the art are chip scale packages designed for flip chip bonding to a supporting substrate, such as a package substrate, a module substrate or a printed circuit board. With flip chip bonding, bumps are bonded to mating contacts on the supporting substrate. The bonded contacts provide the physical and electrical connections between the package and the supporting substrate. For example, U.S. Patent No. 9,123,605 describes an infrared image sensor that combines an infrared light receiving device (sensor chip) having a two-dimensional array of pixels with a CMOS device forming a read-out circuit. In this infrared image sensor, the sensor chip is flip-chip connected via indium bumps to the CMOS device. A photocurrent generated in each pixel of the sensor chip is output as a voltage via an amplifier in the read-out circuit, processed by an external field-programmable gate array (FPGA), and then output as a digital signal.

Silicon CMOS have also been integrated with GaN high electron mobility transistors (HEMTs) for the purpose of fabricating a current mirror circuit [Hoke et al., Journal of Vacuum Science & Technology B 30, 02B 101 (2012)].

Additional background art includes Sakr et al., Appl. Phys. Lett. 101, 251101 (2012), Giorgetta et al, IEEE J. of Quantum Electronics, 45, 1039 (2009), and U.S. Patent No. 8,653,460, the contents of which are hereby incorporated by reference.

SUMMARY OF THE INVENTION

According to an aspect of some embodiments of the present invention there is provided an image sensor. The image sensor comprises an array of active pixel cells on a substrate. Each active pixel cell of the present embodiments has: a light detector, monolithically integrated with the substrate; and a signal processing circuit, monolithically integrated with the substrate in a region at least partially surrounding the light detector, and being in electronic communication with the light detector. In various exemplary embodiments of the invention the light detector and the signal processing circuit are formed of different material systems, and in various exemplary embodiments of the invention a lattice mismatch between the light detector and the substrate is at least 10%.

According to some embodiments of the invention the light detector occupies a cavity formed in or on the substrate.

According to some embodiments of the invention the light detector is grown epitaxially on a base of the cavity.

According to some embodiments of the invention the light detector comprises a quantum cascade detector. According to some embodiments of the invention the quantum cascade detector comprises a plurality of quantum well layers selected to absorb light by intersubband electronic transitions.

According to some embodiments of the invention the quantum cascade detector comprises an active quantum well layer selected to absorb light by intersubband electronic transitions.

According to some embodiments of the invention the quantum cascade detector comprises an extractor adjacent to the active quantum well layer.

According to some embodiments of the invention at least a thickness of the extractor is selected to allow absorption of infrared light. According to some embodiments of the invention at least a thickness of the extractor is selected to allow absorption of near infrared light. According to some embodiments of the invention at least a thickness of the extractor is selected to allow absorption of short-wave infrared light. According to some embodiments of the invention at least a thickness of the extractor is selected to allow absorption of medium-wave infrared light. According to some embodiments of the invention at least a thickness of the extractor is selected to allow absorption of long-wave infrared light. According to some embodiments of the invention at least a thickness of the extractor is selected to allow absorption of any light having wavelength of from about 1 μιη to about 100 μιη.

According to some embodiments of the invention the image comprises a polarization rotating optical element deposited or formed on the light detector.

According to an aspect of some embodiments of the present invention there is provided an imaging system. The imaging system comprises an image sensor as delineated and optionally and preferably as described below. According to some embodiments of the invention the system is a mobile device. According to some embodiments of the invention the mobile device is selected from the group consisting of a cellular phone, a smartphone, a tablet device, a mobile digital camera, a wearable camera, a personal computer, a laptop, a portable media player, a portable gaming device, a portable digital assistant device, and a portable navigation device.

According to an aspect of some embodiments of the present invention there is provided a method of imaging. The method comprises capturing an image using an imaging system as delineated and optionally and preferably as described below, and displaying said image on a display and/or transmitting said image over a communication network.

According to an aspect of some embodiments of the present invention there is provided a method of fabricating an image sensor. The method comprises: forming on a substrate a plurality of signal processing circuits; for each signal processing circuit, monolithically growing on the substrate a light detector, such that the signal processing circuit is in electronic communication with the light detector and is located in a region at least partially surrounding the light detector; wherein the light detector and the signal processing circuit are formed of different material systems, and wherein a lattice mismatch between the light detector and the substrate is at least 10%.

According to some embodiments of the invention the method comprises forming an array of cavities in or on the substrate, wherein the growing comprises growing a light detector epitaxially on a base of each cavity.

According to some embodiments of the invention the growing comprises growing a stack of quantum well layers forming a quantum cascade detector.

According to some embodiments of the invention the signal processing circuit comprises silicon, and the light detector comprises nitride.

According to some embodiments of the invention the signal processing circuit is devoid of nitride.

According to some embodiments of the invention the signal processing circuit is a MOS circuit.

According to some embodiments of the invention the signal processing circuit is a CMOS circuit.

Unless otherwise defined, all technical and/or scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the invention pertains. Although methods and materials similar or equivalent to those described herein can be used in the practice or testing of embodiments of the invention, exemplary methods and/or materials are described below. In case of conflict, the patent specification, including definitions, will control. In addition, the materials, methods, and examples are illustrative only and are not intended to be necessarily limiting.

Implementation of the method and/or system of embodiments of the invention can involve performing or completing selected tasks manually, automatically, or a combination thereof. Moreover, according to actual instrumentation and equipment of embodiments of the method and/or system of the invention, several selected tasks could be implemented by hardware, by software or by firmware or by a combination thereof using an operating system.

For example, hardware for performing selected tasks according to embodiments of the invention could be implemented as a chip or a circuit. As software, selected tasks according to embodiments of the invention could be implemented as a plurality of software instructions being executed by a computer using any suitable operating system. In an exemplary embodiment of the invention, one or more tasks according to exemplary embodiments of method and/or system as described herein are performed by a data processor, such as a computing platform for executing a plurality of instructions. Optionally, the data processor includes a volatile memory for storing instructions and/or data and/or a non-volatile storage, for example, a magnetic hard-disk and/or removable media, for storing instructions and/or data. Optionally, a network connection is provided as well. A display and/or a user input device such as a keyboard or mouse are optionally provided as well.

BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS

Some embodiments of the invention are herein described, by way of example only, with reference to the accompanying drawings. With specific reference now to the drawings in detail, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of embodiments of the invention. In this regard, the description taken with the drawings makes apparent to those skilled in the art how embodiments of the invention may be practiced.

In the drawings:

FIGs. 1A and IB are schematic illustrations of a top view (FIG. 1A) and a cross-sectional view (FIG. IB) of an image sensor, according to some embodiments of the present invention;

FIG. 2 is a schematic illustration of a signal processing circuit, according to some embodiments of the present invention;

FIGs. 3A-F are schematic illustrations exemplifying the principles and operations of a light detector which can be used according to some embodiments of the present invention; FIG. 4 is a schematic illustration of an image sensor in embodiments of the invention in which the image sensor comprises two or more types of active pixels cells;

FIG. 5 is a schematic illustration of an imaging system, according to some embodiments of the present invention;

FIG. 6 is a schematic illustration of an image sensor, exemplifying use of silicon on insulator (SOI) technology;

FIGs. 7A-B are schematic illustration of a light detector device used in experiments and computer simulations performed according to some embodiments of the present invention;

FIGs. 8 A and 8B show back and front illumination photoctirrent spectra (FIG. 8A) and perpendicular to the surface electrical field intensity (FIG. 8B), obtained in experiments and computer simulations performed according to some embodiments of the present invention; and

FIGs. 9A and 9B show photocurrent spectra for different temperatures (FIG. 9A) and Johnson noise limited detectivity, for back and front illumination (FIG. 9B) obtained in experiments and computer simulations performed according to some embodiments of the present invention.

DESCRIPTION OF SPECIFIC EMBODIMENTS OF THE INVENTION

The present invention, in some embodiments thereof, relates to imaging and, more particularly, but not exclusively, to an imaging sensor having monolithic active pixels made of different material systems.

Before explaining at least one embodiment of the invention in detail, it is to be understood that the invention is not necessarily limited in its application to the details of construction and the arrangement of the components and/or methods set forth in the following description and/or illustrated in the drawings and/or the Examples. The invention is capable of other embodiments or of being practiced or carried out in various ways.

Referring now to the drawings, FIGs. 1A and IB are schematic illustrations of a top view (FIG. 1A) and a cross-sectional view (FIG. IB) of an image sensor 10, according to some embodiments of the present invention. Image sensor 10 optionally and preferably comprises an array of active pixel cells 12 arranged on a substrate 14. Preferably, the array is a two-dimensional array. In the representative illustration of FIG. 1A, active pixel cells 12 form a rectangular array, but other geometries are also contemplated. Image sensor 10 can be configured for sensing back illumination 32 and/or front illumination 34, as illustrated in FIG. IB.

In some embodiments of the present invention each active pixel cell 12 comprises a light detector 16 and a signal processing circuit 18 in electronic communication with light detector 16. The light detector 16 of each active pixel cell optionally and preferably has a lateral area of at most 25 μιη ² more preferably at most 20 μιη ² more preferably at most 16 μιη ² . Lateral areas larger than 25 μιη ² are also contemplated. Both light detector 16 and signal processing circuit 18 are optionally and preferably monolithically integrated with substrate 14. Preferably, signal processing circuit 18 is integrated in a region 20 that laterally surrounds, at least partially, light detector 16. For clarity of presentation, detector 16, circuit 18 and region 20 are only designated for one of cells 12, by in various exemplary embodiments of the invention the active pixel cells are all identical in their structure, except that each cell is at a different lateral location over substrate 14.

In some embodiments of the present invention there is a lattice mismatch between light detector 16 and substrate 14. The lattice mismatch is preferably of at least 10% or at least 11% or at least 12% or at least 13% or at least 14% or at least 15%. In some embodiments, light detector 16 is made of a material system that includes nitride optionally with an active layer in which the dopant is silicon and an extractor which is devoid of silicon, and substrate 14 is made of a material system that includes silicon and optionally and preferably does not include nitride. As a representative example, light detector 16 can comprise a group Ill-nitride heterostructure, and substrate 14 can be made of silicon, e.g. , a silicon having a crystal orientation of (111) along the cry stallo graphic axis.

Group-Ill nitrides are composed of nitrogen and at least one element from Group III of the Periodic Table of Elements, e.g. , aluminum (Al), gallium (Ga) and indium (In). Representative examples of group-Ill nitrides suitable for the present embodiments include, without limitation, GaN, A1N, InN, GaAIN, and GaAlInN. The advantage of using a group-Ill nitride is that by changing the composition of the group III element within the group-Ill nitride, the group-Ill nitride can be tuned along the electromagnetic spectrum. A group Ill-nitride hetero structure suitable for detector 16 includes, without limitation, a GaN/AIN hetero structure. Also contemplated are other heterostructures such as, but not limited to, GaN/AlGaN, AlGaN/InGaN, AlInN/GalnN, AlGalnN/GalnN.

Preferably, light detector 16 and signal processing circuit 18 are also formed of different material systems. In some embodiments, light detector 16 is made of a material system that includes nitride optionally with an active layer in which the dopant is silicon and an extractor which is devoid of silicon, and signal processing circuit 18 is made of a material system that includes silicon and optionally and preferably does not include nitride. As a representative example, light detector 16 can comprise a group Ill-nitride heterostructure, e.g. , a GaN/AIN heterostructure, and signal processing circuit 18 can be made of silicon, e.g., a silicon having a crystal orientation of (100) along the crystallographic axis. In some embodiments, both signal processing circuit 18 and substrate 14 are made of a material system that includes silicon and optionally and preferably does not include nitride, and light detector 16 is made of a material system that includes nitride optionally with an active layer in which the dopant is silicon and an extractor which is devoid of silicon. For example, light detector 16 can comprise a group Ill-nitride heterostructure, e.g. , a GaN/AIN heterostructure, signal processing circuit 18 can be made of silicon, e.g. , a silicon having a crystal orientation of (100) along the crystallographic axis, and substrate 14 can be made of silicon, e.g. , a silicon having a crystal orientation of (11 1) along the crystallographic axis.

Also contemplated are embodiments in which light detector 16 comprise a group Ill-nitride heterostructure, e.g., a GaN/AIN heterostructure, and both signal processing circuit 18 and substrate 14 are made of silicon having the same crystal orientation (e.g. , (I l l)) along the crystallographic axis.

In operation, detector 16 generates an electronic signal in response to light interacting with detector 16, and signal processing circuit 18 receives the electronic signal from detector 16 and executes initial processing operations such as, but not limited to, amplification, supply of reset signal and readout, as known in the art. Preferably, signal processing circuit 18 is a MOS circuit or a CMOS circuit. Typically, but not necessarily, signal processing circuit 18 comprises a plurality of transistors, optionally and preferably a plurality of field effect transistors (FETs). A representative example, which is not to be considered as limiting, for a circuit suitable for use as signal processing circuit 18 is illustrated in FIG. 2. In this Example a three-transistor configuration is employed. A reset transistor Ql supplies a reset signal from a voltage source VDD when a reset signal RST is received at the gate of the transistor Ql. The detector 16 is connected to Ql, preferably to the drain terminal, so that the transistor Ql resets the detector 16 to an initial voltage level. A readout transistor Q2 is connected to a common current source Q _r0 w, outside the area of pixel cell 12, to form a source-follower type amplifier controllable by a bias voltage Vbias. An additional transistor Q3 serves as a switch to accommodate multiplexing. The pixel is optionally and preferably read in two phases. A first phase is a reset phase, where the detector 16 is connected to a supply voltage VDD through the transistor Ql. A second phase is an integration phase, where the detector 16 accumulates photo-generated charge. At the end of the integration phase, the Q3 switch turns on, connecting the transistor Q2 to the external current source Q _r0 w. The output voltage V _ou t is then sampled in a sampling circuit, which is also outside the area of pixel cell 12. Other types of circuits, such as, but not limited to, those described in Brouk et al., IEEE Transactions on Electron Devices, (2007), 54(3), pp. 468-475, are also contemplated,

Referring to FIG. IB, light detector 16 optionally and preferably occupies a cavity 22 formed in or on substrate 14. For example, light detector 16 can be is grown epitaxially on a buffer layer 24 formed on a base of cavity 22, directly on the material system forming substrate 14. Buffer layer 24 is optionally and preferably made of a material system that reduces the lattice mismatch between detector 16 and substrate 14. For example, when substrate comprises silicon and detector 16 comprises nitride, the buffer layer can comprise at least one of zinc telluride, titanium dioxide, zinc oxide, boron phosphide, silicon-germanium, hafnium nitride, and boron- aluminum nitride. As a more specific example, the buffer layer can be in the form of a sequence of epitaxially grown AIN/AlGaN layers.

The walls of each cavity 22 can be layered. For example, each cavity can comprise an insulator layer 26 and semiconductor layer 28 in which circuit 18 is formed, wherein the insulator layer 26 is between semiconductor layer 28 and substrate 14. The insulator layer 26 can be a silicon dioxide layer and the semiconductor layer 28 can be a silicon layer. These embodiments are particularly useful when substrate 14 is made of, or comprises, silicon.

Light detector 16 optionally and preferably comprises a quantum cascade detector (QCD). Also contemplated, are embodiments in which light detector 16 comprises a Quantum Well Infrared Photodetector (QWIP).

Generally, a QCD has a plurality of periods, where each period has an active layer, typically a quantum well (QW) layer, where electron excitation occurs, optionally and preferably, but not necessarily, upon photon intersubband absorption in the conduction band, and a stack of quantum well layers serving as an extractor that transfers the charge carrier excited at the active layer to a lower energy level (e.g. , the ground level) of the active layer of the following period.

FIGs. 3 A and 3B are schematic illustrations exemplifying the principles and operations of a QCD 16, which can be used according to some embodiments of the present invention. The conduction band energy levels of a period of the QCD at zero bias are presented in FIG. 3A, and a schematic illustration of the layers the QCD are presented in FIG. 3B. The dots in FIG. 3B represent optional repetition of periods. The QCD 16 comprises a plurality of periods 102, between a top contact 110 and a bottom contact 112. Arrows represent optical excitation in the active region of the QCD and transport of electrons from one period of the QCD to the next.

The top 110 and bottom 112 contacts can be made, for example, of Si doped group Ill-nitride (e.g., AlGaN). Each of periods 102 has an active layer 104, and a stack 106 of layers forming an extractor that transfers the charge carrier from the active layer 102 of one period to the active layer of the following period. The active layer 104 of each period 102 of QCD 16 is typically the widest QW, containing a ground state denoted el . The period of QCD 16 is optionally and preferably selected such that optically excited carriers are transferred from one QW to the other along the cascade and produce a voltage across each period 102. The QCD can include any number of periods (including a single period) and a measurable voltage is produced between the top 110 and bottom 112 contacts. In some embodiments of the present invention quantum well layers 102 are selected to absorb light by intersubband electronic transitions. In these embodiments, the photo-detection mechanism is via absorption between subbands rather than between the valence and conduction bands. The operation of QCD 16 can be is as follows. Upon light absorption, optionally and preferably intersubband absorption, in the active layer, photo-excited charge carriers dominantly tunnel through the extractor. Charge carriers transferred through the extractor stage experience multiple relaxation via LO-phonon emission between the energy staircase in extractor QWs, towards the lower energy state (e.g. , ground state) of adjacent active QW. A cascade of such stages results in a charge separation (or macroscopic photo voltage) over a large distance, which depends on the number of periods.

The thickness of contacts 110 and 112 is typically from about 100 nm to about 1 μιη. The thickness of the active layers 104 is typically from about 1 nm to about 7 nm, and the thickness of each layer in the extractor 106 is typically from about 1 nm to about 2nm. In various exemplary embodiments of the invention all the layers in the extractor 106 have approximately the same thickness.

The thickness of each of quantum well layers 102 can be selected to allow absorption of light at any wavelength within a predetermined wavelength range. In some embodiments of the present invention the wavelength range includes the infrared range (e.g., from about 0.7 μιη to about 1000 μιη, or from about 1 μιη to about 1000 μιη, or from about 1 μιη to about 70 μιη, or from about 1 μιη to about 50 μιη, or from about 1 μιη to about 10 μιη). In some embodiments of the present invention the wavelength range includes the near infrared range (e.g. , from about 0.7 μιη to about 1.5 μιη, or from about 1 μιη to about 1.5 μιη), in some embodiments of the present invention the wavelength range includes the short-wave infrared range (e.g., from about 0.7 μιη to about 2.5 μιη, or from about 1 μιη to about 2.5 μιη), in some embodiments of the present invention the wavelength range includes the medium- wave infrared range (e.g. , from about 3 μιη to about 5 μιη), and in some embodiments of the present invention the wavelength range includes the long-wave infrared range (e.g. , from about 8 μιη to about 12 μιη).

In some embodiments of the present invention the quantum well layers 102 are selected to absorb light by interband electronic transitions. In these embodiments, the wavelength range includes the UV range (e.g. , from about 100 nm to about 400 nm), in some embodiments the wavelength range includes the UVA range (e.g., from about 315 nm to about 400 nm), in some embodiments the wavelength range includes the UVB range (e.g. , from about 280 nm to about 315 nm), in some embodiments the wavelength range includes the UVC range (e.g. , from about 100 nm to about 280 nm), in some embodiments the wavelength range includes the near UV range (e.g. , from about 300 nm to about 400 nm), in some embodiments the wavelength range includes the middle UV range (e.g. , from about 200 nm to about 300 nm), and in some embodiments the wavelength range includes the far UV range (e.g. , from about 120 nm to about 200 nm).

Optionally, QCD 16 also comprises a polarization rotating optical element 108 configured for rotating the polarization of the light impinging on the respective pixel cell, e.g., a 90° rotation, so that the polarization is aligned generally vertical with respect to the layers of periods 102. Optical element 108 can be, for example, a grating or a plasmonic structure such as a two-dimensional metallic holes array. Element 108 can be deposited on the top contact 110. The advantage of element 108 is that it provides the proper polarization for exciting the resonances of the periods 102.

Reference is now made to FIGs. 3C-E, which are schematic illustration of light detector 16 in embodiments of the invention in which detector 16 comprises quantum dots 312 forming an optically active region 314.

A quantum dot, as used herein, is a semiconductor crystalline structure with size dependent optical and electrical properties. Specifically, a quantum dot exhibits quantum confinement effects such that there is a three-dimensional confinement of electron-hole bound pairs or free electrons and holes. The semiconductor structure can have any shape. Preferably, the semiconductor structure the largest cross-sectional dimension of such structure is of less than about 15 nanometers, e.g. , from about 0.2 nanometers to about 10 nanometers.

A quantum dot is structurally different from a quantum well. Unlike a quantum dot in which, as stated, there is a three-dimensional confinement, the electron-hole bound pairs or free carriers in a quantum well are confined only one- dimension and are generally free in the other two-dimensions.

When quantum dots 312 are irradiated by light from an excitation source (not shown) they reach respective energy excited states. In the present embodiments, detector 16 is preferably designed such that charge carriers that reach excited states are extracted from region 314 thereby converting the optical energy as manifested by the light to electrical energy as manifested by the motion of charge carriers.

In various exemplary embodiments of the invention the quantum dots include electrons in their conductance band. This can be achieved, for example, using self- assembled quantum dots in region 314.

Exemplary materials for use as quantum dots 312 according to some embodiments of the present invention include, but are not limited to GaN or InGaN semiconductors.

The absorption spectrum of quantum dots 312 is characterized by one or more peaks that correspond to energy levels characterizing active region 314.

As used herein, "energy level" also encompasses a range of energies, also known in the literature as "energy band." Such range is typically characterized by an energy value and an energy width. For example, inhomogeneous dimension of the QDs results in broadening of the absorption and emission peaks hence also to wider energy bands. The terms "energy level" and "energy band" are used interchangeably throughout this document.

FIG. 3D shows a representative example of a set of energy levels characterizing active region 314. FIG. 3D presents schemes of the conduction band part of the quantum dots. Shown in FIG. 3D is a three-level energy system, where each level is shown as a range of energies. The lowest energy level, also referred to as the ground state s, is typically, but not necessarily, the only occupied level. The energy level above the ground state corresponds to in-plane excitation of the quantum dot. In-plane excitation can be in two directions, conveniently denoted the x and y directions. In the present example, the quantum dots in region 314 are arranged such that in-plane excitations in the x and y directions occur at the same energy, denoted in FIG. 3D as the p _x , p _y level. The p _x , p _y level is the intermediate energy level in the three-level system of the present example. The highest energy level corresponds to excitation in which the electric field is parallel to the vertical or growth direction. The vertical or growth direction is conveniently denoted the z direction, and the energy level that correspond to excitation along the z direction is denoted P _z .

Generally, the wavelength selection of the quantum dots in active region 314 depends on the type of excitation, the shape and size of the quantum dots, and the sublevel transition in the conduction bands. The excitation of a quantum dot can be via interband transition (transition of charge carriers between a conductance band and a valence band) or via intraband transition (transition of charge carriers between energy levels that belong to the same energy band).

For example, in quantum dots made of GaN, intraband transition from the s state to the p _z state corresponds to energy of about 0.8 eV (or, equivalently, wavelength of about 1.5 micron), intraband transition from the s state to the p _x state corresponds to energy in the range of from about 0.2 eV to about 0.3 eV (wavelength of about 5 microns), and interband transition corresponds to energy of about 3.6 eV (wavelength of 0.345 nm).

It is appreciated that when quantum dot 312 reaches an excited state, it can experience a relaxation. For example, when the excitation is via interband transition the energy that is emitted by the quantum dot upon relaxation corresponds to the respective energy band gap. When the excitation is via intraband transition, the excited carriers can be relaxed in different ways, e.g., through the emission of longitudinal optical phonon. According to a preferred embodiment of the present invention, system 310 is designed such that the excited carriers are extracted from region 314 before the relaxation. This is preferably achieved by means of a charge carrier extractor.

Referring to FIG. 3C, detector 16 comprises a channel region 318 and a charge carrier extractor 316 between active region 314 and channel region 318. Channel region 318 is preferably constituted to form a two-dimensional electron gas therein. Extractor 316 serves for extracting excited charge carriers out of active region 314. Specifically, extractor 316 facilitates transport of charge carriers, via quantum tunneling, from active region 314 to channel region 318. Extractor 316 is characterized by a set of gradually decreasing energy levels between a characteristic excited energy level of active region 314 and a characteristic conductance energy level of channel region 318. Detector 16 typically also comprises lateral contacts 320 contacting the channel 318 for collecting the charge carrier from channel 318. Since the charge in the quantum dots 312 is confined, it is isolated from contacts 320.

In various exemplary embodiments of the invention the energy levels of extractor 316 are selected such as to extract charge carriers excited via intraband transition. Nevertheless, while some embodiments are described with a particular emphasis to detection of light that induces intraband transitions, it is to be understood that more detailed reference to intraband transitions is not to be interpreted as limiting the scope of the invention in any way. Thus, in some embodiments of the present invention the energy levels of extractor 316 are selected such as to extract chare carriers excited via interband transition that excited electron-hole pair into the ground state of quantum dots 314. Extractor 316 can be constituted for extracting either electrons or holes. Specifically, the energy levels of extractor 316 can be between a characteristic excited energy level of electrons in active region 314 and a characteristic conductance energy level of electrons in channel region 318, or between a characteristic excited energy level of holes in active region 314 and a characteristic conductance energy level of holes in channel region 318.

Extractor 316 preferably has a layered structure wherein each layer of the structure corresponds to a different energy level of the set characterizing the extractor. A non-limited example of the energy levels of extractor 316 is illustrated schematically in FIG. 3E, which presents conduction band parts. In the exemplified illustration of FIG. 3E active region 314 spans approximately from z = 3 nm to z = 4.5 nm, extractor 316 spans approximately from z = 4.5 nm to z = 13 nm and channel region 318 spans approximately from z = 13 nm to 18 nm, other dimensions are not excluded for the scope of the present invention. The characteristic excited energy level of active region 314 is at about 0.3 eV, and the characteristic conductance energy level of cannel region 318 is about -0.4 eV. In the illustrate example, extractor 316 has four energy levels gradually decreasing from about 0.25 eV near active region 314 to about -0.3 eV near channel 318. Thus, a charge carrier that is excited at region 314 is transferred along the extractor 316 until it reaches channel 318 where it is allowed flow substantially freely. From channel 318 the charge carrier can be collected via an electrode.

Generally, the materials from which extractor 316 and channel region 318 are made depend on the selected material for the quantum dots in the active region. Given the list of materials above for the quantum dots, the ordinarily skilled person would know how to selected appropriate material combination for system 310

For example, in some embodiments the GaN\Al _x Gai- _x N material combination is used. In these embodiments quantum dots 314 can comprise or be made of GaN, extractor 316 can comprise or be made of AlGaN/AIN and channel region 318 can comprise or be made of GaN. The energy levels of extractor 316 can be selected to allow the extraction of charge carriers at any of the excited levels of active region 314. In some embodiments, the highest energy level of extractor 316 is lower than the highest excited level (e.g. , level P _z ) but above the intermediate excited level (e.g. , level P _x ,P _y ) of active region 314. These embodiments are useful for collecting only charge carriers that are excited to a level which is higher than the intermediate level. For example, these embodiments are useful when it is desired to detect light which is polarized in a transverse magnetic (TM) polarization.

In some embodiments of the present invention, the highest energy level of extractor 316 is lower than the intermediate level of region 314 (but above the ground state S). These embodiments are useful for collecting charge carriers that are excited to the intermediate level. For example, these embodiments are useful when it is desired to detect light which is polarized in a transverse electric (TE) polarization. These embodiments are advantageous over traditional QWIP and QCD system which are only capable of detecting TE polarization since in these systems the in-plane excitations are undetectable.

Reference is now made to FIG. 3F, which is a schematic illustration of the conduction band energy levels of a period of light detector 16, in embodiments of the invention in which detector 16 comprises an alloy extractor QCD. These embodiments are similar to the embodiments described above with respect to FIGs. 3A and 3C, except the multiple QW extractor 106 is replaced by a relatively thick alloy extractor layer. In some embodiments of the present invention the alloy extractor layer is made of Al _x Gai- _x N, where x is selected to provide a predetermined internal field that effects a V-shaped potential in the extractor. The alloy layer is optionally and preferably selected to support a plurality of bound states (for example, at least 5 or at least 5 or at least 6 or at least 7 or at least 8 or at least 9 or at least 10 bound states). Some of the excited states are preferably in close resonance with the excited state of the active QW. The thickness of the alloy extractor is optionally and preferably selected to provide an energy separation between the ground state of the extractor and that of the next period active QW above the LO-phonon energy. Representative thickness values suitable for the present embodiments include, without limitation, from about 10 nm to 20 nm, e.g. , about 15 nm. Upon intersubband absorption, photoexcited electrons dominantly tunnel through the thinner barrier on the right side of the active QW. Electrons transferred in the extractor experience multiple parallel relaxation channels via LO-phonon emission between the bound states towards the ground state of the extractor. The electrons then scatter to the ground state of the active QW of the next period.

Reference is now made to FIG. 4 which is a schematic illustration of image sensor 10 in embodiments of the invention in which image sensor 10 comprises two or more types of active pixels cells. In the schematic illustration of FIG. 4, which is not to be considered as limiting, sensor 10 comprises two types of active pixel cells, shown as cells 12 and cells 40. Each type is constructed for absorption of light within a different wavelength range, so that the dynamic range of sensor 10 is significantly improved. In some embodiments of the present invention both types of cells are made of the same material systems except that they are constructed to absorb light at different wavelengths. For example, both types of cells can comprise QCDs as further detailed hereinabove wherein the layer thicknesses of the QCDs of cells 12 are selected for absorption of light within a first wavelength range, and the layer thicknesses of the QCDs of cells 40 are selected for absorption of light within a second wavelength range. Also contemplated are embodiments in which each type of cells is made of a different material system. For example, cells 12 can comprise QCDs as further detailed hereinabove, while cells 40 can comprise a photodiode, such as, but not limited to, a silicon photodiode, and a processing circuit made of a material system that is compatible or the same as the material system from which the photodiode is made. In the latter case, the substrate can also be made of a material system that is compatible or the same as the material system from which the photodiode is made, so that it is not necessary for cells 40 to occupy a cavity since there is no lattice mismatch.

Reference is made to FIG. 5 which is a schematic illustration of an imaging system 500, according to some embodiments of the present invention. System 500 comprises an image sensor, such as, but not limited to, image sensor 10 which generates electrical current in response to light and a processing circuit 504 which generates an image based on the generated current. Optionally, system 500 operates in the infrared domain so as to allow, e.g. , thermal imaging. System 500 can be mounted on a mobile device, in which case processing circuit 504 can be the part of the circuit of the mobile device. Representative examples of mobile devices suitable for the present embodiments including, without limitation, a cellular phone, a smartphone, a tablet device, a mobile digital camera, a wearable camera, a personal computer, a laptop, a portable media player, a portable gaming device, a portable digital assistant device, and a portable navigation device.

According to some embodiments of the present invention there is provided a method of fabricating an image sensor. The method comprises forming on a substrate a plurality of signal processing circuits, wherein each signal processing circuit is formed in a predefined area of a pixel cell. The method continues by monolithically growing on the substrate a light detector for each signal processing circuit. The light detectors are formed such that the signal processing circuit is in electronic communication with the light detector and is located in a region at least partially surrounding light detector. The light detector and the signal processing circuit are optionally and preferably formed of different material systems, and the lattice mismatch between the light detector and the substrate is at least 10%, as further detailed hereinabove. In some embodiments, the growth of light detectors is preceded by formation of photodiodes in at least some of the predefined pixel cell areas, wherein the photodiodes are made of the same or similar material systems as the signal processing circuit as further detailed hereinabove.

As used herein the term "about" refers to ± 10 %.

The word "exemplary" is used herein to mean "serving as an example, instance or illustration." Any embodiment described as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments and/or to exclude the incorporation of features from other embodiments.

The word "optionally" is used herein to mean "is provided in some embodiments and not provided in other embodiments." Any particular embodiment of the invention may include a plurality of "optional" features unless such features conflict.

The terms "comprises", "comprising", "includes", "including", "having" and their conjugates mean "including but not limited to".

The term "consisting of means "including and limited to". The term "consisting essentially of" means that the composition, method or structure may include additional ingredients, steps and/or parts, but only if the additional ingredients, steps and/or parts do not materially alter the basic and novel characteristics of the claimed composition, method or structure.

As used herein, the singular form "a", "an" and "the" include plural references unless the context clearly dictates otherwise. For example, the term "a compound" or "at least one compound" may include a plurality of compounds, including mixtures thereof.

Throughout this application, various embodiments of this invention may be presented in a range format. It should be understood that the description in range format is merely for convenience and brevity and should not be construed as an inflexible limitation on the scope of the invention. Accordingly, the description of a range should be considered to have specifically disclosed all the possible subranges as well as individual numerical values within that range. For example, description of a range such as from 1 to 6 should be considered to have specifically disclosed subranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6 etc., as well as individual numbers within that range, for example, 1, 2, 3, 4, 5, and 6. This applies regardless of the breadth of the range.

Whenever a numerical range is indicated herein, it is meant to include any cited numeral (fractional or integral) within the indicated range. The phrases "ranging/ranges between" a first indicate number and a second indicate number and "ranging/ranges from" a first indicate number "to" a second indicate number are used herein interchangeably and are meant to include the first and second indicated numbers and all the fractional and integral numerals therebetween.

It is appreciated that certain features of the invention, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the invention, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable subcombination or as suitable in any other described embodiment of the invention. Certain features described in the context of various embodiments are not to be considered essential features of those embodiments, unless the embodiment is inoperative without those elements. Various embodiments and aspects of the present invention as delineated hereinabove and as claimed in the claims section below find experimental support in the following examples.

EXAMPLES

Reference is now made to the following examples, which together with the above descriptions illustrate some embodiments of the invention in a non limiting fashion.

Example 1

CMOS imagers are ultra-cheap devices, with very small pixels, and large array formats (tens of megapixels). CMOS imagers are operating at the visible light spectrum and a little beyond (0.8-0.9 micrometer the maximum is the Si bandgap which is 1.1 microns).

The present example contemplates growth of GaN based layers on silicon wafers, with CMOS compatibility. The present example also contemplates use of QCD based on the GaN/Al(Ga)N material system. The advantage of using QCD is that, unlike other detectors that detect light at a wavelength governed by the separation of their conduction and valance bands, the wavelength detected by the QCD can be controlled by an appropriate selection of the quantum layer thickness of the QCD.

The group Ill-nitride heterostructures optionally and preferably have electronic and optical properties that are suitable for extending the functionality of semiconductor optoelectronics into spectral ranges currently inaccessible with other material systems. The conduction band offset provided by Ill-nitride heterostructures {e.g., about 1.75 eV for GaN/AIN) allows operating at relatively short wavelengths. In addition, group Ill-nitrides exhibit relatively short intersubband absorption recovery times (from about 150 fs to about 400 fs), due to the relatively strong electron-phonon interaction in these materials. This allows the image sensor of the present example to operate in the 0.1-1 Tbit/s bit-rate regime. The GaN/Al(Ga)N material system is also advantageous from the standpoint of wavelength selectability, speed, high power handling capabilities, temperature insensitivity and material hardness. Another advantage is that the thermal load of the detector of the present embodiments is relatively low which is particularly advantageous when the available cooling is limited.

The ladder of extractor states of the nitride based QCD of the present example can be achieved by engineering the internal field generated by a polar wurtzite III nitride heterostructures grown along the [0001] crystallographic axis. The presence of the internal field offers an additional degree of freedom, which can be exploited, for example, for fabricating multi-color QCDs. Also contemplated is an alloy extractor QCD, in which the multiple QW extractor region is replaced by an AlGaN thick layer, whose composition is chosen to engineer the internal field and achieve a graded potential.

In conventional QCDs, absorption occurs only for an electric field polarized perpendicular to the QW layers (also known as TM polarization. In some situations, however, the light field is predominantly polarized in parallel to the absorbing layer. Thus, according to some embodiments of the present invention the QCD comprises a Ti/Au metallic nano-hole array or any other metamaterial structure integrated on top surface of the active region of the QCD. The metallic nano-hole array rotates the polarization of the incoming radiation in the near field and makes it compatible with the dipole selection rules of III- nitrides quantum- wells.

Due to its hexagonal crystal structure, GaN exhibits better material properties when grown on Si (111) with its hexagonal array of atoms rather than on other orientations of silicon such as the (100) orientation. For silicon CMOS, however, due to higher trap densities on the Si (111) orientation, the (100) orientation is preferred.

To address these different requirements, modified silicon on insulator (SOI) wafers were used as illustrated in FIG. 6. The (100) orientation is chosen for the surface silicon layer for ease of CMOS fabrication. The (111) orientation for GaN growth is chosen for the handle substrate to reduce thermal path for the GaN transistor. Consequently, GaN is grown in islands on the surface of the handle substrate. This arrangement also has the benefit of resulting in a near planar arrangement of the detector's surface with the CMOS surface, which aids interconnect formation. The processing circuit is a CMOS circuit formed in a (100) Si layer having resistivity of about lQcm. The substrate is a (111) Si substrate having resistivity of more than 1000 Qcm. A layer of Si0 ₂ , 0.2 micron in thickness, is formed on the (111) Si substrate to form a SOI structure. A (100) Si layer, 2 microns in thickness, is formed on the SOI wafer. The CMOS electronic is implemented on the (100) Si layer, and the QCD is grown in a cavity etched in the SOI structure down to the (111) Si substrate.

Preferably, the CMOS circuit is fabricated before the growth of GaN based QCD. Preferably, the CMOS is fabricated on a flat, virgin wafer with no group III-V materials present. This is advantageous since group III-V may cause wafer bow and pose a contamination risk to a silicon fabrication line. The growth of GaN based QCD can be, for example, by plasma molecular beam epitaxy.

Other processes for integrating a group III nitride light detector with a CMOS circuit are also contemplated. For example, both the QCD (e.g., GaN QCD) and the CMOS can be grown on a (111) Si substrate following modification of the CMOS process.

Example 2

Use of two-dimensional metallic holes arrays (MHAs) allows coupling of surface plasmons (SP) to the absorption region of the QCD. The generated SP is a TM mode thus exhibits a dominant electric field component normal to the surface that is the proper polarization for exciting the ISB resonance. The present Example shows experimentally and by simulation that plasmonic enhancement performance of a QCD integrated with top MHA depends on the direction of the incidence light: Front Illumination (FI) or Backside Illumination (BI). In both experiment and simulation, it is shown that BI considerably increases the light coupling strength compared with FI. The present Example also studies the dependence of the properties of the QCD on the temperature are studied in depth.

The study was performed on a simplified QCD structure. The QCD structure consisted of 40 active periods sandwiched between Si-doped AlGaN contact layers. The QCD structure was processed in the form of 700x700 μπι ² mesas, with top and bottom Ti/Al/Ti/Au metallic contact layers. The MHA on the mesa top surface was implemented and patterned with periodic holes using Electron-beam lithography. The diameter and periods of holes array were designed using finite difference time domain software (FDTD) to achieve a plasmon peak resonance that overlaps the ISB peak resonance. A schematic illustration of the device cross section with MHA on top is shown in FIG. 7A. Both FI and BI directions are illustrated showing the illumination experimental setup.

The simulated structure unit cell is illustrated shown in FIG. 7B. FIG. 8 A shows the photoresponse spectra at RT (zero bias) of the QCD under normal incidence FI and BI. The peak responsivity, at 1.82 μπ at room temperature, increases from 1.77 to 2.72 mA/W by changing the light direction. Figure 8B shows the FDTD simulated Ez-intensity enhancement spectrum. Taking into account that the electric field Ez can be coupled to QCD intersubband resonance, it is averaged over the detecting volume and divided by the averaged electric field intensity of the QCD without MHA. The photoresponse of the QCD at normal incidence, FI, as a function of temperature is shown in FIG. 9A. The photoresponse signal intensity at RT is 60% compared to 40 K and the peak energy position remains almost without shift. FIG. 9B shows DJ* (Johnson noise limited detectivity) as a function of temperature for the two different illumination types.

Although the invention has been described in conjunction with specific embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art. Accordingly, it is intended to embrace all such alternatives, modifications and variations that fall within the spirit and broad scope of the appended claims.

All publications, patents and patent applications mentioned in this specification are herein incorporated in their entirety by reference into the specification, to the same extent as if each individual publication, patent or patent application was specifically and individually indicated to be incorporated herein by reference. In addition, citation or identification of any reference in this application shall not be construed as an admission that such reference is available as prior art to the present invention. To the extent that section headings are used, they should not be construed as necessarily limiting. REFERENCES

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