Title:
IMAGING DEVICE AND ELECTRONIC EQUIPMENT
Document Type and Number:
WIPO Patent Application WO/2021/001719
Kind Code:
A1
Abstract:
The present invention relates to a high-performance imaging device that can be manufactured in a small number of steps. In the present invention: a first stacked body is formed, said stacked body being obtained by stacking a circuit, in which a transistor (hereinafter "OS transistor") having a metal oxide is provided in a channel formation region, atop a circuit having a silicon transistor; a second stacked body is formed, said second stacked body being obtained by providing an OS transistor atop a silicon photodiode; and an electrical connection between the circuits is obtained by pasting together the layers of the first and second stacked bodies in which the OS transistors are provided. Using such a configuration makes it possible to eliminate a polishing step and a pasting step and to improve yield, even for a configuration in which a plurality of circuits with different functions or the like are stacked.
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Inventors:
NEGORO YUSUKE (JP)
YONEDA SEIICHI (JP)
YONEDA SEIICHI (JP)
Application Number:
PCT/IB2020/055844
Publication Date:
January 07, 2021
Filing Date:
June 22, 2020
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H01L21/8234; H01L21/8242; H01L27/06; H01L27/088; H01L27/108; H01L27/146; H01L29/786; H04N5/369
Domestic Patent References:
| WO2018116559A1 | 2018-06-28 | |||
| WO2019012370A1 | 2019-01-17 |
Foreign References:
| JP2016534557A | 2016-11-04 | |||
| JP2018011294A | 2018-01-18 | |||
| JP2010212668A | 2010-09-24 |
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