Title:
IMPROVED NOISE ISOLATION IN HIGH-SPEED DIGITAL SYSTEMS ON PACKAGES AND PRINTED CIRCUIT BOARDS (PCBS)
Document Type and Number:
WIPO Patent Application WO2008104501
Kind Code:
B1
Abstract:
Improved noise isolation for high-speed digitalsystemson packages and printed circuit boardsisprovided by the use of mixedalternating impedance electromagnetic bandgap (AI-EBG) structuresand a power islandconfigured to provide ultimatenoise isolation. A power island is surrounded by a plurality of mixed AI-EBG structures to provide a power distribution network. In this structure, the gap around the power island provides excellent isolation from DC to the first cavity resonant frequencywhich is determined by the size of the structure and dielectric material. OneAI-EBG structure provides excellent isolation from thefirst cavity resonant frequency of around 1.5GHzto 5 GHz. The otherAI-EBG structure provides excellent noise isolation from 5GHz to 10GHz. Through use of this novel configuration of AI-EBG structures,a combination effect of the hybrid AI-EBG structure provides excellent isolation far in excess of 10 GHz. The AI-EBG structure is a metallic-dielectric EBG structure that comprisestwo metallayers separated by a thin dielectric material(similar topower/ground planes in packages and PCBs). However, in the AI-EBG structure, only one ofthe metallayershas a periodic pattern which is preferably a two-dimensional rectangular lattice with each element consisting of a metal patch with four connecting metal branches.
Inventors:
CHOI JINWOO (US)
Application Number:
PCT/EP2008/052150
Publication Date:
December 04, 2008
Filing Date:
February 21, 2008
Export Citation:
Assignee:
IBM (US)
IBM UK (GB)
CHOI JINWOO (US)
IBM UK (GB)
CHOI JINWOO (US)
International Classes:
H05K1/02; H01Q15/00
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