IMPROVING CONFORMALITY OF OXIDE LAYERS ALONG SIDEWALLS OF DEEP VIAS

WIPO Patent Application WO/2011/112402

A3

A method for improving conformality of oxide layers along sidewalls of vias in semiconductor substrates includes forming a nitride layer over an upper surface of a semiconductor substrate and forming a via extending through the nitride layer and into the semiconductor substrate. The via may have a depth of at least about 50 μm from a top surface of the nitride layer and an opening of less than about 10 μm at the top surface of the nitride layer. The method also includes forming an oxide layer over the nitride layer and along sidewalls and bottom of the via. The oxide layer may be formed using a thermal chemical vapor deposition (CVD) process at a temperature of less than about 450°C, where a thickness of the oxide layer at the bottom of the via is at least about 50% of a thickness of the oxide layer at the top surface of the nitride layer.

HUA ZHONG QIANG (US)
HERNANDEZ MANUEL A (US)
LUO LEI (US)
SAPRE KEDAR (US)

PCT/US2011/026834

December 22, 2011

March 02, 2011

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APPLIED MATERIALS INC (US)
HUA ZHONG QIANG (US)
HERNANDEZ MANUEL A (US)
LUO LEI (US)
SAPRE KEDAR (US)

H01L21/316

US20040142562A1	2004-07-22
US4666556A	1987-05-19
US20030045124A1	2003-03-06

ERIK SLEECKX ET AL.: "A Conformal Oxide Liner for Through Silicon Vias by Pulsed SA-CVD Deposition", 216TH ECS MEETING, vol. 25, no. 8, 4 October 2009 (2009-10-04), VIENNA, pages 659 - 666

CATMULL, Kelvin, B. et al. (Two Embarcadero Center Eighth Floo, San Francisco CA, US)

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