Technical Field The present invention relates to an information processing apparatus which performs processing a program stored in a memory cartridge inserted into the information processing apparatus, and the related art.

Background Art A karaoke device with built-in microphone is described in Jpn. unexamined patent publication No. 2002-132509. A ROM (read only memory) provided in the karaoke apparatus with built-in microphone stores a warning message display program, and a memory cartridge which is inserted into the karaoke apparatus with built-in microphone stores a karaoke program. When the memory cartridge is not inserted, the warning message display program is mapped in an address area in the first manner, so that the warning message display program is started when switched on. On the other hand, when the memory cartridge is inserted, the warning message display program and the karaoke program are mapped in the address area in the second manner, so that the karaoke program is started when switched on. In this way, it is possible to start different programs depending on whether or not the memory cartridge is inserted. The prior art is a technique for reading only karaoke program and karaoke data from the ROM provided in the memory cartridge when the memory cartridge is inserted. As has been discussed above, only one operation mode for when the memory cartridge is inserted is provided. Namely, there is only a mode to read from the memory cartridge and execute. However, it is possible to assume that the karaoke apparatus with built-in microphone write karaoke program and karaoke data in the memory cartridge. In this case, it is needed to implement two operation modes, i.e., in addition to above mentioned mode, a mode to write in the memory cartridge must be implemented.

Disclosure of Invention It is an object of the present invention to provide a information processing apparatus which can start different programs depending on whether or not a memory cartridge is inserted and also start different programs depending on the selected operation mode even though the memory cartridge is inserted, and the related techniques thereof. In accordance with a first embodiment of the present invention, an information processing apparatus comprises: a processor operable to execute one of a first boot program and a second boot program which is mapped in a first area in an address area when a power is turned on; a first memory where the first boot program is stored; a connector where a memory cartridge including a second memory storing the second boot program is inserted; and wherein said first memory is arranged in the first area when the memory cartridge is not inserted into said connector, wherein said first memory is arranged in a second area of the address area and the second memory is arranged in the first area when the memory cartridge is inserted into said connector and a first operation mode is selected, and wherein said first memory is arranged in the first area and the second memory is arranged in the second area when the memory cartridge is inserted into said connector and a second operation mode is selected. In accordance with this configuration, the first boot program which is mapped in the first area is executed first when the memory cartridge is not inserted. Also, the second boot program which is mapped in the first area is executed first when the memory cartridge is inserted in the first operation mode. As explained above, it is possible to start different programs depending on whether or not the memory cartridge is inserted. In addition, the first boot program which is mapped in the first area is executed first when the memory cartridge is inserted in the second operation mode. Therefore, it is possible to start different programs depending on the selected operation mode even though the memory cartridge is inserted. In accordance with a second embodiment of the present invention, an information processing apparatus comprises: a processor operable to execute one of a first boot program and a second boot program which is mapped in a first area in an address area when a power is turned on; a first memory where the first boot program is stored; a connector where a memory cartridge including a second memory storing the second boot program is inserted; and a connecting mechanism that connects a first signal line which provides a first enable signal from said processor with said first memory when the memory cartridge is not inserted into said connector; connects the first signal line with the second memory and also connects a second signal line which provides a second enable signal from said processor with the first memory when the memory cartridge is inserted into said connector in the first operation mode; and connects the first signal line with the first memory and also connects the second signal line with the second memory when the memory cartridge is inserted into said connector in the second operation mode; and wherein said processor activates the first enable signal when an address indicates the first area, and activates the second enable signal when the address indicates a second area of the address area. In accordance with this configuration, the first signal line which provides the first enable signal is connected to the first memory when the memory cartridge is not inserted. Then, the first enable signal is activated when the address indicates the first area. Therefore, the first boot program which is mapped in the first area is executed first when the memory cartridge is not inserted. The first signal line which provides the first enable signal is connected to the second memory when the memory cartridge is inserted in the first operation mode. Then, the first enable signal is activated when the address indicates the first area. Therefore, the second boot program which is mapped in the first area is executed first when the memory cartridge is inserted in the first operation mode. As described above, it is possible to start different programs depending on whether or not the memory cartridge is inserted. In addition, the first signal line which provides the first enable signal is connected to the first memory when the memory cartridge is inserted in the second operation mode. Then, the first enable signal is activated when the address indicates the first area. Therefore, the first boot program which is mapped in the first area is executed first when the memory cartridge is inserted in the second operation mode. Therefore, it is possible to start different programs depending on the selected operation mode even though the memory cartridge is inserted.

Brief Description Of Drawings The aforementioned and other features and objects of the present invention and the manner of attaining them will become more apparent and the invention itself will be best understood by reference to the following description of a preferred embodiment taken in conjunction with the accompanying drawings, wherein: Fig. IA is a view showing a connection condition of a karaoke apparatus with built-in microphone as an information processing apparatus and a personal computer in a writing mode in accordance with the embodiment of the present invention. Fig. IB is a view showing a connection condition of the karaoke apparatus with built-in microphone and a television monitor in a karaoke mode. Fig. 2A is a front view of the karaoke apparatus with built-in microphone . Fig. 2B is a back view of the karaoke apparatus with built-in microphone . Fig. 2C is a right side view of the karaoke apparatus with built-in microphone. Fig. 3 is a view showing the electrical construction of the karaoke apparatus with built-in microphone of Fig. 1. Fig. 4 is a view showing a connection condition of a processor and a main body ROM when entering the karaoke mode and the memory- cartridge is not inserted. Fig. 5 is a view showing a connection condition of the processor, the main body ROM and a cartridge ROM when entering the karaoke mode and the memory cartridge is inserted. Fig. 6 is a view showing a connection condition of the processor and the main body ROM when entering the writing mode and the memory cartridge is not inserted. Fig. 7 is a view showing a connection condition of the processor, the main body ROM and the cartridge ROM when entering the writing mode and the memory cartridge is inserted. Fig. 8 is an appearance view showing a configuration of a connector provided to the karaoke apparatus with built-in microphone and a configuration of the memory cartridge. Fig. 9 is a view showing a structure of the connector provided to the karaoke apparatus with built-in microphone and a structure of the memory cartridge. Fig. 10 is a descriptive view showing address space of the processor. Fig. 11 is a descriptive view showing a mapping condition in the address space when entering the karaoke mode and the memory cartridge is not inserted. Fig. 12 is a descriptive view showing a mapping condition in the address space when entering the karaoke mode and the memory cartridge is inserted. Fig. 13 is a descriptive view showing a mapping condition in the address space when entering the writing mode and the memory cartridge is inserted. Fig. 14 is a descriptive view showing a connection condition of the processor, a key matrix circuit and a USB controller in the karaoke mode . Fig. 15 is a descriptive view showing a connection condition of the processor, the key matrix circuit and the USB controller in the writing mode.

Best Mode for Carrying out The Invention In what follows, an embodiment of the present invention will be explained in conjunction with the accompanying drawings. Meanwhile, like references indicate the same or functionally similar elements throughout the respective drawings, and therefore redundant explanation is not repeated. Incidentally, hexadecimal numbers are followed by "h" for the sake of distinguishing from decimal numbers. Fig. IA is a view showing a connection condition in a writing mode between a karaoke apparatus 1 with built-in microphone as an information processing apparatus and a personal computer (referred as "PC" in the following description) 3 in accordance with the embodiment of the present invention. Fig. IB is a view showing a connection condition between the karaoke apparatus 1 with built-in microphone and a television monitor 7 in a karaoke mode. As illustrated in Fig. IA, the karaoke apparatus 1 with built-in microphone is connected to the PC3 by a USB (universal serial bus) cable 5. In the writing mode, the karaoke apparatus 1 with built-in microphone writes, in a memory cartridge 2 inserted into the karaoke apparatus 1, karaoke data as transmitted from PC3 via the USB cable 5. The karaoke data is, for example, data downloaded from a network 4 (to be explained) by the PC3. As illustrated in Fig. IB, the karaoke apparatus 1 with built-in microphone is connected to the television monitor 7 by an A/V (audio/visual) cable 9. In the karaoke mode, the karaoke apparatus 1 with built-in microphone executes a karaoke program stored in the memory cartridge 2 inserted thereto, then generates a video signal and an audio signal on the basis of the karaoke data, and transmits them to the television monitor 7 via the A/V cable 9. Consequently, pictures for karaoke (e.g., background, lyrics and so on) are displayed on the television monitor 7 and sounds (e.g., singing voice, karaoke music and so on) are output from a speaker (not shown) of the television monitor 7. Fig. 2A is a front view of the karaoke apparatus 1 with built-in microphone; Fig. 2B is a back view of the karaoke apparatus 1 with built-in microphone; and Fig. 2C is a right side view of the karaoke apparatus 1 with built-in microphone. As illustrated in Fig. 2A, the karaoke apparatus 1 with built-in microphone is provided with a microphone 11 at the top portion thereof. Also, a reset switch 13, a tempo control key 17, a volume control key 15, a cancel key 19, a echo mode selection key 21, a music selection/pitch control key 23, a voice effect mode selection key 27 and a decision key 25 are provided on the front side of the karaoke apparatus 1 with built-in microphone. The reset switch 13 is used for resetting a selected music number and so on. The tempo control key 17 consists of two switches. One is used for stepping up the playback speed (tempo) of karaoke music, and the other is used for slowing down the playback speed. The volume control key 15 consists of two switches. One is for turning up the sound volume of karaoke music, and the other is used for turning down the sound volume. The music selection/pitch control key 23 consists of two switches. They are used for incrementing and decrementing a music number, and also increasing and decreasing pitch i.e., musical interval of karaoke music by one. The echo mode selection key 21 is used for setting an echo time (delay time) in the echo mode. The voice effect mode selection key 27 is used for setting a voice effect mode 1, a voice effect mode 2 or a voice effect mode 3. The voice effect mode 1 is a mode where processing a voice to increase a frequency of an input voice so that a frequency of an output voice becomes higher. The voice effect mode 2 is a mode where processing a voice to decrease a frequency of an input voice so that a frequency of an output voice becomes lower. Furthermore, the voice effect mode 3 is a mode where processing a voice to continuously and repeatedly change (sweep) frequency of an output voice high and low. The cancel key 19 is a key to cancel tempo set by the tempo control key 17, volume of music set by the volume control key 15, a music number and pitch set by the music number selection/pitch control key 23, the echo mode set by the echo mode selection key 21, and the voice effect mode set by the voice effect mode selection key 27. The cancel key 19 is also used to suspend a music which is played. The decision key 25 is a key to enable tempo set by the tempo control key 17, volume of music set by the volume control key 15, a music number and pitch set by the music number selection/pitch control key 23, the echo mode set by the echo mode selection key 21, and the voice effect mode set by the voice effect mode selection key 27. The karaoke apparatus 1 with built-in microphone is provided with a LED (light emitting diode) 14 which is turned on when the power is on, and turned off when the power is off. When communicating with the PC3 via the USB cable 5 in the writing mode, the LED 14 flashes on and off. As illustrated in Fig. 2B, a slot 16 is formed on the back side of the karaoke apparatus 1 with built-in microphone. The slot 16 is provided with a connecter 76 (to be explained later) where the memory cartridge 2 can be detachably inserted. In addition, a battery box 20 is formed on the back side of the karaoke apparatus 1 with built-in microphone because the karaoke apparatus 1 is driven by a battery. As illustrated in Fig. 2C, a sliding-type mode selection switch 29 and a USB port 31 are provided on the right side of the karaoke apparatus 1 with built-in microphone. The USB cable 5 is connected to the USB port 31. The mode selection switch 29 also functions as a power switch. When the switch is positioned at the center, the power is off. When the switch is positioned at one end, the power is on and the karaoke mode is started. When the switch is positioned at the other end, the power is on and the writing mode is started. Fig. 3 is a view showing the electrical construction of the karaoke apparatus 1 with built-in microphone of Fig. 1. As illustrated in Fig. 3, the karaoke apparatus 1 with built-in microphone includes a processor 51, a ROM 53 (referred as "a main body ROM" in the following description), a bus 55, the microphone 11, the mode selection switch 29, a selector 61, a key matrix circuit 63, a USB controller 65, amplifiers 67 and 71, a mixer 69, an audio signal output terminal 73 and a video signal output terminal 75. The processor 51 includes various functional units such as a CPU (central processing unit), a graphics processor, a sound processor and a DMA controller, and also includes an A/D converter used for receiving an analog signal and an input/output control circuit for receiving input signals such as key operation signals and input signals from external devices and giving output signals to external devices. The CPU performs necessary calculation in response to the input signals and transmits the result to the graphics processor, the sound processor and so on. Therefore, the graphics processor and the sound processor perform image processing and audio processing in accordance with the result of the calculation. The bus 55 is connected to the processor 51. The main body ROM 53 mounted on a substrate (not shown) with the processor 51 and an OTPROM (one time programmable ROM: referred as a "cartridge ROM" in the following description) 77 housed in the memory cartridge 2 are connected to the bus 55. Consequently, it is possible to read a program and data from the main body ROM 53 and the cartridge ROM 77 and write data in the cartridge ROM 77 since the processor 51 can access the main body ROM 53 and the cartridge ROM 77 via the bus 55. When the karaoke mode is selected, the mode selection switch 29 outputs a mode selection signal "MS" set for high level to an I/O port (input and output port) of the processor 51 and the selector 61. On the other hand, when the writing mode is selected, the mode selection switch 29 outputs the mode selection signal "MS" set for low level to the I/O port of the processor 51 and the selector 61. In response to the mode selection signal "MS", the processor 51 executes a program corresponding to the selected operation mode . The selector 61 switches the connection of signal lines in accordance with whether or not the memory cartridge 2 is inserted and the operation mode. This will be explained later. The key matrix circuit 63 includes ten keys such as the tempo control key 17 consisting of two keys, the volume control key 15 consisting of two switches, the cancel key 19, the echo mode selection key 21, the music selection/pitch control key 23 consisting of two switches, the voice effect mode selection key 27 and the decision key 25. Five input signals for key scanning are provided from I/O ports of the processor 51 to the key matrix circuit 63, and two output signals are provided from the key matrix circuit 63 to I/O ports of the processor 51. In the karaoke mode, the following processing is performed. The voice signal from the microphone 11 is provided to an analog input port of the processor 51 and the mixer 69 via the amplifier 67. The analog audio signal which is a result of processing performed by the sound processor of the processor 51 is provided to the mixer 62 and mixed with the voice signal input from the microphone 11 via the amplifier 67, then output to the audio signal output terminal 73 via the amplifier 71. Also, the analog video signal which is a result of processing performed by the graphics processor of the processor 51 is output to the video signal output terminal 75. Since the A/V cable 9 is connected to the audio signal output terminal 73 and the video signal output terminal 75, the audio signal and the video signal are provided to the television monitor 7. In the writing mode, the following processing is performed. The USB controller 65 communicates with the PC3 via the USB cable 5 and obtains karaoke data. The USB controller 56 is controlled by the processor 51 via I/O ports. The processor 51 receives, via I/O ports, the karaoke data obtained by the USB controller 65 and writes it in the cartridge ROM 77 via the bus 55. Incidentally, the PC3 is connected to the network 4, and downloads karaoke data from a server (not shown) which is connected to the network 4. In what follows, a program and data stored in the main body ROM 53 and the cartridge ROM 77 will be explained. In the main body ROM 53, a boot program "BPl", warning message display programs "NPl" and "NP2", karaoke image data, karaoke music data, a writing control program and a USB control program are stored. The boot program "BPl" is a program which boots a system in the writing mode, or in the karaoke mode when the memory cartridge is not inserted into the karaoke apparatus 1. The warning message display program "NPl" is executed when the memory cartridge 2 is not inserted in the karaoke mode. Consequently, a warning message is displayed on the television monitor 7. The karaoke image data and the karaoke music data are data which is stored on the memory cartridge 2 and used for all music in common. The karaoke image data includes title image data, basic background image data, frame and icon data and font data, and the karaoke music data includes basic sound source data. The warning message display program λXNP2" is executed when the memory cartridge 2 is not inserted or the karaoke apparatus 1 with built-in microphone is not connected to the PC3 by the USB cable 5 but the writing mode is selected. Consequently, a warning message is displayed on the television monitor 7. The USB control program is a program which gives commands and controls the USB controller 65 in the writing mode. The write control program is a program for writing, in the cartridge ROM 77, a karaoke data which is obtained from the PC3 by the USB controller 65 in the writing mode. Incidentally, the boot program "BPl" starts the warning message display program NPl, or the warning message display program NP2, the USB control program and the write control program in accordance with the operation mode (the karaoke mode or the writing mode) . In the cartridge ROM 77, there is a blank area consisted of a plurality of banks and a written area. The blank area is an area where nothing is written when a user gets the memory cartridge 2 first (i.e., when shipped from a factory) . As a general rule, karaoke data of one song is written in one bank. However, it is possible to write karaoke data of one song in a certain number of banks. In this way, the karaoke data is written by banks. Also, since the cartridge ROM 77 is an OTPROM, it is possible to write karaoke data only in an unwritten bank. Namely, once karaoke data is written in a bank, the bank can not be written again. Further namely, it is possible to write only once. In the written area, the boot program "BP2", a karaoke program, common data, identification (ID) information of the cartridge 2, information of the possible number of songs to be written, a status table, capacity of the cartridge 2 and a cartridge name are already stored when a user gets the memory cartridge 2 first (i.e., when shipped from a factory) . The boot program "BP2" is a program which boots a system when the memory cartridge 2 is inserted in the karaoke mode. The karaoke program is a program which performs various processing such as sequence control, image display control, A/D conversion and audio processing and music playback control when the memory cartridge 2 is inserted in the karaoke mode. The common data is image data and music data and so on which are used in common regardless of kinds of music. The cartridge name is used for distinguishing kinds of memory cartridges 2. There are a memory cartridge 2 for karaoke, a memory cartridge 2 for game, and memory cartridges 2 for other purposes. Therefore, the cartridge name is stored in the memory cartridge 2 for distinguishing memory cartridges. The status table includes a plurality of status flags. One status flag corresponds to one bank. The status flag indicates a status of writing of corresponding bank. There are four statuses such as "un-written (blank)", "writing", "normal end of writing" and "error end of writing". In each bank constituting a blank area, karaoke data and index information are written. The karaoke data consists of background image data, music title image data, lyric data, musical score data and so on. The index information is information such as storage location information of the background image data, the music title image data, the lyric data and the musical score data which are written in the bank. Incidentally, even though the area where information can be written is called "blank area" in this embodiment, it will not be blank anymore once information such as karaoke data is written. The karaoke data, the common data and so on stored on the cartridge ROM 77, and the karaoke image data, the karaoke music data and so on stored on the main body ROM 53 are used for processing performed by the karaoke program. Next, the selector 61 will be explained. Fig. 4 is a view showing a connection condition between the processor 51 and the main body ROM 53 when the memory cartridge 2 is not inserted in karaoke mode. Incidentally, the cartridge ROM 77 drawn by dashed lines indicates that the memory cartridge 2 is not inserted. As illustrated in Fig. 4, a line "Ll" connected to a CEl output port of the processor 51 is connected to ports "a2" and "b2" of the selector 61. A line "L2" connected to a CΞ2 output port of the processor 51 is connected to a terminal 761b on the connecter side. A line "L3" connected to ports "al" and "bl" of the selector 61 is connected to a terminal 762b on the connecter side. A line "L4" connected to ports "Al" and "B2" of the selector 61 is connected to a terminal 763b on the connecter side. A line "L5" connected to ports "A2" and "Bl" of the selector 61 is connected to a CE input port of the main body ROM 53. A line "L8" connected to a CE input port of the cartridge ROM 77 is connected to the terminal 763b on the connecter side when the memory cartridge 2 is inserted. A line "L6" connected to a WE output port of the processor 51 is connected to a WE input port of the main body ROM 53 and a WE input port of the cartridge ROM 77 of the inserted memory cartridge 2. A line "L7" connected to an OE output port of the processor 51 is connected to an OE input port of the main body ROM 53 and an OE input port of the cartridge ROM 77 of the inserted memory cartridge 2. When a mode selection signal "MS" from the mode selection switch 29 indicates the karaoke mode, the selector 61 connects ports "bl" and "Bl", "b2" and "B2", "b3" and "B3" and "b4" and "B4", and disconnects ports "al" and "Al", "a2" and "A2", "a3" and "A3" and "a4" and "A4" (refer to Fig. 4 and Fig. 5) . On the other hand, when a mode selection signal "MS" from the mode selection switch 29 indicates the writing mode, the selector 61 connects ports "al" and "Al", "a2" and "A2", "a3" and "A3" and "a4" and "A4", and disconnects ports "bl" and "Bl", "b2" and "B2", "b3" and "B3" and "b4" and "B4"(refer to Fig. 6 and Fig. 7) . As illustrated in Fig. 4, in the case where the memory cartridge 2 is not inserted in the karaoke mode, a switch SWl is turned off, a switch SW2 is turned on, and the lines "Ll", "L4", "L3" and "L5" are connected. Consequently, a chip enable signal "CEl" output from the CEl output port is provided to the CE input port of the main body ROM 53. Therefore, in the case where the memory cartridge 2 is not inserted, the processor 51 activates the chip enable signal "CEl" and an output enable signal "OE" which is output from the OE output port, then reads a program and data from the main body ROM 53, and executes the boot program "BPl" and the warning message display program "NPl" when the karaoke mode is selected by the mode selection switch 29 and the power is turned on. Fig. 5 is a view showing a connection condition of the processor 51, the main body ROM 53 and the cartridge ROM 77 when the memory cartridge 2 is inserted in the karaoke mode. As illustrated in Fig. 5, in the case where the memory cartridge 2 is inserted in the karaoke mode, a switch "SWl" is turned on, a switch "SW2" is turned off, and the lines "Ll", "L4" and "L8" are connected. Consequently, the chip enable signal "CEl" is provided to the CE input port of the cartridge ROM 77. Therefore, in the case where the memory cartridge 2 is inserted, the processor 51 activates the chip enable signal "CEl" and an output enable signal "OE", then reads a program and data from the cartridge ROM 77, and executes the boot program "BP2" and the karaoke program when the karaoke mode is selected by the mode selection switch 29 and the power is turned on. On the other hand, since the lines "L2", "L3" and "L5" are connected, the chip enable signal "CE2" output from the CE2 output port is given to the CE input port of the main body ROM 53. Therefore, when the memory cartridge 2 is inserted, the processor 51 activates the chip enable signal "CE2" and the output enable signal "OE" so that the processor 51 can read data from the main body Rom 53. Fig. 6 is a view showing a connection condition between the processor 51 and the main body ROM 53 when, the memory cartridge 2 is not inserted in the writing mode. Incidentally, the cartridge ROM 77 drawn with dashed lines indicates that the memory cartridge 2 is not inserted. As illustrated in Fig. 6, in the case where the memory cartridge 2 is not inserted in the writing mode, a switch "SWl" is turned off, a switch "SW2" is turned on, and the lines "Ll" and "L5" are connected. Consequently, the chip enable signal "CEl" is given to the CE input port of the main body ROM 53. Therefore, in the case where the memory cartridge 2 is not inserted, the processor 51 activates the chip enable signal "CEl" and an output enable signal "OE", then reads a program and data from the main body ROM 53, and executes the boot program "BPl" and the warning message display program "NP2" when the writing mode is selected by the mode selection switch 29 and the power is turned on. Fig. 7 is a view showing a connection condition of the processor 51, the main body ROM 53 and the cartridge ROM 77 when the memory cartridge 2 is inserted in the writing mode. As illustrated in Fig. 7, in the case where the memory cartridge 2 is inserted in the writing mode, a switch "SWl" is turned on, a switch "SW2" is turned off, and the lines "Ll" and "L5" are connected. Consequently, the chip enable signal "CEl" is given to the CE input port of the main body ROM 53. Therefore, in the case where the memory cartridge 2 is inserted, the processor 51 activates the chip enable signal "CEl" and an output enable signal "OE", then reads a program and data from the main body ROM 53, and executes the boot program "BPl" and the write control program, the USB control program and the warning message display program "NP2" when the writing mode is selected by the mode selection switch 29 and the power is turned on. On the other hand, since the lines «L2", "L3", "L4" and "L8" are connected, the chip enable signal "CE2" output from the CE2 output port is given to the CE input port of the cartridge ROM 77. Therefore, when the memory cartridge 2 is inserted, the processor 51 activates the chip enable signal "CE2" and a write enable signal "WE" so that the processor 51 can write karaoke data in a blank bank of the cartridge ROM 77. Fig. 8 is an appearance view showing a configuration of the connector 76 provided to the slot 16 of the karaoke apparatus 1 with built-in microphone and a configuration of the memory cartridge 2. Fig. 9 is a view showing a structure of the connector 76 provided to the karaoke apparatus 1 with built-in microphone and a structure of the memory cartridge 2. As illustrated in Fig. 8 and Fig. 9, a substrate 86b is secured at the bottom side housing 86a of the memory cartridge 2. A plurality of cartridge terminals 86c, 86c, ... are formed in the width direction on surface of the substrate 86b. The two cartridge terminals 861c and 862c located at the center of the substrate 86b in width direction are connected with each other and function as the switch SWl. On the other hand, an insertion portion 76a which is long in the width direction is formed so that the front edges of the bottom side housing 86a and the substrate 86b can be inserted. In the inner side of the insertion portion 76a, a plurality of connector terminals 76b, 76b, ... are formed in the width direction. As can be seen in Fig. 9, each connector terminal 76b touches firmly with the upper side housing 76c at the appropriate position in length direction, and is secured at this position. The connector terminals 76b is bent from the upper housing 76c toward the insertion portion 76a, and again bent toward the upper housing 76c. A plurality of rectangular apertures are formed in the width direction above the insertion 76a, and the one end tip of each connector terminal 76b is exposed from the corresponding aperture. A piece of metal is attached across two apertures at the appropriate position at the center of the connector 76 in width direction, and functions as the switch "SW2". The connecter terminals 762b and 763b exposed from the two apertures are electrically connected by the switch "SW"2 when there is not external force (i.e., the memory cartridge 2 is not inserted) . When the end edge portions of the substrate 86b and the bottom housing 86a are inserted into the insertion portion 76a, each connector terminal 76b is uplifted by the bottom housing 86a and the substrate 86b and brought into contact with the corresponding cartridge terminal 86c on the substrate 86b. At this time, the connector terminals 761b and 762b are brought into contact with the switch "SWl". Consequently, the connector terminals 761b and 762b are short-circuited. On the other hand, the connector terminals 762b and 763b are detached with the switch "SW2". Consequently, the connector terminals 762b and 763b are in the opened state. Incidentally, the connector terminals 762b and 763b have contact with the cartridge terminals 862c and 863c. However, since the cartridge terminals 862c and 863c are in the opened state, the connector terminals 762b and 763b are not short-circuited. Next, a mapping condition in the address space will be explained. Fig. 10 is a descriptive view showing the address space of the processor 51. As illustrated in Fig. 10, the chip enable signals "CEl" and "CE2" are output corresponding to the different address value. Namely, when upper 8 bits of the address value indicates any of "0Oh" to "3Fh" and lower 16 bits of the address value indicates "FFFFh" to "800Oh", or when upper 8 bits of the address value indicates any of "8Oh" to "BFh", the chip enable signal "CEl" is activated. On the other hand, when upper 8 bits of the address value indicates any of "6Oh" to "7Fh" and lower 16 bits of the address value indicates "FFFFh" to "800Oh", or when upper 8 bits of the address value indicates any of "EOh" to "FFh", the chip enable signal "CE2" is activated. Fig. 11 is a descriptive view showing a mapping condition in the address space when the memory cartridge 2 is not inserted in the karaoke mode. As illustrated in Fig. 11, when memory cartridge 2 is not inserted in the karaoke mode, the main body ROM 53 is arranged in the address space where upper 8 bits indicates "00h" to "3Fh" and lower 16 bits indicates "FFFFh" to "8000h", and the address space where upper 8 bits indicates "8Oh" to "BFh" and lower 16 bits indicates "FFFFh" to "000Oh". This is because the CEl output port of the processor 51 is connected to the CE input port of the main body ROM 53 when the memory cartridge 2 is not inserted in the karaoke mode while the chip enable signal "CEl" is activated when the address indicates above mentioned value (refer to Fig. 4) . Namely, in this case, the main body ROM 53 is activated by the chip enable signal "CEl". The processor 51 starts accessing from an address where upper 8 bits is "0Oh" when the power is turned on. More specifically, when the power is turned on, the processor 51 accesses addresses "OOFFFC" and "OOFFFD", and executes the program mapped in the position indicated by the two bytes. Since the boot program "BPl" is mapped in the position which is indicated by the two bytes (the addresses "OOFFFC" and "OOFFFD") , the boot program "BPl" is executed first in the case where the power is turned on when the memory cartridge 2 is not inserted in the Karaoke mode. Fig. 12 is a descriptive view showing a mapping condition in the address space when the memory cartridge 2 is inserted in the karaoke mode. As illustrated in Fig. 12, when memory cartridge 2 is inserted in the karaoke mode, the cartridge ROM 77 is arranged in the address space where upper 8 bits indicates "0Oh" to "3Fh" and lower 16 bits indicates "FFFFh" to "8000h", and the address space where upper 8 bits indicates "80h" to "BFh" and lower 16 bits indicates "FFFFh" to "000Oh". This is because the CEl output port of the processor 51 is connected to the CE input port of the cartridge ROM 77 when the memory cartridge 2 is inserted in the karaoke mode while the chip enable signal "CEl" is activated when the address indicates above mentioned value (refer to Fig. 5) . Namely, in this case, the cartridge ROM 77 is activated by the chip enable signal "CEl". Also, the main body ROM 53 is arranged in the address space where upper 8 bits indicates "6Oh" to "7Fh" and lower 16 bits indicates "FFFFh" to "800Oh", and the address space where upper 8 bits indicates "EOh" to "FFh" and lower 16 bits indicates "FFFFh" to "000Oh". This is because the CE2 output port of the processor 51 is connected to the CE input port of the main body ROM 53 when the memory cartridge 2 is inserted in the karaoke mode while the chip enable signal "CE2" is activated when the address indicates above mentioned value (refer to Fig. 5) . Namely, in this case, the main body ROM 53 is activated by the chip enable signal "CE2". As explained above, when the power is turned on, the processor 51 accesses addresses "OOFFFC" and "OOFFFD", and executes the program mapped in the position indicated by the two bytes. Since the boot program "BP2" is mapped at the position which is indicated by the two bytes (the addresses "OOFFFC" and "OOFFFD") , the boot program "BP2" is executed first in the case where the power is turned on when the memory cartridge 2 is inserted in the Karaoke mode . As has been discussed above, since the mapping conditions of the address space are different depending on whether or not the memory cartridge 2 is inserted in the Karaoke mode, it is possible to appropriately execute each program of the main body ROM 53 and the cartridge ROM 77 depending on whether or not the memory cartridge 2 is inserted. Fig. 13 is a descriptive view showing a mapping condition in the address space when the memory cartridge 2 is inserted in the writing mode. As illustrated in Fig. 13, when the memory cartridge 2 is inserted in the writing mode, the main body ROM 53 is arranged in the address space where upper 8 bits indicates "0Oh" to "3Fh" and lower 16 bits indicates "FFFFh" to "800Oh", and the address space where upper 8 bits indicates "8Oh" to "BFh" and lower 16 bits indicates "FFFFh" to "000Oh". This is because the CEl output port of the processor 51 is connected to the CE input port of the main body ROM 53 when the memory cartridge 2 is inserted in the writing mode while the chip enable signal "CEl" is activated when the address indicates above mentioned value (refer to Fig. 7) . Namely, in this case, the main body ROM 53 is activated by the chip enable signal "CEl". Also, the cartridge ROM 77 is arranged in the address space where upper 8 bits indicates "6Oh" to "7Fh" and lower 16 bits indicates "FFFFh" to "800Oh", and the address space where upper 8 bits indicates "EOh" to "FFh" and lower 16 bits indicates "FFFFh" to "000Oh". This is because the CE2 output port of the processor 51 is connected to the CE input port of the cartridge ROM 77 when the memory cartridge 2 is inserted in the writing mode while the chip enable signal "CE2" is activated when the address indicates above mentioned value (refer to Fig. 7) . Namely, in this case, the cartridge ROM 77 is activated by the chip enable signal "CE2". As explained above, the processor 51 accesses the address "00FFFC" and "00FFFD" when the power is turned on, and executes a program mapped at the position indicated by the two bytes. Since the boot program "BPl" is mapped at the position indicated by the two bytes (the addresses "OOFFFC" and "OOFFFD"), the boot program "BPl" is executed first when the power is turned on when the memory cartridge 2 is inserted in the writing mode. As is clear from above description, each program stored in the main body ROM 53 and the cartridge ROM 77 is executed properly- depending on the operation mode (the karaoke mode or the writing mode) when the memory cartridge 2 is inserted. On the other hand, in the case where the memory cartridge 2 is not inserted in the writing mode, since the main body ROM 53 is activated by the chip enable signal "CEl" (refer to Fig. 6) , the main body ROM 53 is arranged in the same way as Fig. 11. Since the processor 51 starts to access from the address where upper 8 bits indicates "0Oh", the boot program "BPl" is executed first if the power is turned on when the memory cartridge 2 is not inserted in the writing mode. Next, the method of dealing with the case where the number of the I/O ports of the processor 51 is not enough. Fig. 14 is a descriptive view showing a connection condition of the processor 51 and the key matrix circuit 63 and the USB controller 65 in the karaoke mode. As illustrated in Fig. 14, a line "L9" which provides one output signal from the key matrix circuit 63 is connected to the port "b3" of the selector 61. A line "LlO" which provides the other output signal from the key matrix circuit 63 is connected to the port "b4" of the selector 61. A line "LlI" connected to the port "B3" is connected to an I/O port of the processor 51 and the port "a3" of the selector 61. A line "L12" connected to the port "B4" is connected to an I/O port of the processor 51. A line "L13" connected to the port "A3" is connected to a CS input port of the USB controller 65. The connection of other lines "Ll" to "L8" and an operation of the selector 61 are same as Fig. 4. In the case where the memory cartridge 2 is inserted in the karaoke mode, the lines "L9" and "LlI", and the lines "LlO" and "L12" are connected by the selector 61. Therefore, the processor 51 can receive the two signals from the key matrix circuit 63 via the I/O ports in the karaoke mode. Fig. 15 is a descriptive view showing a connection condition of the processor 51 and the key matrix circuit 63 and the USB controller 65 in the writing mode. As illustrated in Fig. 15, the selector 61 disconnects the lines "L9" and "LlI" and the lines "LlO" and "L12" when the memory cartridge 2 is inserted in the writing mode. Therefore, the two output signals from the key matrix circuit 63 are not input to the I/O ports of the processor 51. On the other hand, the lines "L13" and "LlI" are connected by the selector 61. Therefore, the processor 51 can provide a chip select signal "CS" to the USB controller 65 via the I/O port connected to the line "LIl", and activate the USB controller 65. As has been discussed above, by switching the port which the line "LIl" connected to the I/O port of the processor 51 is connected depending on the operation mode (the karaoke mode and the writing mode) , it is possible to prevent shortage of the I/O ports. Namely, it is possible to prevent shortage of the I/O ports by sharing the I/O port where the line "LIl" is connected between the one output signal from the key matrix circuit 63 and the chip select signal "CS" which is provided to the USB controller 65. As has been discussed above, in accordance with this embodiment, the main body ROM 53 is arranged as illustrated in Fig. 11 and the boot program "BPl" mapped at the position indicated by the two bytes (the address "OOFFFC" and "OOFFFD") is executed first when the memory cartridge 2 is not inserted. On the other hand, the cartridge ROM 77 is arranged as illustrated in Fig. 12 and the boot program "BP2" mapped at the position indicated by the two bytes (the address "OOFFFC" and "OOFFFD") is executed first when the memory cartridge 2 is inserted in the karaoke mode. As described above, it is possible to execute different programs depending on whether or not the memory cartridge 2 is inserted. In addition, the main body ROM 53 is arranged as illustrated in Fig. 13 and the boot program "BPl" mapped at the position indicated by the two bytes (the address "OOFFFC" and "OOFFFD") is executed first when the memory cartridge 2 is inserted in the writing mode. Therefore, it is possible to execute different programs depending on the operation mode even though the memory cartridge 2 is inserted. Incidentally, the present invention is not limited to the above embodiment, and a variety of variations and modifications may be effected without departing from the spirit and scope thereof, as described in the following exemplary modifications. (1) In above explanation, the memory cartridge 2 is provided with the OTPROM 77. However, the memory provided in the memory cartridge 2 is not limited thereto. For example, it is possible to provide a flash memory in the memory cartridge 2. (2) The karaoke apparatus 1 with built-in microphone has a function of auto power off (e.g., the power is turned off automatically after 15 minute of no operation) . However, the auto power off is not executed when the USB controller 65 drives by the power of the PC3. (3) In above explanation, since the karaoke program is stored in advance, only karaoke data is written in the writing mode. However, it is not limited thereto, and a program is also possible to be written. In addition, it is not limited to data and program concerning karaoke to be written. Any data and program, for example, game program and game data, can be written in the cartridge ROM 77. (4) In above explanation, the karaoke data is written to the cartridge ROM 77 via the USB controller 65, the processor-51 and the bus 55. Alternatively, it is possible to provide a DMA controller and connect the DMA controller and the USB controller 65 to the bus 55 so that the karaoke data obtained by the USB controller 65 can be written by the DMA controller without involving the processor 51. (5) In above explanation, the warning message display program "NP2", the write control program and the USB control program are stored on the main body ROM 53. Alternatively, it is possible to store these programs in the written area of the cartridge ROM 77. In this case, the main body ROM 53 is arranged as illustrated in Fig. 11 when the memory cartridge 2 is not inserted in the writing mode. Therefore, the connection condition is as illustrated in Fig. 4. On the other hand, the main body ROM 53 and the cartridge ROM 77 are arranged as illustrated in Fig. 12 when the memory cartridge 2 is inserted in the writing mode. Therefore, the connection condition is as illustrated in Fig. 5. The invention has been described in detail above based on the embodiment, but it will be obvious to those skilled in the art that the invention is not limited to the embodiment described in the present application. The invention can be embodied in modified and changed modes without departing from the spirit and scope of the invention as defined by the appended claims. Accordingly, the description of the invention is intended for purposes of illustration and is in no way intended to limit the invention.