Title:
INFORMATION PROCESSING DEVICE HAVING BRANCHING PREDICTION MISTAKE RECOVERY MECHANISM
Document Type and Number:
WIPO Patent Application WO/2008/029450
Kind Code:
A1
Abstract:
When a load command is issued before a branching command to cause a cache mistake
and the branching command is a conditional branching depending on a value loaded
by the load command, the loading of the value is delayed by the cache mistake, which
causes a delay of decision of the branching direction of the branching command.
The information processing device includes: cache mistake detection means
for detecting a cache mistake of a load command; and command issuance stop means
used when a conditional branching command following the load instruction in
which a cache mistake has been detected by the cache mistake detection means has
no branching detection decided upon execution, for stopping issuance of a command
subsequent to the branching command. Thus, it is possible to eliminate the time
for cancelling the issuance command caused by a branching prediction mistake
and conceal the penalty by the branching prediction mistake in the wait time by
the cache mistake.
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Inventors:
HIKICHI, Toru (1-1 Kamikodanaka 4-chome, Nakahara-ku, Kawasaki-sh, Kanagawa 88, 2118588, JP)
Application Number:
JP2006/317562
Publication Date:
March 13, 2008
Filing Date:
September 05, 2006
Export Citation:
Assignee:
FUJITSU LIMITED (1-1 Kamikodanaka 4-chome, Nakahara-ku Kawasaki-sh, Kanagawa 88, 2118588, JP)
富士通株式会社 (〒88 神奈川県川崎市中原区上小田中４丁目１番１号 Kanagawa, 2118588, JP)
富士通株式会社 (〒88 神奈川県川崎市中原区上小田中４丁目１番１号 Kanagawa, 2118588, JP)
International Classes:
G06F9/38; G06F12/08; G06F9/38; G06F12/08
Attorney, Agent or Firm:
OSUGA, Yoshiyuki (3rd Fl, Nibancho Bldg.8-20, Nibancho, Chiyoda-k, Tokyo 84, 1020084, JP)
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