Title:
INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND STORAGE MEDIUM
Document Type and Number:
WIPO Patent Application WO/2022/064828
Kind Code:
A1
Abstract:
The present invention provides an information processing device which speeds up detection of stencil locations in a program. An information processing device 100 according to the present disclosure comprises: a detection unit 120 which detects a stencil candidate in the program on the basis of characteristics of the program description; and a specification unit 140 which specifies said stencil candidate as a stencil location in the case when a module applicable to the detected stencil candidate exists in a stencil library.
Inventors:
KITAGAWA TAKEHARU (JP)
Application Number:
PCT/JP2021/027109
Publication Date:
March 31, 2022
Filing Date:
July 20, 2021
Export Citation:
Assignee:
NEC CORP (JP)
International Classes:
G06F8/41; G06F17/16
Foreign References:
| JP2020061168A | 2020-04-16 |
Other References:
NOMURA TATSUO, MARUYAMA NAOYA, ENDO TOSHIO, MATSUOKA SATOSHI: "A Code Generation Framework for Stencil Computations on Large Scale GPU Clusters", IPSJ SIG TECHNICAL REPORT, vol. 2010-HPC-128-7, 15 February 2015 (2015-02-15), JP , pages 1 - 9, XP055926691, ISSN: 1884-0930
MITSURU IKEI: "Design of PGAS language run-time system for multi-node manycore processor for efficient data parallel stencil calculation", JOURNAL OF ELECTRONIC INFORMATION AND COMMUNICATION SOCIETY, vol. J99-D, no. 2, 1 February 2016 (2016-02-01), JP , pages 138 - 151, XP009535449, ISSN: 1881-0225, DOI: 10.14923/transinfj.2015JDP7061
SRIRAM KRISHNAMOORTHY ; MUTHU BASKARAN ; UDAY BONDHUGULA ; J. RAMANUJAM ; ATANAS ROUNTEV ; P SADAYAPPAN: "Effective automatic parallelization of stencil computations", ACM SIGPLAN NOTICES, vol. 42, no. 6, 10 June 2007 (2007-06-10), US , pages 235 - 244, XP058396239, ISSN: 0362-1340, DOI: 10.1145/1273442.1250761
MITSURU IKEI: "Design of PGAS language run-time system for multi-node manycore processor for efficient data parallel stencil calculation", JOURNAL OF ELECTRONIC INFORMATION AND COMMUNICATION SOCIETY, vol. J99-D, no. 2, 1 February 2016 (2016-02-01), JP , pages 138 - 151, XP009535449, ISSN: 1881-0225, DOI: 10.14923/transinfj.2015JDP7061
SRIRAM KRISHNAMOORTHY ; MUTHU BASKARAN ; UDAY BONDHUGULA ; J. RAMANUJAM ; ATANAS ROUNTEV ; P SADAYAPPAN: "Effective automatic parallelization of stencil computations", ACM SIGPLAN NOTICES, vol. 42, no. 6, 10 June 2007 (2007-06-10), US , pages 235 - 244, XP058396239, ISSN: 0362-1340, DOI: 10.1145/1273442.1250761
Attorney, Agent or Firm:
KITAJIMA Hiroshi et al. (JP)
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