INFORMATION PROCESSING DEVICE - RENESAS TECH CORP

Title:

INFORMATION PROCESSING DEVICE

Document Type and Number:

WIPO Patent Application WO/2010/029682

Kind Code:

A1

Abstract:

It is possible to execute a bit operation without lowering the bus performance. An information processing device (10) includes CPUs (101, 102) which can fetch and execute a command and peripheral modules (M1, M2, M3) each having a built-in register which can be rewritten by the CPUs and connected to the CPUs by a bus. The CPUs have a function to issue a bus command for instructing a write operation in the bit unit into the registers contained in the peripheral modules so as to execute the bit operation command fetched by the CPUs. When the bus command is issued, the peripheral modules execute the write operation in the bit unit into the registers. Thus, after the bus command is issued, the CPUs need not lock the bus. That is, it is possible to execute the bit operation without lowering the bus performance.

Inventors:

NAKAYA HIROAKI (JP)
YAMADA TETSUYA (JP)
KATO NAOKI (JP)

Application Number:

PCT/JP2009/003710

Publication Date:

March 18, 2010

Filing Date:

August 04, 2009

Export Citation:

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Assignee:

RENESAS TECH CORP (JP)
NAKAYA HIROAKI (JP)
YAMADA TETSUYA (JP)
KATO NAOKI (JP)

International Classes:

G06F9/308

Foreign References:

JPH04353927A	1992-12-08
JPH04291641A	1992-10-15
JPH04241650A	1992-08-28
US20050177691A1	2005-08-11

Other References: