Title:
INSULATION FILM SEMICONDUCTOR DEVICE AND METHOD
Document Type and Number:
WIPO Patent Application WO2006052791
Kind Code:
A3
Abstract:
A semiconductor device and method of its manufacturing method are provided for realizing smaller low voltage transistors while maintaining the characteristics of high voltage transistors. A first transistor formation region is separated by selectively leaving first element-separating insulator film (2). A second transistor formation region is separated by selectively oxidized second element-separating insulator film (3). On the region separated by first element-separating insulator film (2), a first transistor (Tr1) having a first channel-formation region, first source/drain regions (12, 13, 14), and first gate-insulation film (16) with a first film thickness and first gate electrode (17) are formed. On the region separated by second element-separating insulator film (3), second transistors (Tr3, Tr4) having a second channel-formation region, second source/drain region (32, 41), second gate-insulation film (33, 42) with thickness thinner than the first film thickness, and a second gate electrode (34, 43) are formed.
Inventors:
OKUMURA YOICHI (JP)
Application Number:
PCT/US2005/040108
Publication Date:
December 07, 2006
Filing Date:
November 04, 2005
Export Citation:
Assignee:
TEXAS INSTRUMENTS INC (US)
OKUMURA YOICHI (JP)
OKUMURA YOICHI (JP)
International Classes:
H01L29/76; H01L21/762
Foreign References:
| US6894350B2 | 2005-05-17 | |||
| US5332913A | 1994-07-26 | |||
| US5181090A | 1993-01-19 |
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