INSULATION LAYER FORMATION METHOD, MEMBER WITH INSULATION LAYER, RESISTANCE MEASUREMENT METHOD AND JUNCTION RECTIFIER

WIPO Patent Application WO/2020/013304

A1

The present invention involves: a first step in which a surface treatment is applied to a base material to form thereon a high-resistance layer having high electric resistivity; a second step in which metal plating parts are formed on the base material that has undergone the first step in such a manner as to allow a high-resistance layer to be formed thereon; and a third process in which a high-resistance layer is formed on the base material that has undergone the second step.

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MICHIWAKI HIROSHI (JP)

PCT/JP2019/027619

January 16, 2020

July 11, 2019

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NEXT INNOVATION INC (JP)

C23C28/00; C25D11/36; H01B5/14; H01B13/00

WO2005017235A1

2005-02-24

JP2006233245A	2006-09-07
JP2013211322A	2013-10-10
JP2017116266A	2017-06-29
JP2009102688A	2009-05-14
JPS5466463A	1979-05-29
JPS52154070A	1977-12-21
JPH11189895A	1999-07-13
JPH02239683A	1990-09-21

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