Title:
INTEGRATED CIRCUIT, CHIP AND TERMINAL
Document Type and Number:
WIPO Patent Application WO/2023/173436
Kind Code:
A1
Abstract:
The embodiments of the present application relate to the technical field of circuits. Provided are an integrated circuit, a chip and a terminal, which can reduce a layout area occupied by a first inductor and a second inductor in an integrated circuit, thus reducing a layout area occupied by the integrated circuit. The integrated circuit comprises a first inductor and a second inductor, wherein the first inductor comprises a first coil, and the first coil is a loop provided with a first opening; the second inductor comprises a second coil and a third coil, which are connected in series, and the second coil is provided with a second opening; a magnetic field direction of the second coil is opposite to a magnetic field direction of the third coil; and the second coil and the third coil are nested in the first coil, and the first inductor is not in direct contact with the second inductor.
Inventors:
GUO WANYI (CN)
HAN KEFENG (CN)
GAO PENG (CN)
HAN KEFENG (CN)
GAO PENG (CN)
Application Number:
PCT/CN2022/081807
Publication Date:
September 21, 2023
Filing Date:
March 18, 2022
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
H01F27/29
Foreign References:
| US20120244802A1 | 2012-09-27 | |||
| US20200252036A1 | 2020-08-06 | |||
| US20200203060A1 | 2020-06-25 | |||
| US20080129434A1 | 2008-06-05 | |||
| CN111292934A | 2020-06-16 |
Attorney, Agent or Firm:
BEIJING RUN ZEHENG INTELLECTUAL PROPERTY LAW FIRM (CN)
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