Title:
INTEGRATED DICING DIE BONDING SHEET AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/138341
Kind Code:
A1
Abstract:
[Problem] To provide: an integrated dicing die bonding sheet which has excellent storage stability and stress mitigating properties, which does not exhibit problems such as cracking, chipping, or chip fly-off during dicing, and which has excellent production efficiency; and a method for producing a semiconductor device (including MEMS devices in particular) using the integrated dicing die bonding sheet. [Solution] Provided are: an integrated dicing die bonding sheet characterized by comprising a base film and a silicone adhesive sheet that has an adhesive surface to be adhered to a semiconductor wafer, wherein at a stage that is after dicing of the semiconductor wafer but before heating, the base film can be peeled from the silicone adhesive sheet at the interface thereof, and after the adhesive surface is heated in the range of 50-200°C, the peeling mode of the adhesive surface from another non-tacky base material changes to cohesive fracture, and permanent adhesiveness is exhibited; and the use of the integrated dicing die bonding sheet.
Inventors:
TODA NOHNO (JP)
KITAURA EIJI (JP)
SUTOH MANABU (JP)
KITAURA EIJI (JP)
SUTOH MANABU (JP)
Application Number:
PCT/JP2021/046121
Publication Date:
June 30, 2022
Filing Date:
December 14, 2021
Export Citation:
Assignee:
DOW TORAY CO LTD (JP)
International Classes:
C09J11/06; C09J7/35; C09J183/10; H01L21/301; H01L21/52
Domestic Patent References:
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