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Title:
AN INTEGRATED QUARTZ OSCILLATOR ON AN ACTIVE ELECTRONIC SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2008/027701
Kind Code:
A1
Abstract:
An oscillator having a quartz resonator, and a base wafer containing active electronics, wherein the quartz resonator is bonded directly to the base wafer and subsequently hermetically capped.

Inventors:
CHANG DAVID T (US)
Application Number:
PCT/US2007/075414
Publication Date:
March 06, 2008
Filing Date:
August 07, 2007
Export Citation:
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Assignee:
HRL LAB LLC (US)
KUBENA RANDALL L (US)
CHANG DAVID T (US)
International Classes:
H04R31/00
Foreign References:
US6750728B22004-06-15
US6114801A2000-09-05
JP2003318685A2003-11-07
Attorney, Agent or Firm:
GALLENSON, Mavis, S. et al. (5670 Wilshire Boulevard Ste. 210, Los Angeles California, US)
Download PDF:
Claims:
CLAIMS

What is claimed is:

1. A method for fabricating an oscillator, the method comprising: providing a first substrate having a cavity etched therein; providing a crystalline quartz substrate having a first major surface opposite a second major surface; bonding the quartz substrate to the first substrate wherein a portion the first major surface is over the cavity; thinning the quartz substrate along the second major surface; removing a portion of the quartz substrate to expose a portion of the first substrate and to define a quartz resonator; bonding the quartz resonator with a base wafer containing active electronics; and removing the first substrate, thereby releasing the quartz resonator.

2. The method of claim 1, wherein the base wafer comprises a member selected from the group consisting of Si, group III- V elements, and SiGe.

3. The method of claim 1, wherein the base wafer comprises: a dielectric layer comprising vias that electrically connect the active electronics with a plurality conductive pads supported by the dielectric layer.

4. The method of claim 3, wherein the quartz substrate comprises: a first surface opposite a second surface; at least one first electrode on the first surface; and at least one second electrode on the second surface.

5. The method of claim 4, wherein the quartz substrate further comprises at least one via connected to the at least one first electrode, wherein the at least one via is filled with a metal.

6. The method of claim 4, wherein the first and second electrodes are electrically connected to interconnect metal pads on the second surface of the quartz substrate.

7. The method of claim 6, wherein the bonding of the quartz substrate to the base wafer comprises bonding the plurality of conductive pads on the base wafer to the interconnect metal pads for the first and second electrode, thereby allowing a signal to flow between the first and second electrodes.

8. The method of claim 7, wherein the bonding is a metal-to-metal thermal compression bond performed at temperature below 300°C.

9. The method of claim 4, wherein the mass of the first or second electrodes is changed to adjust a resonant frequency.

10. The method of claim 4, wherein the second electrode is ablated to adjust a resonant frequency.

11. An oscillator comprising: a quartz resonator; and a base wafer containing active electronics, wherein the quartz resonator is bonded with the base wafer.

12. The oscillator of claim 11, wherein the base wafer further comprises at least one conductive pad electrically connected to the active electronics.

13. The oscillator of claim 12, wherein the quartz resonator comprises: a first surface opposite a second surface; at least one first electrode on the first surface; and at least one second electrode on the second surface.

14. The oscillator of claim 13, wherein the quartz substrate further comprises at least one via connected to the at least one first electrode, wherein the at least one via is filled with a metal.

15. The oscillator of claim 14, wherein the bond between the base substrate and the quartz resonator comprises a bond between the conductive pads on the base substrate and a first and second interconnect pads.

16. The oscillator of claim 15, wherein a resonant frequency is adjusted by trimming the thickness of the first or second electrode.

17. The oscillator of Claim 16, wherein the resonant frequency is adjusted by trimming the thickness of the second electrode before bonding to the base substrate while performing real-time monitoring of the resonant frequency using probes contacting the first and second interconnect pads on the quartz substrate.

18. The oscillator of Claim 16, wherein the resonant frequency is adjusted by trimming the first electrode after bonding to the base substrate.

19. The oscillator of Claim 11, wherein the quartz resonator is hermetically capped.

20. A method for fabricating an oscillator, the method comprising:

providing a first substrate having a cavity etched therein; providing a crystalline quartz substrate having a first major surface opposite a second major surface; bonding the quartz substrate to the first substrate wherein a portion the first major surface is over the cavity; thinning the quartz substrate along the second major surface; removing a portion of the quartz substrate to expose a portion of the first substrate and to define a quartz resonator; bonding the quartz resonator with a base wafer containing active electronics, and removing the first substrate, thereby releasing the quartz resonator, wherein the base wafer comprises: a dielectric layer containing vias that electrically connect the active electronics with a plurality conductive pads supported by the dielectric layer.

Description:

AN INTEGRATED QUARTZ OSCILLATOR ON AN ACTIVE ELECTRONIC SUBSTRATE

CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application claims the benefit of U.S. Provisional Application No. 60/836,600, filed on August 8, 2006, which is incorporated herein by reference in its entirety. This application is also related to U.S. Application No. 10/426,931, filed on April 30, 2003, which is incorporated herein by reference in its entirety and attached hereto following the last page of this description.

STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT [0002] The present invention was made with support from the United States Government under Grant number DAAB07-02-C-P613 awarded by Defense Advanced Project Agency (DARPA). The United States Government has certain rights in the invention.

FIELD [0003] The present invention relates to oscillators. More particularly, the present invention relates to quartz resonators being bonded directly to active electronics formed on a wafer to form an oscillator.

BACKGROUND [0004] Small, low power, and high performance (low vibration sensitivity, low temperature drift, and low phase noise) oscillators are needed for a number of GPS, radio, and radar systems. Furthermore, cell phones and computer boards also are in need of highly stable clock and timing references for analog and digital

processing. As phones and computer systems expand into multi-frequency operational modes, the need for multiple clock frequencies with low power requirements increases. This in turn increases the interest in small banks of low power oscillators that can replace higher power frequency synthesizers.

[0005] Typically, quartz-base oscillators are constructed using hybrid techniques. That is the quartz resonators are fabricated on a small single piece of quartz (typically about 1 inch square), tested, and mounted in a ceramic package with a surface mount circuit card using various epoxies containing conductive materials. The conductive epoxies used provide both mechanical and electrical connections to the resonator with low stress. Since no handle wafer is used in these fabrication processes, the resonators need to be thick enough so as not to break during the handling and mounting processes. Since the frequency is inversely dependent on the thickness for shear-mode devices, this means that frequencies above about 100 MHz (or quartz thicknesses below about 10 microns) have proved difficult to manufacture in this manner. In addition, for UHF operation, the resonator dimensions are significantly smaller than larger devices. This reduces the resonator's equivalent circuit parameters and increases the susceptibility of the circuit to stray capacitances. Typically, the intrinsic capacitance of UHF resonators (Co) is in 0.1 pf range, and this requires that parasitic capacitances are below about 0.01 pf in order for them to not affect the operation of the oscillator. Thus, there is needed to reduce the stray signals to manageable levels.

[0006] According to the present disclosure, it is possible to integrate a resonator with active electronics to form a small, low power, and high performance (low vibration sensitivity, low temperature drift, and low phase noise) oscillator with reduced stray signals.

BRIEF DESCRIPTION OF THE FIGURES [0007] Figure. 1 depicts an oscillator according to the present disclosure;

[0008] Fig. 2 depicts a circuit diagram of an oscillator feed back loop;

[0009] Fig. 3 depicts a quartz substrate, handle wafer, and a base wafer to be used in accordance with the present disclosure;

[0010] Fig. 4 depicts the handle wafer of Fig. 3 with a cavity;

[0011] Fig. 5 depicts a photoresist on the quartz substrate of Fig. 3;

[0012] Fig. 6 depicts the quartz substrate of Fig. 3 with first electrodes and metal bonding pads;

[0013] Fig. 7 depicts the quartz substrate of Fig. 3 bonded to the handle wafer of Fig. 4;

[0014] Fig. 8 depicts the quartz substrate of Fig. 7 being thinned;

[0015] Fig. 9 depicts vias formed in the quartz substrate of Fig. 8;

[0016] Fig. 10 depicts second electrodes and bottom metal bonding pads on the quartz substrate of Fig. 9;

[0017] Fig. 11 depicts the bottom metal bonding pads of the quartz substrate of Fig. 10 with increased thickness;

[0018] Fig. 12 depicts a portion of the quartz substrate having been removed to define the resonator on the handle wafer;

[0019] Fig. 13 depicts the quartz substrate being bonded to the base wafer of Fig. 3;

[0020] Fig. 14 depicts the quartz resonator being released from the handle wafer;

[0021] Fig. 15 depicts an exemplary UHF hybrid MEMS oscillator according to the present disclosure; and

[0022] Fig. 16 depicts a waveform of an output signal generated by the oscillator of Fig. 15.

[0023] In the following description, like reference numbers are used to identify like elements. Furthermore, the drawings are intended to illustrate major features of exemplary embodiments in a diagrammatic manner. The drawings are not intended to depict every feature of every implementation nor relative dimensions of the depicted elements, and are not drawn to scale.

DETAILED DESCRIPTION [0024] A process, disclosed in the present application, may be used to attach a full wafer of resonators to a substrate wafer using low temperature bonding. This allows the complete integration of a wafer of resonators to a wafer containing an array of oscillator circuits for small size and low cost. Moreover, the use of handle wafer technology allows one to increase the frequency beyond the limits set by processing a single quartz wafer (around 100 MHz). Since the capacitance values of a properly scaled device decrease as the frequencies are increased, small parasitic capacitances become a significant source of performance degradation at higher frequencies. By integrating the resonators with miniaturized electronics on

chip, these parasitic effects can be minimized for highly stable and reproducible performance for various oscillators across a wafer. In addition, integration allows small, rapid, and low power temperature compensation methods to be implemented near the resonators. This in turns provides the ability to construct ovenized oscillators with fast warm-up times (milliseconds instead of minutes for larger oscillators) with extremely low power requirements. Finally, oscillators presented in the present application have shown lower vibration sensitivity compared to commercial lower frequency units. This may be due to the stiffer cantilever structures needed for higher frequency operation.

[0025] In one exemplary embodiment of the present disclosure, an integrated quartz resonator 20 bonded directly to a wafer 30 with active electronics 40 for the purpose of forming a small, low power, and low phase noise oscillator 10 is disclosed in Fig. 1. The wafer 30 may be composed of, for example, silicon (Si), SiGe or group III- V materials. Fig. 2 depicts a circuit diagram of an oscillator feed back loop 50 that may be implemented using the techniques disclosed in the present disclosure.

[0026] An exemplary method of fabricating oscillator 10 according to the present application will now be described with reference to Fig. 3-13.

[0027] Referring to Fig. 3, a quartz substrate 60 having a first surface 61 and a second surface 62, a first substrate 70 (i.e. handle wafer), and a base wafer 80 containing active electronics 85 are provided. The first substrate 70 may comprise a material such as silicon or GaAs. In this embodiment, both the first substrate 70 and quartz substrate 60 may be provided in the form of a 3 inch or larger wafers.

[0028] A portion of the first substrate 70 is etched away creating a cavity 75, as shown in Fig. 4. The etched cavity 75 can be fabricated, for example, with a wet

etch of potassium hydroxide, or a dry reactive ion etch using a gas having a fluorine chemistry.

[0029] The first surface 61 of the quartz substrate 60 is then patterned and metallized using a lift-off technique. In the lift-off technique, a thin layer of photoresist 63 is patterned on the first surface 61 of the quartz substrate 60, as shown in Fig. 5. Using lithography, photoresist is removed in the regions where metallization is desired. The metal is then deposited on the photoresist 63 and in the regions where the photoresist 63 was removed. The photoresist is then removed leaving metal only in the desired regions on the first surface 61 of the quartz substrate 60 as shown in Fig. 6. During patterning and metallizing at least one first electrode pad 65 and its interconnect (not shown) are deposited on the first surface 61 of the quartz substrate 60. The first electrode pad 65 and its interconnect may be comprised of Al or Ti/ Au, or Cr/ Au, deposited in that order on the first surface 61 of the quartz substrate 60. Shown in Fig. 6 are also two interconnect metal pads 64 on the first surface 61 of the quartz substrate 60. The two interconnect metal pads 64 may be comprised of Ti/Pt/Au or Cr/Pt/Au. In one exemplary embodiment, one of interconnect pads 64 may be electrically connected with the first electrode pad 65 through the interconnect (not shown). The purpose of the two interconnect metal pads 64 and the first electrode pad 65 will be discussed later.

[0030] After the interconnect pads 64 and the first electrode pad 65 are deposited, the quartz substrate 60 may be bonded to the etched first substrate 70, as shown in Fig. 7 using for example, an EV 501 Wafer Bonder which is commercially available. To bond the quartz substrate 60 to the first substrate 70, the quartz substrate 60 and first substrate 70 are thoroughly cleaned in a megasonic cleaning system, which makes use of ultrasonic waves to remove particle contaminants. After the wafers are cleaned, they are brought in contact with each other and

annealed. The contact between the quartz substrate 60 and the first substrate 70 creates a bond due to hydrogen bonding of silanol (Si-O-H) groups followed by the covalent bonding of siloxanes (Si-O-Si) after a heat treatment. The quartz substrate 60 is bonded to the etched first substrate 70 such that the interconnect pads 64 and the first electrode pad 65 are now located in the cavity 75 of the first substrate 70.

[0031] After the bonding of the quartz substrate 60 and the etched first substrate 70, the second surface 62 of the quartz substrate 60 undergoes a thinning process to obtain thinned second surface 62a of about 10 micrometers or less, as shown in Fig. 8. In order to thin the quartz substrate 60, the following method may be used. The quartz substrate 60 may be thinned, for example, using a mechanical lapping and polishing system. Lapping and polishing systems are well known and commercially available from manufacturers such as Logitech. In a mechanical lapping and polishing system, a polishing head is spun at a high rate of speed. The lapping and polishing system also comprises a nozzle for dispensing slurry on the quartz substrate 60. While spinning, the polishing head contacts the quartz substrate 60 in the presence of the slurry, thereby evenly grinding away portions of the quartz substrate 60. The slurry may be comprised of chemicals such as aluminum oxide to remove quartz from the quartz substrate 60. Mechanical grinding may also be used to thin the quartz substrate 60.

[0032] In another example, a portion of the quartz substrate 60 may be thinned, for example, using reactive ion etching (RIE) with CF 4 or SF 6 . While being thinned in the RIE machine, the thickness of quartz substrate 60 may be monitored using spectropic ellipsometry or reflectometry techniques as known to one skilled in the art.

[0033] After using RIE to thin the quartz substrate 60, the surface of the quartz

substrate 60 may have imperfections that need to be corrected. This can be accomplished by using, for example, the mechanical lapping and polishing system described above with a chemical such as silica or cerium oxide, to remove about 0.01-0.02 micrometers of quartz, followed up with a wet etch in ammonium bifluoride to remove about 0.005 micrometers of quartz from the quartz substrate 60. This helps ensure a polished, defect free quartz substrate 60.

[0034] After the quartz substrate 60 is thinned, vias 90 are fabricated in the quartz substrate 60, as shown in Fig. 9. In one exemplary embodiment, only one via 90 may be fabricated in the quartz substrate 60. The vias 90 may be created using lithography techniques well known in the art. The vias 90 are contacts that are etched through the quartz substrate 60 to the interconnect pads 64. Once the vias 90 are fabricated, the vias 90 are metallized and the thinned second surface 62a of the quartz substrate 60 is patterned and metallized, as shown in Fig. 10, using the lift-off technique described for depositing the interconnect pads 64. During the metallization step, interconnect pads 66 are deposited on the thinned second surface 62a over the vias 90. The interconnect pads 66 may be comprised of a combination of Ti, Pt, Au, or Cr, Pt, Au, deposited in that order on the thinned second surface 62a of the quartz substrate 60.

[0035] The interconnect pads 64, 66 are connected through the vias 90. Additionally, a second metal electrode pad 67 and its interconnect (not shown) are deposited as shown in Fig. 10. The second electrode pad 67 may be comprised of Al or Ti/ Au or Cr/ Au. In exemplary embodiment, the electrode pad 67 may be electrically connected with one of the interconnect pads 66 through its interconnect (not shown).

[0036] Once the interconnect pads 66 and the second electrode pad 67 have been deposited, another pattern and metalize step may be performed using the lift-off

technique described above and applied to the interconnect pads 66 to increase the thickness of the interconnect pads 66 as shown in Fig 11 if necessary.

[0037] Once the thickness of the interconnect pads 66 is increased, a portion of the quartz substrate 60 is removed, thereby creating an isolated quartz resonator 60a, as shown in Fig. 12. Portion of the quartz substrate 60 may be removed using lithography and REI techniques well known in the art to divide the quartz substrate into individual devices and determine the desired dimensions of the quartz resonators 60a.

[0038] The first and second electrode pads 65, 67 on the modified quartz substrate 60a apply an RF field across the resonator to drive it into oscillation at its natural resonant frequency. By ablating a portion of the first electrode pad 65 or second electrode pad 67, the resonant frequency of the quartz substrate 60a can be adjusted. The first and second electrode pads 65, 67 can be ablated using known techniques such as ion beam milling or laser ablation. It is to be understood that one skilled in the art can also adjust the resonant frequency by adding mass to the first and second electrode pads 65, 67 without taking away from the patentable aspect of the present disclosure.

[0039] As already mentioned above with reference to the detailed description of Fig. 3, a base wafer 80 is provided. The base wafer 80 may be comprised of, for example, silicon (Si), SiGe or group III-V materials and may contain a dielectric layer 81 containing vias 82 electrically connecting active electronics 85 with conductive pads 83.

[0040] After the thickness of the interconnect pads 66 is increased, the interconnect pads 66 of the resonator 60a are bonded to the conductive pads 83 along bonding line 98, as shown in Fig. 13 using, for example, a low temperature metal bond such

as Au/ In or Au/ Sn. In the Au-In thermal compression bonding scheme, the quartz resonator 60a, the interconnect pads 66, the conductive pads 83, and the base wafer 80 are heated to a temperature of about 100° C in a vacuum having a pressure no greater than ICH Torr. Then the interconnect pads 66 and the conductive pads 83 are pressed together, while being depressurized, with a pressure of approximately 1 MPa. This will fuse the conductive pads 83 and the interconnect pads 66 together, as shown in Fig. 13.

[0041] The bonding of the interconnect pads 66 to the conductive pads 83 provides electrical access from the conductive pads 83 to the first and second electrode pads 65, 67. After the interconnect pads 66 have been bonded to the conductive pads 83, first substrate 70 (handle wafer) is removed from the remaining structure, using a combination of wet and dry etches so that an oscillator is obtained as shown in Fig. 14. In one exemplary embodiment, the structure in Fig. 14 may be hermetically capped by a capping wafer 110 that has been etched to have a cavity. The capping wafer 110 may contain Si material. The capping wafer 110 may be bonded to the dielectric layer 81 using for example low temperature metal-to- metal bond 115 such as Au/ In.

[0042] The purpose of the first and second electrode pads 65, 67 is to receive an electrical signal from the conductive pads 83 that can bias or drive the modified quartz substrate 60a with an electric field. The electrical signal is preferably an AC signal. When the electrical signal is received by the first and second electrodes 65, 67 a stress is placed on the modified quartz resonator 60a. This stress stimulates the mechanical resonant frequency of the modified quartz resonator 60a by the well-known piezoelectric effect, thereby causing the modified quartz resonator 60a to oscillate at its resonant frequency. Additionally, it is also possible to use the first and second electrodes 65, 67 to sense the movement of the modified quartz substrate 60a relative to a specified plane (not shown). Once the modified quartz

substrate 60a is oscillating at its resonant frequency, it can be used to drive other electrical components at a frequency equal to its resonant frequency with electrical gain due to the high Q of the quartz resonator. [0043] Obviously, other variations and process steps could be implemented for attaching the resonator 20 to the base wafer 30, depending on the degree to which one is willing to modify the top surface of the wafer 80.

[0044] Fig. 15 depicts an exemplary UHF hybrid MEMS oscillator 200 according to the present disclosure. The quartz MEMS resonators 210 are located on a silicon (Si) substrate 220 that is glued to the copper-clad Duroid surface mount card 225. The copper cladding may be removed from around the circuits components to reduce parasitic capacitance. Fig. 16 depicts a waveform of an output signal generated by the oscillator 200 through output 226 using 326-MHz disk resonator 210.

[0045] An oscillator having a quartz resonator, and a base wafer containing active electronics, wherein the quartz resonator is bonded directly to the base wafer and subsequently hermetically capped.

[0046] The foregoing detailed description of exemplary and preferred embodiments is presented for purposes of illustration and disclosure in accordance with the requirements of the law. It is not intended to be exhaustive nor to limit the invention to the precise form(s) described, but only to enable others skilled in the art to understand how the invention may be suited for a particular use or implementation. The possibility of modifications and variations will be apparent to practitioners skilled in the art. No limitation is intended by the description of exemplary embodiments which may have included tolerances, feature dimensions, specific operating conditions, engineering specifications, or the like, and which may vary between implementations or with changes to the

state of the art, and no limitation should be implied therefrom. Applicant has made this disclosure with respect to the current state of the art, but also contemplates advancements and that adaptations in the future may take into consideration of those advancements, namely in accordance with the then current state of the art. It is intended that the scope of the invention be defined by the Claims as written and equivalents as applicable. Reference to a claim element in the singular is not intended to mean "one and only one" unless explicitly so stated. Moreover, no element, component, nor method or process step in this disclosure is intended to be dedicated to the public regardless of whether the element, component, or step is explicitly recited in the claims. No claim element herein is to be construed under the provisions of 35 U.S.C. Sec. 112, sixth paragraph, unless the element is expressly recited using the phrase "means for. . ." and no method or process step herein is to be construed under those provisions unless the step, or steps, are expressly recited using the phrase "step(s) for. . .."

[0047] U.S. Application No. 10/426,931 filed on April 30, 2003 which is incorporated herein, recites the following.

BACKGROUND

The use of quartz substrates in a MEMS process provides for the fabrication of high Q, thermally compensated resonators. For thickness shear mode resonators, the thickness of the substrate determines its resonant frequency. The thinner the quartz substrate, the higher the resonant frequency. Therefore, by varying the dimensions of the substrate over a broad range, the resonant frequency can be adjusted over a broad range. The Q of a resonator is a measure of the frequency selectivity of a resonator and is related to how well the energy of the oscillations are trapped. One factor that influences how well the energy of the oscillations is trapped is the smoothness of the surface. When thinning a quartz substrate it is desirable to maintain a smooth undamaged surface to ensure a high Q. However, present quartz fabrication techniques for oscillators or filters do not allow the

resonators to be integrated on a chip with other electronics. This is a significant contributing factor to the size and cost of a device. Using separate on chip components also contributes significantly to the size and cost of a device.

Furthermore, present quartz thinning processes have not be able to thin substrates to a thickness on the order of 10 micrometers or less, because of the inability to monitor the thickness of the quartz substrate in real time with sub micron resolution. Another difficulty is the handling of the quartz substrate after it has been thinned. One reference which discusses thinning quartz substrates is Takahsi Abe, Masayoshi, "One-Chip Multichannel Quartz crystal microbalance (QCM) Fabricated By Deep RIE," Sensors and Actuators, 2000, pp. 139-143. Having a quartz substrate with a thickness on the order of 10 microns or less can result in resonant frequencies greater than 100 MHz, which is desirable for high frequency applications. By combining several quartz based resonators having different resonant frequency, with a RF MEMS switch on the same chip, frequency hopping and filter reconfiguration can occur on the microsecond time scale. In frequency hopping and filter reconfiguration the desired frequency in a band of frequencies is selected by using the RF MEMS switch to activate the quartz resonator having a resonant frequency equal to the desired frequency. The spectral band for most radio frequency hopping and filter reconfiguration applications is 20 MHz to 3 GHz. The low frequency part of the band is extremely difficult to cover with conventional capacitive-based filters since capacitive-based filters are larger in size. Frequency hopping and filter reconfiguration applications would also benefit from temperature compensated, stable, high-Q (in the amount of about 10,000), small arrays of resonators which cover that spectral band.

MEMS devices which consist of silicon-based nanoresonators have been fabricated in an attempt to integrate nanoresonators or microresonators with other electronics. Nanoresonators and microresonators are resonators which have linear dimensions on the order of nanometers and micrometers, respectively. These silicon-based nanoresonators have shown resonant frequencies as high as 600 MHz, and Q's in the range of 1000 - 2000. However, the problem with silicon-based nanoresonators is that they have high

electrical impedances and lower Q's. Two documents which discuss silicon-based nanoresonators are S. Evoy, A. Olkhovets, L. Sekaric, J.M. Parpia, H.G. Craighead, D.W. Carr, "Temperature-dependent Internal Friction in Silicon Nanoelectromechanical Systems," Applied Physics Letters, Vol. 77, Number 15, and A.N. Cleland, M.L. Roukes, "Fabrication of High Frequency Nanometer Scale Mechanical Resonators From Bulk Si Crystals," Applied Physics Letters, Oct. 28, 1996.

An alternative solution, is known which makes use of non-MEMS quartz resonators. Such resonators consist of shear strip individual resonators operating in ranges of about 10 MHz to about 1 GHz. These resonators are packaged as discrete devices and mounted as hybrids to other RF circuits. The problem with non-MEMS quartz resonators is that they are non-integrable, they have higher costs, and they are physically larger in size.

As a result, a new process for manufacturing a quartz-based nanoresonator is desired in order to solve all the aforementioned problems.

SUMMARY

The present invention describes a method for fabricating and integrating quartz- based resonators on a high speed substrate for integrated signal processing by utilizing a combination of novel bonding and etching steps to form ultra thin quartz based resonators. Thinning the quartz substrate in the quartz resonator can be used to provide the desired resonant frequency and may be in excess of 100 MHz.

According to one aspect of the present invention, a novel method for fabricating a quartz based resonator is disclosed. The method makes use of the bond between the quartz substrate and the silicon substrate, as well as a novel process to thin the quartz substrate to a desired thickness. A quartz substrate is provided having a first electrode deposited thereon. The quartz substrate is bonded to a first substrate having a cavity etched therein to accommodate the first electrode. The quartz substrate is then thinned to a desired

thickness and a second electrode is deposited on the quartz substrate. The first electrode is connected to the second electrode with vias which are filled with a metal. In addition to the first and second electrodes, a tuning pad is preferably deposited on the quartz substrate. Further, the present invention provides a base substrate which contains probe pads. After depositing the first and second electrodes and the tuning pads on the quartz substrate, the probe pads of the base substrate are bonded to the second electrodes of the quartz substrate. The tuning pad can be used to adjust the resonant frequency of the quartz substrate. Further, it is also possible to use the first and second electrodes as tuning pads. More specifically, the first and second electrodes may be ablated to adjust the resonant frequency of the nanoresonator. Additionally, the base wafer could contain high-speed RP electronics, which would suppress the need for lengthy bond wires. The first substrate is then removed from the quartz substrate thereby releasing the resonator.

It is also an object of the present invention to provide a method for fabricating a quartz based resonator without the use of a silicon wafer. In this embodiment first electrodes and a tuning pad are deposited on the quartz resonator. A base substrate is also provided. The base substrate contains probe pads for providing an electrical connection to the quartz substrate. The quartz substrate is bonded to the base substrate and then undergoes a thinning process. After the quartz substrate is thinned, second electrodes and a tuning pad are deposited on the quartz substrate.

It is also an object of the present invention to provide a novel method for thinning a quartz substrate, hi this method, a lap and polish system is used to remove a substantial portion of the quartz substrate. Then reactive ion etching is used thin the quartz substrate to a thickness less than 10 micrometers, which is needed for resonant frequencies greater than 100 MHz. The reactive ion etching is used simultaneously with an optical monitoring technique to obtain the current thickness of the quartz substrate as it is being thinned. After obtaining the desired thickness of the quartz substrate using reactive ion etching, the quartz substrate can be further polished using a chemical mechanical polish (CMP) or a wet etch.

BRIEF DESCRIPTION OF DRAWINGS

The present invention will be understood and appreciated more fully from the following detailed description taken in conjunction with the drawings in which:

Fig. Ia shows a quartz substrate, silicon substrate and base substrate, to be used in accordance with a first embodiment of the present invention; Fig. 2a shows the silicon substrate with a cavity; Fig. 3a shows photoresist on the quartz substrate; Fig. 4a shows the quartz substrate with first electrodes and a tuning pad; Fig. 5aa shows the quartz substrate bonded to the silicon substrate; Figs. 5ba-5ea show the thinning of the quartz substrate while bonded to the silicon substrate; Fig. 6aa and 6ba show two methods used to monitor the thickness of the quartz substrate while being thinned; Fig. 7a shows vias in the quartz substrate; Fig. 8a shows the same as Fig. 7a except second electrodes and a tuning pad have been deposited on the quartz substrate; Fig. 9a shows the same as Fig. 8a except a portion of the quartz substrate has been removed; Fig. 10a shows a portion of the base substrate having been removed; Fig. 11a shows the same as Fig. 10a except probe pads have been added to the base substrate; Fig. 12a shows the bond between the probe pads of the base substrate and the second electrodes on the quartz substrate; and Fig. 13a shows the same as Fig. 12a except the silicon substrate has been removed. Fig. 14a shows the quartz substrate and base substrate to be used in accordance with a second embodiment of the present invention; Fig. 15a shows the quartz substrate with first electrodes and a tuning pad; Fig. 16a shows a portion of the base substrate having been removed;

Fig. 17a shows the same as Fig. 16a except probe pads have been added to the base substrate; Fig. 18a shows the quartz substrate bonded to the base substrate; Fig. 19a shows the thinning of the quartz substrate while bonded to the base substrate; Fig. 20a shows the vias created in the quartz substrate; Fig. 21a shows the second electrodes and tuning pad on the quartz substrate; and Fig. 22a shows the same as Fig. 21a except a portion of the quartz substrate removed.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS The present invention provides a method for fabricating a resonator with reference to Figs. la-22a.

First Embodiment

A method of fabricating a quartz resonator according to a first embodiment of the present invention will now be described with reference to Figs. Ia- 13 a. Referring to Fig. Ia, a quartz substrate 2 having a first surface 3 and a second surface 5, a first substrate 4, and a base substrate 14 are provided. The first substrate 4 may comprise a material such as silicon or GaAs. In this embodiment, both the first substrate 4 and quartz substrate 2 may be provided in the form of 3 inch or larger wafers. A portion of the first substrate 4 is etched away creating a cavity 6, as shown in Fig. 2a. The etched cavity 6 can be fabricated with a wet etch of potassium hydroxide, or a dry reactive ion etch using a gas having a fluorine chemistry.

The first surface 3 of the quartz substrate 2 is then patterned and metallized using a lift-off technique, hi the lift-off technique, a thin layer of photoresist 7 is patterned on the first surface 3 of the quartz substrate 2, as shown in Fig. 3 a. Using lithography, photoresist is removed in the regions where metallization is desired. The metal is then deposited on the photoresist 7 and in the regions where the photoresist 7 was removed. The photoresist is then removed leaving metal only in the desired regions on the first surface 3 of the quartz substrate 2 as shown in Fig. 4a. During patterning and metallizing at least one first

electrode 8 is deposited on the first surface 3 of the quartz substrate 2. The first electrode 8 may be comprised of a combination of Ti, Pt, Au, or Cr, Pt, Au, deposited in that order on the first surface 3 of the quartz substrate 2 in that order. Shown in Fig. 4a are two first electrodes 8 on the first surface 3 of the quartz substrate 2. Additionally, a first tuning pad 10 may be deposited on the first surface 3 of the quartz substrate 2. The first tuning pad 10 is comprised of the same material as the first electrodes 8. The purpose of the two first electrodes 8 and the first tuning pad 10 will be discussed later.

After the first electrodes 8 and the first tuning pad 10 are deposited, the quartz substrate 2 is bonded to the etched first substrate 4, as shown in Fig. 5aa using for example, an EV 501 Wafer Bonder which is commercially available. To bond the quartz substrate 2 to the first substrate 4, the quartz substrate 2 and first substrate 4 are thoroughly cleaned in a megasonic cleaning system, which makes use of ultrasonic waves to remove particle contaminants. After the wafers are cleaned, they are brought in contact with each other. The contact between the quartz substrate 2 and the first substrate 4 creates a bond due to the well known van der Waals force. The first electrodes 8 and the first tuning pad 10 are now located in the cavity 6 of the first substrate 4.

The second surface 5 of the quartz substrate 2 remains exposed, and undergoes a thinning process, shown in Figs. 5ba-5ea. Li order to thin the quartz substrate 2, the following method is used. For exemplary purposes only, the quartz substrate 2 has an initial thickness of 500 micrometers. A first portion of the quartz substrate 2 is removed by thinning the quartz substrate from about 500 micrometers to 50 micrometers as shown in Fig. 5ba using a mechanical lapping and polishing system. Lapping and polishing systems are well known and commercially available from manufacturers such as Logitech. hi a mechanical lapping and polishing system, a polishing head is spun at a high rate of speed. The lapping and polishing system also comprises a nozzle for dispensing slurry on the quartz substrate 2. While spinning, the polishing head contacts the quartz substrate in the presence of the slurry, thereby evenly grinding away portions of the quartz substrate 2. The slurry may be comprised of chemicals such as aluminum oxide to remove quartz from the quartz substrate 2.

Next, a second portion of about 1 micrometer of quartz is removed from the quartz substrate 2, as shown in Fig. 5ca to ensure a smooth surface. This is done with the above described mechanical lapping and polishing system, except a softer chemical such as colloidal silica or cerium oxide is used in the slurry to remove quartz from the quartz substrate 2.

Next, a third portion of the quartz substrate 2 is removed to reduce the thickness of the quartz substrate 2 to less than 10 micrometers as shown in Fig. 5da using reactive ion etching (RIE) with CF 4 or SF 6 gas 9, as shown in Figs. 6aa-6ba. While being thinned in the RIE machine, the thickness of quartz substrate 2 is simultaneously monitored using spectropic ellipsometry or reflectometry techniques, as shown in Figs. 6aa-6ba. In spectroscopic ellipsometry, shown in Fig. 6aa, a beam of white light 18 from a source 19 is shone onto the quartz substrate 2 at an angle of about 15° off horizontal. The white light has a known polarization. The reflected white light 20 off the quartz substrate 2 will have a different polarization which is directly related to the thickness of the quartz substrate 2. A receiver 21 receives the reflected white light 20 and calculates the change in polarization. The change in polarization is directly proportional to the thickness of the quartz substrate 2. In reflectometry, shown in Fig. 6ba, a laser source 22 shines light 23, with a known wavelength, onto the second surface 5 of the quartz substrate 2 at an angle of 90° off horizontal as shown in Fig. 6ba. A first reflected beam 24 is reflected off the second surface 5 of the quartz substrate 2. A portion of the incident light also penetrates through the quartz substrate 2. This creates a second reflected beam 25 which is reflected off the first surface 3 back through the quartz substrate 2 and out the second surface 5. The first reflected beam 24 and second reflected beam 25 are parallel to each other and are received by a receiver 26 which determines whether the first reflected beam 24 and the second reflected beam 25 add constructively or destructively. If the first and second reflected beams 24, 25 add constructively, the thickness of the quartz substrate is equal to 25% of the ratio of the incident light wavelength divided by the refractive index of quartz, or an odd integer multiple thereof, such as 75%, 125%, etc. The refractive index of quartz is typically about 1.46. If the first and second reflected beams 24, 25 add destructively, the thickness of the quartz substrate 2 is equal to 50% of the ratio of the incident light

wavelength divided by the refractive index of quartz, or an integer multiple thereof, such as 100%, 150%, etc.

After using RIE to remove quartz from the quartz substrate 2, the surface of the quartz substrate 2 may have imperfections that need to be corrected. This can done by using the mechanical lapping and polishing system described above with a chemical such as silica or cerium oxide, to remove about .01-. 02 micrometers of quartz, followed up with a wet etch in ammonium bifluoride to remove about .005 micrometers of quartz from the quartz substrate 2, as shown in Fig. 5ea. This additional step will help ensure a polished, defect free quartz substrate 2.

After the quartz substrate 2 is thinned, vias 11 are fabricated in the quartz substrate 2, as shown in Fig. 7a. The vias 11 are created using lithography techniques well known in the art. The vias 11 are contacts which are etched through the quartz substrate 2 to the first electrodes 8. Fig. 7a shows two vias 11. Once the vias 11 are fabricated, the vias are metallized and the second surface 5 of the quartz substrate 2 is patterned and metallized, as shown in Fig. 8a, using the lift-off technique described for depositing the at least one first electrode 8. During the metallization step, at least one second electrode 12 is deposited on the second surface 5 over the vias 11. The second electrode 12 may be comprised of a combination of Ti, Pt, Au, or Cr, Pt, Au, deposited in that order on the second surface 5 of the quartz substrate 2 in that order. Shown in Fig. 8a are two second electrodes 12.

The first and second electrodes 8, 12 are now connected through the vias 11. Additionally, a second tuning pad 13 can be deposited during the step of depositing the second electrodes 12, as shown in Fig. 8a. The second tuning pad 13 is comprised of the same material as the second electrodes 12. Once the first and second electrodes 8, 12 and first and second tuning pads 10, 13 have been deposited, a portion of the quartz substrate 2 is removed, thereby creating a modified quartz substrate 2a, as shown in Fig. 9a. Such portion is removed using lithography and REI techniques well known in the art to divide the quartz substrate into individual devices and determine the desired dimensions of the quartz substrate 2.

The first and second tuning pads 10, 13 on the modified quartz substrate 2a allow the resonant frequency of the quartz substrate 2a to be adjusted. By ablating a portion of the first and second tuning pads 10, 13, the resonant frequency of the quartz substrate 2a can be adjusted. However, it is also possible to adjust the resonant frequency by ablating a portion of the first and second electrodes 8, 12. The first and second tuning pads 10, 13 can be ablated using known techniques such as focused ion beam milling or laser ablation.

As already mentioned above with reference to the detailed description of Fig. Ia, a base substrate 14 is provided. The base substrate 14 is comprised of a group III- V material or SiGe. Fig. 10a shows a modified base substrate 14a, where a portion of the base substrate 14 shown in Fig. Ia has been removed. The removal of a portion of the base substrate 14 is done using lithography techniques well known in the art. At least one probe pad 16 is deposited on the modified base substrate 14a. Fig. 11a shows, for example, two probe pads 16. The probe pads are deposited using the same lift off technique used to deposit the at least one first electrode 8 discussed previously. The probe pads 16 may be comprised of a gold / germanium alloy, nickel, and gold deposited in that order.

After the probe pads 16 have been deposited on the modified base substrate 14a, the bottom electrodes 12 of the modified quartz substrate 2a are bonded to the probe pads 16 along bonding line 17, as shown in Fig. 12a using an Au-Au compression bonding scheme. In the Au-Au compression bonding scheme, the quartz substrate 2, the second electrodes 12, the probe pads 16, and the modified base substrate 14a are heated to a temperature greater than 300 °C in a vacuum having a pressure no greater than 10 "4 Torr. Then the second electrodes 12 and probe pads 16 are pressed together, while depressurized, with a pressure of approximately 1 MPa. This will fuse the probe pads 16 and the second electrodes 12 together, as shown in Fig. 12a.

The above described bonded structure provides electrical access from the probe pads 16 to the first electrodes 8. After the second electrodes 12 have been bonded to the probe pads 16, the quartz substrate 2a is removed from the remaining structure, using a

combination of wet and dry etches so that a structure like the one shown in Fig. 13a is obtained.

The purpose of the first and second electrodes 8, 12 is to receive an electrical signal from the probe pads 16 which can bias or drive the modified quartz substrate 2a with an electric field. The electrical signal is preferably an AC signal. When the electrical signal is received by the first and second electrodes 8, 12 a strain is placed on the modified quartz substrate 2a. This strain stimulates the mechanical resonant frequency of the modified quartz substrate 2a by the well-known piezoelectric effect, thereby causing the modified quartz substrate 2a to oscillate at its resonant frequency. Additionally, it is also possible to use the first and second electrodes 8, 12 to sense the movement of the modified quartz substrate 2a relative to a specified plane (not shown). Once the modified quartz substrate 2a is oscillating at its resonant frequency, it can be used to drive other components at a frequency equal to its resonant frequency.

Second Embodiment

A second embodiment of a method for fabricating a quartz resonator will now be described with reference to Figs. 14a-22a. This second embodiment is similar to the first embodiment, except the first substrate is removed from the process, hi this embodiment, a quartz substrate 30 and a base substrate 40 are provided, as shown in Fig. 14a. A first surface 31 of the quartz substrate 30 is patterned and metallized using the lift-off technique discussed in the first embodiment for depositing first electrodes 8. During patterning and metallizing, at least one first electrode 36 is deposited on the first surface 31 of the quartz substrate 30. Fig. 15a shows two first electrodes 36. Additionally, a first tuning pad 38 is deposited on the first surface 31 of the quartz substrate 30.

As aforementioned, a base substrate 40 is provided. This base substrate 40 is comprised of a group m-V material or SiGe. In order to obtain a modified base structure 40a, shown in Fig. 16a, a portion of the base structure 40 is removed using the techniques discussed in the first embodiment. At least one probe pad 42 is deposited on the modified

base substrate 40a using the lift-off technique discussed in the first embodiment for depositing probe pads 16. Shown in Fig. 17a are two probe pads 42.

After the probe pads 42 have been deposited on the modified base substrate 40a, the first electrodes 36 of the quartz substrate 30 are bonded to the probe pads 42 along bonding line 43, as shown in Fig. 18a using the Au-Au bonding scheme discussed in the first embodiment.

Next, the quartz substrate 30 is thinned to a thickness of 10 micrometers or less, as shown in Fig. 19a, using the technique discussed in the first embodiment. Vias 39 are fabricated in the quartz substrate 30 using the techniques discussed in the first embodiment. The vias 39, shown in Fig. 20a, are contacts which are etched through the quartz substrate 30 to the first electrodes 36. Once the vias 39 are fabricated, the vias 39 are metallized and the second surface 33 of the quartz substrate 30 is patterned and metallized using the lift-off technique discussed in the first embodiment for depositing second electrodes 12. During the metallization step, at least one second electrode 46 is deposited on the second surface 33 over the vias 39. Shown in Fig. 21a are two second electrodes 46. The first and second electrodes 36, 46 are connected through the vias 39. Furthermore, a second tuning pad 48 can be deposited as shown in Fig. 21a, during patterning and metallization of the second electrodes 46. Finally a portion of the quartz substrate 30 is removed, thereby creating a modified quartz substrate 30a, as shown in Fig. 22a, using lithography and RIE techniques known in the art. Once the modified quartz substrate 30a is oscillating at its resonant frequency, it can be used to drive other components at a frequency equal to its resonant frequency.

Let it be understood that the foregoing description is only illustrative of the invention. Various alternatives and modifications can be devised by those skilled in the art without departing from the spirit of the invention. Accordingly, the present invention is intended to embrace all such alternatives, modifications, and variances which fall within the scope of the appended claims.

CONCEPTS

As short summaries, this writing has disclosed the following.

Concept 1. A method for fabricating a resonator comprising the steps of: providing a first substrate having a cavity etched therein; providing a quartz substrate; bonding the quartz substrate over the cavity; thinning the quartz substrate; removing a portion of the quartz substrate; bonding the quartz substrate to a base substrate; and removing the first substrate, thereby releasing the quartz substrate.

Concept 2. The method of concept 1, wherein the step of thinning the quartz substrate thins the quartz substrate to a thickness of less than ten micrometers.

Concept 3. The method of concept 1, wherein the first substrate comprises a member selected from the group consisting of Si and GaAs.

Concept 4. The method of concept 1, wherein the base substrate comprises a member selected from the group consisting of group O-V elements, and SiGe.

Concept 5. The method of concept 1, further comprising the steps of: removing a portion of the base substrate thus obtaining a modified base substrate; and depositing at least one probe pad on the modified base substrate.

Concept 6. The method of concept 5, wherein the quartz substrate comprises a first surface and a second surface, the resonator further comprising at least one first electrode on the first surface, and at least one second electrode on the second surface.

Concept 7. The method of concept 6, wherein the quartz substrate further comprises at least one via connected to the at least one first electrode and the at least one second electrode, wherein the at least one via is filled with a metal.

Concept 8. The method of concept 7, wherein the quartz substrate further comprises at least one tuning pad for tuning the quartz substrate to a desired resonant frequency.

Concept 9. The method of concept 8, wherein the step of bonding the quartz substrate to the base substrate, comprises the step of bonding the at least one probe pad to the at least one second electrode, thereby allowing a signal to flow between the at least one probe pad and the at least one second electrode.

Concept 10. The method of concept 8, wherein the at least one tuning pad is ablated to adjust the resonant frequency.

Concept 11. The method of concept 8, wherein the tuning pad is one among the at least one first electrode and the at least one second electrode.

Concept 12. A method for fabricating a resonator comprising the steps of: providing a first substrate having a cavity etched therein; providing a quartz substrate; bonding the quartz substrate over the cavity; and thinning the quartz substrate.

Concept 13. The method of concept 12, wherein the step of thinning comprises thinning the quartz substrate to a thickness of less than ten micrometers.

Concept 14. The method of concept 12, further comprising the steps of: removing a portion of the quartz substrate; providing a base substrate; bonding the quartz substrate to a base substrate; and

removing the first substrate, thereby releasing the quartz substrate.

Concept 15. The method of concept 12, wherein the first substrate is comprised of a member selected from the group consisting of Si and GaAs.

Concept 16. The method of concept 14, wherein the base substrate is comprised of a member selected from the group consisting of group III-V elements, and SiGe.

Concept 17. The method of concept 14, wherein the step of providing a base substrate further comprises the step of: removing a portion of the base substrate thus obtaining a modified base substrate; and depositing at least one probe pad on the modified base substrate.

Concept 18. The method of concept 17, wherein the quartz substrate comprises a first surface and a second surface, the quartz substrate further comprising at least one first electrode on the first surface, and at least one second electrode on the second surface of the quartz substrate.

Concept 19. The method of concept 18, wherein the quartz substrate further comprises at least one via connected to the at least one first electrode and the at least one second electrode, wherein the at least one via is filled with a metal.

Concept 20. The method of concept 19, wherein the quartz substrate further comprises at least one tuning pad for tuning the quartz substrate to a desired resonant frequency.

Concept 21. The method of concept 20, wherein the step of bonding the quartz substrate to the base substrate, comprises the step of bonding the at least one probe pad to the at least one second electrode, thereby allowing a signal to flow between the at least one probe pad and the at least one second electrode.

Concept 22. The method of concept 20, wherein the at least one tuning pad is ablated to adjust the resonant frequency of the resonator.

Concept 23. The method of concept 20, wherein the tuning pad is one among the at least one first electrode and the at least one second electrode.

Concept 24. A resonator comprising: a quartz substrate; the quartz substrate having a thickness less than 10 micrometers; and a base substrate, the quartz substrate bonded to the base substrate.

Concept 25. The resonator of concept 24, wherein the base substrate comprises a member selected from the group consisting of group HI-V elements, and SiGe.

Concept 26. The resonator of concept 24, wherein at least a portion of the base substrate is removed, thereby creating a modified base substrate.

Concept 27. The resonator of concept 24, wherein the modified base substrate further comprises at least one probe pad.

Concept 28. The resonator of concept 27, wherein the quartz substrate comprises a first surface and a second surface, the resonator comprising at least one first electrode on the first surface, and at least one second electrode on the second surface.

Concept 29. The resonator of concept 28, wherein the quartz substrate further comprises at least one via connected to the at least one first electrode and the at least one second electrode, wherein the at least one via is filled with a metal.

Concept 30. The resonator of concept 29, wherein the quartz substrate further comprises at least one tuning pad located on a member of the group consisting of the first surface and the second surface for tuning the quartz substrate to a resonant frequency, and wherein a

portion of the quartz substrate has been removed, thereby creating a modified quartz substrate.

Concept 31. The resonator of concept 30, wherein the bond between the base substrate and the quartz substrate further comprises a bond between the probe pad and a member selected from the group of the at least one first electrode and the at least one second electrode.

Concept 32. The resonator of concept 31, wherein the tuning pad is ablated to adjust the resonant frequency.

Concept 33. The resonator of concept 32, wherein the tuning pad is one among the at least one first electrode and the at least one second electrode.

Concept 34. A method useful for thinning a quartz substrate for use in a resonator comprising the steps of: providing a quartz substrate; removing a first portion of the quartz substrate using a lap and polishing process; removing a second portion of the quartz substrate using the lap and polishing process; and removing a third portion of the quartz substrate using reactive ion etching after the step of removing the second portion, while simultaneously monitoring the thickness of the quartz substrate during the step of removing the third portion.

Concept 35. The method of concept 34, wherein the lap and polish process during the step of removing a first portion uses aluminum oxide.

Concept 36. The method of concept 34, wherein the lap and polish process during the step of removing a second portion uses silica or cerium oxide.

Concept 37. The method of concept 34, wherein reactive ion etching uses a gas having a fluorine chemistry.

Concept 38. The method of concept 34, wherein the step of measuring is performed using spectroscopic ellipsometry.

Concept 39. The method of concept 34, wherein the step of measuring is performed using refiectometry.

Concept 40. The method of concept 34, wherein the quartz substrate is thinned to a thickness less than 10 micrometers.

Concept 41. The method of concept 34, further comprising the step of performing an additional lap and polish process using cerium oxide after the step of removing a third portion.

Concept 42. The method of concept 41, further comprising the step of wet etching the quartz substrate using ammonium bifluoride after the step of performing an additional lap and polish process.

ABSTRACT

A method for fabricating a quartz nanoresonator which can be integrated on a substrate, along with other electronics is disclosed. In this method a quartz substrate is bonded to a base substrate. The quartz substrate is metallized so that a bias voltage is applied to the resonator, thereby causing the quartz substrate to resonate at resonant frequency greater than 100 MHz. The quartz substrate can then be used to drive other electrical elements with a frequency equal to its resonant frequency. The quartz substrate also contains tuning pads to adjust the resonant frequency of the resonator. Additionally, a method for accurately thinning a quartz substrate of the resonator is provided. The method allows the thickness of the quartz substrate to be monitored while the quartz substrate is simultaneously thinned.

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